Jenne; Fredrick

Patent Applications and Registrations

Patent applications and USPTO patent grants for Jenne; Fredrick.The latest application filed is for "oxide-nitride-oxide stack having multiple oxynitride layers".

Company Profile

7.32.30

Jenne; Fredrick - Mountain House CA
Jenne; Fredrick - Sunnyvale CA
Jenne; Fredrick - Los Gatos CA US
Jenne; Fredrick - San Jose CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Oxide-Nitride-Oxide Stack Having Multiple Oxynitride Layers App 20220093773 - Levy; Sagy Charel ; et al.	2022-03-24
Oxide-nitride-oxide stack having multiple oxynitride layers Grant 11,222,965 - Levy , et al. January 11, 2	2022-01-11
Oxide-nitride-oxide Stack Having Multiple Oxynitride Layers App 20210249254 - Levy; Sagy Charel ; et al.	2021-08-12
Oxide-nitride-oxide stack having multiple oxynitride layers Grant 10,903,068 - Levy , et al. January 26, 2	2021-01-26
Oxide-nitride-oxide stack having multiple oxynitride layers Grant 10,903,342 - Levy , et al. January 26, 2	2021-01-26
Oxide-nitride-oxide stack having multiple oxynitride layers Grant 10,896,973 - Levy , et al. January 19, 2	2021-01-19
Oxide-Nitride-Oxide Stack Having Multiple Oxynitride Layers App 20200144399 - Levy; Sagy Charel ; et al.	2020-05-07
Nonvolatile Charge Trap Memory Device Having A Deuterated Layer In A Multi-layer Charge-trapping Region App 20190319104 - Levy; Sagy ; et al.	2019-10-17
Oxide-nitride-oxide stack having multiple oxynitride layers Grant 10,374,067 - Levy , et al.	2019-08-06
Nonvolatile charge trap memory device having a deuterated layer in a multi-layer charge-trapping region Grant 10,263,087 - Levy , et al.	2019-04-16
Oxide-nitride-oxide Stack Having Multiple Oxynitride Layers App 20180366563 - Levy; Sagy ; et al.	2018-12-20
Oxide-nitride-oxide Stack Having Multiple Oxynitride Layers App 20180366564 - Levy; Sagy ; et al.	2018-12-20
Nonvolatile Charge Trap Memory Device Having A Deuterated Layer In A Multi-layer Charge-trapping Region App 20170352732 - Levy; Sagy ; et al.	2017-12-07
Nonvolatile charge trap memory device having a deuterated layer in a multi-layer charge-trapping region Grant 9,741,803 - Levy , et al. August 22, 2	2017-08-22
Nonvolatile charge trap memory device having a deuterated layer in a multi-layer charge-trapping region Grant 9,716,153 - Levy , et al. July 25, 2	2017-07-25
Oxide-nitride-oxide Stack Having Multiple Oxynitride Layers App 20160308033 - LEVY; Sagy ; et al.	2016-10-20
Nonvolatile Charge Trap Memory Device Having A Deuterated Layer In A Multi-Layer Charge-Trapping Region App 20160308009 - LEVY; Sagy ; et al.	2016-10-20
Oxide-Nitride-Oxide Stack Having Multiple Oxynitride Layers App 20160300724 - Levy; Sagy Charel ; et al.	2016-10-13
Oxide-nitride-oxide stack having multiple oxynitride layers Grant 9,449,831 - Levy , et al. September 20, 2	2016-09-20
SONOS ONO stack scaling Grant 9,299,568 - Jenne , et al. March 29, 2	2016-03-29
Method of ONO integration into logic CMOS flow Grant 9,102,522 - Ramkumar , et al. August 11, 2	2015-08-11
Deuterated film encapsulation of nonvolatile charge trap memory device Grant 9,018,693 - Ramkumar , et al. April 28, 2	2015-04-28
Integration of non-volatile charge trap memory devices and logic CMOS devices Grant 8,871,595 - Ramkumar , et al. October 28, 2	2014-10-28
Deuterated Film Encapsulation Of Nonvolatile Charge Trap Memory Device App 20140225116 - Ramkumar; Krishnaswamy ; et al.	2014-08-14
SONOS stack with split nitride memory layer Grant 8,710,579 - Jenne , et al. April 29, 2	2014-04-29
SONOS stack with split nitride memory layer Grant 8,710,578 - Jenne , et al. April 29, 2	2014-04-29
Oxide-nitride-oxide stack having multiple oxynitride layers Grant 8,643,124 - Levy , et al. February 4, 2	2014-02-04
Nonvolatile Charge Trap Memory Device Having A Deuterated Layer In A Multi-Layer Charge-Trapping Region App 20130306975 - LEVY; Sagy ; et al.	2013-11-21
Sonos Ono Stack Scaling App 20130307052 - JENNE; Fredrick ; et al.	2013-11-21
Memory architecture having two independently controlled voltage pumps Grant 8,542,541 - Hirose , et al. September 24, 2	2013-09-24
Sonos Stack With Split Nitride Memory Layer App 20130175600 - Jenne; Fredrick ; et al.	2013-07-11
Method Of Ono Integration Into Logic Cmos Flow App 20130178030 - Ramkumar; Krishnaswamy ; et al.	2013-07-11
Integration Of Non-volatile Charge Trap Memory Devices And Logic Cmos Devices App 20130178031 - Ramkumar; Krishnaswamy ; et al.	2013-07-11
Oxide-nitride-oxide Stack Having Multiple Oxynitride Layers App 20130175504 - Levy; Sagy ; et al.	2013-07-11
Floating gate memory device with increased coupling coefficient Grant 8,269,287 - Jenne September 18, 2	2012-09-18
Memory Architecture Having Two Independently Controlled Voltage Pumps App 20120188826 - Hirose; Ryan T. ; et al.	2012-07-26
SONOS stack with split nitride memory layer Grant 8,222,688 - Jenne , et al. July 17, 2	2012-07-17
Memory architecture having two independently controlled voltage pumps Grant 8,125,835 - Hirose , et al. February 28, 2	2012-02-28
Oxide-Nitride-Oxide Stack Having Multiple Oxynitride Layers App 20110248332 - Levy; Sagy ; et al.	2011-10-13
Memory architecture having a reference current generator that provides two reference currents Grant 7,969,804 - Hirose , et al. June 28, 2	2011-06-28
Sense transistor protection for memory programming Grant 7,881,118 - Jenne February 1, 2	2011-02-01
Programmable CSONOS logic element Grant 7,787,303 - Jenne August 31, 2	2010-08-31
Memory Architecture Having Two Independently Controlled Voltage Pumps App 20100074028 - Hirose; Ryan T. ; et al.	2010-03-25
Oxide-nitride-oxide stack having multiple oxynitride layers App 20090179253 - Levy; Sagy ; et al.	2009-07-16
Programmable CSONOS logic element App 20090080260 - Jenne; Fredrick	2009-03-26
Sense transistor protection for memory programming App 20080298132 - Jenne; Fredrick	2008-12-04
Floating gate memory device with increased coupling coefficient App 20080290386 - Jenne; Fredrick	2008-11-27