Jammy; Rajarao

Patent Applications and Registrations

Patent applications and USPTO patent grants for Jammy; Rajarao.The latest application filed is for "method and apparatus for electroplating on soi and bulk semiconductor wafers".

Company Profile

0.65.70

Jammy; Rajarao - Hopewell Junction NY US
Jammy; Rajarao - Austin TX
Jammy; Rajarao - Wappingers Falls NY
Jammy; Rajarao - Wappinger Falls NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method and apparatus for electroplating on SOI and bulk semiconductor wafers Grant 8,926,805 - Basker , et al. January 6, 2	2015-01-06
CMOS structure and method for fabrication thereof using multiple crystallographic orientations and gate materials Grant 8,785,281 - Chen , et al. July 22, 2	2014-07-22
Method and apparatus for electroplating on soi and bulk semiconductor wafers Grant 8,551,313 - Basker , et al. October 8, 2	2013-10-08
Method And Apparatus For Electroplating On Soi And Bulk Semiconductor Wafers App 20120318666 - Basker; Veeraraghavan S. ; et al.	2012-12-20
Cmos Structure And Method For Fabrication Thereof Using Multiple Crystallographic Orientations And Gate Materials App 20120142181 - Chen; Tze-Chiang ; et al.	2012-06-07
Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high-k dielectrics Grant 8,193,051 - Bojarczuk, Jr. , et al. June 5, 2	2012-06-05
CMOS structure and method for fabrication thereof using multiple crystallographic orientations and gate materials Grant 8,158,481 - Chen , et al. April 17, 2	2012-04-17
Method of forming metal/high-.kappa. gate stacks with high mobility Grant 8,153,514 - Andreoni , et al. April 10, 2	2012-04-10
Opto-thermal annealing methods for forming metal gate and fully silicided gate-field effect transistors Grant 8,039,331 - Allen , et al. October 18, 2	2011-10-18
Using metal/metal nitride bilayers as gate electrodes in self-aligned aggressively scaled CMOS devices Grant 7,999,323 - Cartier , et al. August 16, 2	2011-08-16
SELECTIVE IMPLEMENTATION OF BARRIER LAYERS TO ACHIEVE THRESHOLD VOLTAGE CONTROL IN CMOS DEVICE FABRICATION WITH HIGH-k DIELECTRICS App 20110165767 - Bojarczuk, JR.; Nestor A. ; et al.	2011-07-07
Metal gate electrode stabilization by alloying Grant 7,944,006 - Basker , et al. May 17, 2	2011-05-17
Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high-k dielectrics Grant 7,928,514 - Bojarczuk, Jr. , et al. April 19, 2	2011-04-19
Gate stack engineering by electrochemical processing utilizing through-gate-dielectric current flow Grant 7,868,410 - Vereecken , et al. January 11, 2	2011-01-11
Low threshold voltage semiconductor device with dual threshold voltage control means Grant 7,858,500 - Cartier , et al. December 28, 2	2010-12-28
Formation of fully silicided metal gate using dual self-aligned silicide process Grant 7,785,999 - Cabral, Jr. , et al. August 31, 2	2010-08-31
Introduction of metal impurity to change workfunction of conductive electrodes Grant 7,750,418 - Chudzik , et al. July 6, 2	2010-07-06
Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high K dielectrics Grant 7,745,278 - Bojarczuk, Jr. , et al. June 29, 2	2010-06-29
Cmos Structure And Method For Fabrication Thereof Using Multiple Crystallographic Orientations And Gate Materials App 20100112800 - Chen; Tze-Chiang ; et al.	2010-05-06
CMOS structure and method for fabrication thereof using multiple crystallographic orientations and gate materials Grant 7,671,421 - Chen , et al. March 2, 2	2010-03-02
Metal carbide gate structure and method of fabrication Grant 7,667,278 - Cabral, Jr. , et al. February 23, 2	2010-02-23
Low threshold voltage semiconductor device with dual threshold voltage control means Grant 7,655,994 - Cartier , et al. February 2, 2	2010-02-02
Using Metal/Metal Nitride Bilayers as Gate Electrodes in Self-Aligned Aggressively Scaled CMOS Devices App 20090302399 - Cartier; Eduard A. ; et al.	2009-12-10
Using metal/metal nitride bilayers as gate electrodes in self-aligned aggressively scaled CMOS devices Grant 7,598,545 - Cartier , et al. October 6, 2	2009-10-06
Metal Gate Electrode Stabilization By Alloying App 20090179279 - Basker; Veeraraghavan S. ; et al.	2009-07-16
SELECTIVE IMPLEMENTATION OF BARRIER LAYERS TO ACHIEVE THRESHOLD VOLTAGE CONTROL IN CMOS DEVICE FABRICATION WITH HIGH-k DIELECTRICS App 20090152642 - Bojarczuk, JR.; Nestor A. ; et al.	2009-06-18
Method And Apparatus For Electroplating On Soi And Bulk Semiconductor Wafers App 20090127121 - Basker; Veeraraghavan S. ; et al.	2009-05-21
Damascene Gate Field Effect Transistor With An Internal Spacer Structure App 20090124057 - Guha; Supratik ; et al.	2009-05-14
Method of forming HfSiN metal for n-FET applications Grant 7,521,346 - Callegari , et al. April 21, 2	2009-04-21
Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high-k dielectrics Grant 7,479,683 - Bojarczuk, Jr. , et al. January 20, 2	2009-01-20
Field effect transistor including damascene gate with an internal spacer structure Grant 7,479,684 - Guha , et al. January 20, 2	2009-01-20
Selective Implementation Of Barrier Layers To Achieve Treshold Voltage Control In Cmos Device Fabrication With High K Dielectrics App 20090011610 - Bojarczuk, JR.; Nestor A. ; et al.	2009-01-08
METHOD OF FORMING METAL/HIGH-k GATE STACKS WITH HIGH MOBILITY App 20080293259 - Andreoni; Wanda ; et al.	2008-11-27
Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high k dielectrics Grant 7,452,767 - Bojarczuk, Jr. , et al. November 18, 2	2008-11-18
Stabilization of flatband voltages and threshold voltages in hafnium oxide based silicon transistors for CMOS Grant 7,446,380 - Bojarczuk, Jr. , et al. November 4, 2	2008-11-04
Stabilization Of Flatband Voltages And Threshold Voltages In Hafnium Oxide Based Silicon Transistors For Cmos App 20080258198 - Bojarczuk; Nestor A. ; et al.	2008-10-23
METHOD OF FORMING HfSiN METAL FOR n-FET APPLICATIONS App 20080245658 - Callegari; Alessandro C. ; et al.	2008-10-09
Introduction of metal impurity to change workfunction of conductive electrodes Grant 7,425,497 - Chudzik , et al. September 16, 2	2008-09-16
Introduction Of Metal Impurity To Change Workfunction Of Conductive Electrodes App 20080217747 - Chudzik; Michael P. ; et al.	2008-09-11
Opto-thermal Annealing Methods For Forming Metal Gate And Fully Silicided Gate-field Effect Transistors App 20080220581 - Allen; Scott D. ; et al.	2008-09-11
Opto-thermal annealing methods for forming metal gate and fully silicided gate field effect transistors Grant 7,410,852 - Allen , et al. August 12, 2	2008-08-12
Low Threshold Voltage Semiconductor Device With Dual Threshold Voltage Control Means App 20080182389 - Cartier; Eduard A. ; et al.	2008-07-31
Gate Stack Engineering By Electrochemical Processing Utilizing Through-gate-dielectric Current Flow App 20080142894 - Vereecken; Philippe M. ; et al.	2008-06-19
Gate stack engineering by electrochemical processing utilizing through-gate-dielectric current flow Grant 7,368,045 - Vereecken , et al. May 6, 2	2008-05-06
METHOD OF FORMING HfSiN METAL FOR n-FET APPLICATIONS App 20080038905 - Callegari; Alessandro C. ; et al.	2008-02-14
Formation Of Fully Silicided Metal Gate Using Dual Self-aligned Silicide Process App 20080026551 - Cabral; Cyril JR. ; et al.	2008-01-31
Semiconductor device structures (gate stacks) with charge compositions App 20080017936 - Buchanan; Douglas A. ; et al.	2008-01-24
CMOS structure and method for fabrication thereof using multiple crystallographic orientations and gate materials App 20070278586 - Chen; Tze-Chiang ; et al.	2007-12-06
Opto-thermal annealing methods for forming metal gate and fully silicided gate field effect transistors App 20070249131 - Allen; Scott D. ; et al.	2007-10-25
Formation of fully silicided metal gate using dual self-aligned silicide process Grant 7,271,455 - Cabral, Jr. , et al. September 18, 2	2007-09-18
Introduction of metal impurity to change workfunction of conductive electrodes App 20070173008 - Chudzik; Michael P. ; et al.	2007-07-26
Nitrogen-containing field effect transistor gate stack containing a threshold voltage control layer formed via deposition of a metal oxide Grant 7,242,055 - Bojarczuk, Jr. , et al. July 10, 2	2007-07-10
Low threshold voltage semiconductor device with dual threshold voltage control means App 20070090471 - Cartier; Eduard A. ; et al.	2007-04-26
Method to control flatband/threshold voltage in high-k metal gated stacks and structures thereof App 20060289948 - Brown; Stephen L. ; et al.	2006-12-28
Method of forming metal/high-k gate stacks with high mobility App 20060289903 - Andreoni; Wanda ; et al.	2006-12-28
Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high k dielectrics App 20060275977 - Bojarczuk; Nestor A. JR. ; et al.	2006-12-07
Stabilization of flatband voltages and threshold voltages in hafnium oxide based silicon transistors for CMOS App 20060244035 - Bojarczuk; Nestor A. JR. ; et al.	2006-11-02
Using metal/metal nitride bilayers as gate electrodes in self-aligned aggressively scaled CMOS devices App 20060237796 - Cartier; Eduard A. ; et al.	2006-10-26
Method of forming metal/high-k gate stacks with high mobility Grant 7,115,959 - Andreoni , et al. October 3, 2	2006-10-03
Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high k dielectrics Grant 7,105,889 - Bojarczuk, Jr. , et al. September 12, 2	2006-09-12
Field Effect Transistor With Etched-Back Gate Dielectric App 20060189083 - Saenger; Katherine L. ; et al.	2006-08-24
Metal carbide gate structure and method of fabrication App 20060186490 - Cabral; Cyril JR. ; et al.	2006-08-24
Replacement metal gate transistor with metal-rich silicon layer and method for making the same Grant 7,091,118 - Pan , et al. August 15, 2	2006-08-15
Gate stack engineering by electrochemical processing utilizing through-gate-dielectric current flow App 20060166474 - Vereecken; Philippe M. ; et al.	2006-07-27
Method of forming HfSiN metal for n-FET applications App 20060151846 - Callegari; Alessandro C. ; et al.	2006-07-13
Field effect transistor with etched-back gate dielectric Grant 7,071,122 - Saenger , et al. July 4, 2	2006-07-04
Metal carbide gate structure and method of fabrication Grant 7,064,050 - Cabral, Jr. , et al. June 20, 2	2006-06-20
Nitrogen-containing field effect transistor gate stack containing a threshold voltage control layer formed via deposition of a metal oxide App 20060102968 - Bojarczuk; Nestor A. JR. ; et al.	2006-05-18
Damascene gate field effect transistor with an internal spacer structure App 20060091432 - Guha; Supratik ; et al.	2006-05-04
High density chip carrier with integrated passive devices Grant 7,030,481 - Chudzik , et al. April 18, 2	2006-04-18
Nitrided STI liner oxide for reduced corner device impact on vertical device performance Grant 6,998,666 - Beintner , et al. February 14, 2	2006-02-14
Formation of fully silicided metal gate using dual self-aligned silicide process App 20060022280 - Cabral; Cyril JR. ; et al.	2006-02-02
Method of forming metal/high-k gate stacks with high mobility App 20050280105 - Andreoni, Wanda ; et al.	2005-12-22
Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high-k dielectrics App 20050269635 - Bojarczuk, Nestor A. JR. ; et al.	2005-12-08
Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high k dielectrics App 20050269634 - Bojarczuk, Nestor A. JR. ; et al.	2005-12-08
High density chip carrier with integrated passive devices Grant 6,962,872 - Chudzik , et al. November 8, 2	2005-11-08
Pitcher-shaped active area for field effect transistor and method of forming same Grant 6,960,514 - Beintner , et al. November 1, 2	2005-11-01
Semiconductor method and structure for simultaneously forming a trench capacitor dielectric and trench sidewall device dielectric Grant 6,936,512 - Chudzik , et al. August 30, 2	2005-08-30
Filling high aspect ratio isolation structures with polysilazane based material App 20050179112 - Belyansky, Michael P. ; et al.	2005-08-18
Nitrided Sti Liner Oxide For Reduced Corner Device Impact On Vertical Device Performance App 20050151181 - Beintner, Jochen ; et al.	2005-07-14
Field effect transistor with etched-back gate dielectric App 20050127417 - Saenger, Katherine L. ; et al.	2005-06-16
Metal carbide gate structure and method of fabrication App 20050116230 - Cabral, Cyril JR. ; et al.	2005-06-02
Trench capacitors with reduced polysilicon stress Grant 6,872,620 - Chidambarrao , et al. March 29, 2	2005-03-29
High performance logic and high density embedded dram with borderless contact and antispacer Grant 6,873,010 - Chidambarrao , et al. March 29, 2	2005-03-29
Filling high aspect ratio isolation structures with polysilazane based material Grant 6,869,860 - Belyansky , et al. March 22, 2	2005-03-22
High density chip carrier with integrated passive devices App 20050023664 - Chudzik, Michael Patrick ; et al.	2005-02-03
Dram Buried Strap Process With Silicon Carbide App 20050017282 - Dobuzinsky, David M. ; et al.	2005-01-27
Filling High Aspect Ratio Isolation Structures With Polysilazane Based Material App 20040248374 - Belyansky, Michael P. ; et al.	2004-12-09
Process For Removing Dopant Ions From A Substrate App 20040194813 - Riggs, David B. ; et al.	2004-10-07
Vertical thermal nitride mask (anti-collar) and processing thereof Grant 6,797,582 - Gluschenkov , et al. September 28, 2	2004-09-28
Applications of space-charge-limited conduction induced current increase in nitride-oxide dielectric capacitors: voltage regulator for power supply system and others Grant 6,794,706 - Chen , et al. September 21, 2	2004-09-21
Pitcher-shaped active area for field effect transistor and method of forming same App 20040173858 - Beintner, Jochen ; et al.	2004-09-09
Process for removing dopant ions from a substrate Grant 6,764,551 - Riggs , et al. July 20, 2	2004-07-20
Method of enhancing surface reactions by local resonant heating App 20040112863 - Chen, Bomy A. ; et al.	2004-06-17
High density chip carrier with integrated passive devices App 20040108587 - Chudzik, Michael Patrick ; et al.	2004-06-10
Pitcher-shaped active area for field effect transistor and method of forming same Grant 6,746,933 - Beintner , et al. June 8, 2	2004-06-08
High performance logic and high density embedded dram with borderless contact and antispacer App 20040075111 - Chidambarrao, Dureseti ; et al.	2004-04-22
Quantum conductive barrier for contact to shallow diffusion region Grant 6,724,088 - Jammy , et al. April 20, 2	2004-04-20
Semiconductor method and structure for simultaneously forming a trench capacitor dielectric and trench sidewall device dielectric App 20040063277 - Chudzik, Michael P. ; et al.	2004-04-01
High performance logic and high density embedded dram with borderless contact and antispacer Grant 6,709,926 - Chidambarrao , et al. March 23, 2	2004-03-23
Method for forming crystalline silicon nitride Grant 6,707,086 - Jammy , et al. March 16, 2	2004-03-16
Method of trench sidewall enhancement Grant 6,706,586 - Collins , et al. March 16, 2	2004-03-16
Applications of space-charge-limited conduction induced current increase in nitride-oxide dielectric capacitors: voltage regulator for power supply system and others App 20040012046 - Chen, Fen ; et al.	2004-01-22
Method and structure for salicide trench capacitor plate electrode Grant 6,664,161 - Chudzik , et al. December 16, 2	2003-12-16
High Performance Logic And High Density Embedded Dram With Borderless Contact And Antispacer App 20030224573 - Chidambarrao, Dureseti ; et al.	2003-12-04
Reduction of polysilicon stress in trench capacitors Grant 6,653,678 - Chidambarrao , et al. November 25, 2	2003-11-25
Method And Structure For Salicide Trench Capacitor Plate Electrode App 20030207532 - Chudzik, Michael Patrick ; et al.	2003-11-06
Vertical thermal nitride mask (anti-collar) and processing thereof App 20030203587 - Gluschenkov, Oleg ; et al.	2003-10-30
Trench capacitors with reduced polysilicon stress App 20030201480 - Chidambarrao, Dureseti ; et al.	2003-10-30
Low resistivity deep trench fill for DRAM and EDRAM applications Grant 6,620,724 - Schroeder , et al. September 16, 2	2003-09-16
Method for surface roughness enhancement in semiconductor capacitor manufacturing Grant 6,613,642 - Rahn , et al. September 2, 2	2003-09-02
Method For Surface Roughness Enhancement In Semiconductor Capacitor Manufacturing App 20030114005 - Rahn, Stephen ; et al.	2003-06-19
A 3-d Microelectronic Structure Including A Vertical Thermal Nitride Mask App 20030107111 - Gluschenkov, Oleg ; et al.	2003-06-12
Method of forming low-leakage dielectric layer App 20030082884 - Faltermeier, Johnathan ; et al.	2003-05-01
Process flow for capacitance enhancement in a DRAM trench Grant 6,555,430 - Chudzik , et al. April 29, 2	2003-04-29
Process for removing dopant ions from a substrate App 20030066542 - Riggs, David B. ; et al.	2003-04-10
Method for forming junction on insulator (JOI) structure Grant 6,544,874 - Mandelman , et al. April 8, 2	2003-04-08
Method For Forming Junction On Insulator (joi) Structure App 20030032272 - Mandelman, Jack A. ; et al.	2003-02-13
Method of fabricating SiO2 spacers and annealing caps Grant 6,512,266 - Deshpande , et al. January 28, 2	2003-01-28
Method Of Fabricating Sio2 Spacers And Annealing Caps App 20030011080 - Deshpande, Sadanand V. ; et al.	2003-01-16
Reduction of polysilicon stress in trench capacitors App 20030013259 - Chidambarrao, Dureseti ; et al.	2003-01-16
Oxidation of silicon nitride films in semiconductor devices App 20020182893 - Ballantine, Arne W. ; et al.	2002-12-05
Method For Forming Crystalline Silicon Nitride App 20020137362 - JAMMY, RAJARAO ; et al.	2002-09-26
Semi-insulating diffusion barrier for low-resistivity gate conductors Grant 6,444,516 - Clevenger , et al. September 3, 2	2002-09-03
Method for surface area enhancement of capacitors by film growth and self masking App 20020106857 - Jammy, Rajarao ; et al.	2002-08-08
Method of making DRAM trench capacitor Grant 6,352,892 - Jammy , et al. March 5, 2	2002-03-05
Strap with intrinsically conductive barrier App 20010038112 - Gambino, Jeffrey P. ; et al.	2001-11-08
Dram trench capacitor App 20010039087 - Jammy, Rajarao ; et al.	2001-11-08
Method for preparing the surface of a dielectric App 20010016226 - Natzle, Wesley ; et al.	2001-08-23
Variable stoichiometry silicon nitride barrier films for tunable etch selectivity and enhanced hyrogen permeability Grant 6,268,299 - Jammy , et al. July 31, 2	2001-07-31
DRAM trench Grant 6,222,218 - Jammy , et al. April 24, 2	2001-04-24
Quantum conductive recrystallization barrier layers Grant 6,194,736 - Chaloux , et al. February 27, 2	2001-02-27