Hui; Angela T.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Hui; Angela T..The latest application filed is for "contacts for semiconductor devices".

Company Profile

3.85.38

Hui; Angela T. - Fremont CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Contacts For Semiconductor Devices App 20220302297 - Hui; Angela T. ; et al.	2022-09-22
Contacts for semiconductor devices Grant 10,944,000 - Hui , et al. March 9, 2	2021-03-09
Contacts For Semiconductor Devices App 20200212215 - Hui; Angela T. ; et al.	2020-07-02
Split-gate semiconductor device with L-shaped gate Grant 10,593,688 - Bell , et al.	2020-03-17
Contacts for semiconductor devices Grant 10,516,044 - Hui , et al. Dec	2019-12-24
Split-gate Semiconductor Device With L-shaped Gate App 20180358367 - Bell; Scott A. ; et al.	2018-12-13
Split-gate semiconductor device with L-shaped gate Grant 9,589,805 - Bell , et al. March 7, 2	2017-03-07
Integrating transistors with different poly-silicon heights on the same die Grant 9,431,503 - Lin , et al. August 30, 2	2016-08-30
Spacer design to prevent trapped electrons Grant 8,836,012 - Hui September 16, 2	2014-09-16
Integrated circuit with metal and semi-conducting gate Grant 8,815,727 - Hui , et al. August 26, 2	2014-08-26
Planar cell ONO cut using in-situ polymer deposition and etch Grant 8,790,530 - Hui , et al. July 29, 2	2014-07-29
System and method for reducing cross-coupling noise between charge storage elements in a semiconductor device Grant 8,759,894 - Wu , et al. June 24, 2	2014-06-24
Integrating Transistors With Different Poly-silicon Heights On The Same Die App 20140117435 - LIN; Chuan ; et al.	2014-05-01
Spacer Design to Prevent Trapped Electrons App 20140097497 - HUI; Angela T.	2014-04-10
Integrating transistors with different poly-silicon heights on the same die Grant 8,652,907 - Lin , et al. February 18, 2	2014-02-18
Contacts For Semiconductor Devices App 20140042514 - Hui; Angela T. ; et al.	2014-02-13
Void free interlayer dielectric Grant 8,614,475 - Ngo , et al. December 24, 2	2013-12-24
System and method for improving mesa width in a semiconductor device Grant 8,598,645 - Kim , et al. December 3, 2	2013-12-03
Contacts for semiconductor devices Grant 8,564,041 - Hui , et al. October 22, 2	2013-10-22
Void Free Interlayer Dielectric App 20130140720 - Ngo; Minh Van ; et al.	2013-06-06
Integrated Circuit with Metal and Semi-Conducting Gate App 20130130487 - Hui; Angela T. ; et al.	2013-05-23
Gate trim process using either wet etch or dry etch approach to target CD for selected transistors Grant 8,409,994 - Davis , et al. April 2, 2	2013-04-02
Void free interlayer dielectric Grant 8,367,493 - Ngo , et al. February 5, 2	2013-02-05
Dual spacer formation in flash memory Grant 8,349,685 - Hui , et al. January 8, 2	2013-01-08
Integrated circuit system with metal and semi-conducting gate Grant 8,283,718 - Hui , et al. October 9, 2	2012-10-09
Integrating Transistors With Different Poly-silicon Heights On The Same Die App 20120241871 - Lin; Chuan ; et al.	2012-09-27
Method And Apparatus For Nand Memory With Recessed Source/drain Region App 20120139023 - CHEN; Chun ; et al.	2012-06-07
Dual Spacer Formation In Flash Memory App 20120142175 - HUI; Angela T. ; et al.	2012-06-07
Integrated circuit system with memory system Grant 8,114,736 - Chan , et al. February 14, 2	2012-02-14
Gate Trim Process Using Either Wet Etch Or Dry Etch Approach To Target Cd For Selected Transistors App 20120032308 - Davis; Bradley M. ; et al.	2012-02-09
Gate trim process using either wet etch or dry etch approach to target CD for selected transistors Grant 8,067,314 - Davis , et al. November 29, 2	2011-11-29
Planar Cell On Cut Using In-situ Polymer Deposition And Etch App 20110195578 - Hui; Angela T. ; et al.	2011-08-11
System and method for improving reliability in a semiconductor device Grant 7,985,687 - Hui , et al. July 26, 2	2011-07-26
Integrated circuit with contact region and multiple etch stop insulation layer Grant 7,977,797 - Li , et al. July 12, 2	2011-07-12
Memory device etch methods Grant 7,972,951 - Hui , et al. July 5, 2	2011-07-05
Film stacks to prevent UV-induced device damage Grant 7,927,723 - Hui , et al. April 19, 2	2011-04-19
System And Method For Improving Mesa Width In A Semiconductor Device App 20110037115 - KIM; Unsoon ; et al.	2011-02-17
System and method for improving mesa width in a semiconductor device Grant 7,842,618 - Kim , et al. November 30, 2	2010-11-30
Gate Trim Process Using Either Wet Etch Or Dry Etch Appraoch To Target Cd For Selected Transistors App 20100264519 - Davis; Bradley M. ; et al.	2010-10-21
Memory Device Etch Methods App 20100120239 - HUI; Angela T. ; et al.	2010-05-13
Contact spacer formation using atomic layer deposition Grant 7,704,878 - Ngo , et al. April 27, 2	2010-04-27
System and method for improving oxide-nitride-oxide (ONO) coupling in a semiconductor device Grant 7,679,129 - Hui , et al. March 16, 2	2010-03-16
Memory device etch methods Grant 7,670,959 - Hui , et al. March 2, 2	2010-03-02
Semiconductor Contact Formation System And Method App 20090294969 - LI; Wenmei ; et al.	2009-12-03
Semiconductor formation method that utilizes multiple etch stop layers Grant 7,572,727 - Li , et al. August 11, 2	2009-08-11
Bit line implant Grant 7,432,178 - Hui , et al. October 7, 2	2008-10-07
Memory Device Etch Methods App 20080153298 - Hui; Angela T. ; et al.	2008-06-26
Integrated Circuit System With Memory System App 20080150042 - Chan; Simon Siu-Sing ; et al.	2008-06-26
Integrated Circuit System With Memory System App 20080153224 - Wang; Connie Pin Chin ; et al.	2008-06-26
Integrated Circuit System With Metal And Semi-conducting Gate App 20080142873 - Hui; Angela T. ; et al.	2008-06-19
Contacts For Semiconductor Devices App 20080096348 - HUI; Angela T. ; et al.	2008-04-24
Semiconductor contact and nitride spacer formation system and method Grant 7,361,587 - Li , et al. April 22, 2	2008-04-22
Disposable hard mask for forming bit lines Grant 7,341,956 - Tokuno , et al. March 11, 2	2008-03-11
Etch-back process for capping a polymer memory device Grant 7,323,418 - Ngo , et al. January 29, 2	2008-01-29
Interlayer dielectric for charge loss improvement Grant 7,300,886 - Ngo , et al. November 27, 2	2007-11-27
Structure and method for low Vss resistance and reduced DIBL in a floating gate memory cell Grant 7,301,193 - Fang , et al. November 27, 2	2007-11-27
Avoiding Field Oxide Gouging In Shallow Trench Isolation (STI) Regions App 20070262412 - Hui; Angela T. ; et al.	2007-11-15
Polymer spacers for creating sub-lithographic spaces Grant 7,285,499 - Bell , et al. October 23, 2	2007-10-23
Avoiding field oxide gouging in shallow trench isolation (STI) regions Grant 7,265,014 - Hui , et al. September 4, 2	2007-09-04
Non-volatile memory device with increased reliability Grant 7,238,571 - Tokuno , et al. July 3, 2	2007-07-03
Bit line implant App 20070093042 - Hui; Angela T. ; et al.	2007-04-26
Contact spacer formation using atomic layer deposition App 20070077754 - Ngo; Minh Van ; et al.	2007-04-05
Using thin undoped TEOS with BPTEOS ILD or BPTEOS ILD alone to improve charge loss and contact resistance in multi-bit memory devices App 20070029604 - Cheng; Ning ; et al.	2007-02-08
System and method for improving mesa width in a semiconductor device App 20070026675 - Kim; Unsoon ; et al.	2007-02-01
Using thin undoped TEOS with BPTEOS ILD or BPTEOS ILD alone to improve charge loss and contact resistance in multi bit memory devices Grant 7,157,335 - Cheng , et al. January 2, 2	2007-01-02
SO.sub.2 treatment of oxidized CuO for copper sulfide formation of memory element growth Grant 7,115,440 - Lyons , et al. October 3, 2	2006-10-03
Semiconductor device and method of fabricating the same App 20060214218 - Shishido; Kiyokazu ; et al.	2006-09-28
UV-blocking layer for reducing UV-induced charging of SONOS dual-bit flash memory devices in BEOL processing Grant 7,018,896 - Ngo , et al. March 28, 2	2006-03-28
Method for reducing anti-reflective coating layer removal during removal of photoresist Grant 7,015,134 - Plat , et al. March 21, 2	2006-03-21
Method and system for reducing contact defects using non conventional contact formation method for semiconductor cells Grant 7,015,135 - Hui , et al. March 21, 2	2006-03-21
Dual spacer process for non-volatile memory devices Grant 7,012,008 - Shields , et al. March 14, 2	2006-03-14
Flash NVROM devices with UV charge immunity Grant 6,969,654 - Pham , et al. November 29, 2	2005-11-29
In-situ surface treatment for memory cell formation App 20050227382 - Hui, Angela T.	2005-10-13
Narrow wide spacer Grant 6,927,129 - Sun , et al. August 9, 2	2005-08-09
Structure and method for low Vss resistance and reduced dibl in a floating gate memory cell App 20050164450 - Fang, Shenqing ; et al.	2005-07-28
Method of making a memory cell with polished insulator layer Grant 6,867,097 - Ramsbey , et al. March 15, 2	2005-03-15
Organic spin-on anti-reflective coating over inorganic anti-reflective coating Grant 6,867,063 - Ghandehari , et al. March 15, 2	2005-03-15
System and method of forming a passive layer by a CMP process Grant 6,836,398 - Subramanian , et al. December 28, 2	2004-12-28
Method and system for tailoring core and periphery cells in a nonvolatile memory Grant 6,808,992 - Ko , et al. October 26, 2	2004-10-26
Method for protecting gate edges from charge gain/loss in semiconductor device Grant 6,808,996 - Pham , et al. October 26, 2	2004-10-26
Silicon containing material for patterning polymeric memory element Grant 6,803,267 - Subramanian , et al. October 12, 2	2004-10-12
UV-blocking layer for reducing UV-induced charging of SONOS dual-bit flash memory devices in BEOL processing App 20040191989 - Ngo, Minh V. ; et al.	2004-09-30
Polymer memory device formed in via opening Grant 6,787,458 - Tripsas , et al. September 7, 2	2004-09-07
UV-blocking layer for reducing UV-induced charging of SONOS dual-bit flash memory devices in BEOL Grant 6,774,432 - Ngo , et al. August 10, 2	2004-08-10
Uv-blocking Layer For Reducing Uv-induced Charging Of Sonos Dual-bit Flash Memory Devices In Beol Processing App 20040151025 - Ngo, Minh V. ; et al.	2004-08-05
Method(s) facilitating formation of memory cell(s) and patterned conductive Grant 6,753,247 - Okoroanyanwu , et al. June 22, 2	2004-06-22
Method and system for reducing contact defects using non conventional contact formation method for semiconductor cells App 20040110368 - Hui, Angela T. ; et al.	2004-06-10
Method and system for reducing charge gain and charge loss when using an ARC layer in interlayer dielectric formation Grant 6,727,143 - Hui , et al. April 27, 2	2004-04-27
Dual bit isolation scheme for flash memory devices having polysilicon floating gates Grant 6,680,507 - Pham , et al. January 20, 2	2004-01-20
Low K dielectic etch in high density plasma etcher Grant 6,670,265 - Wang , et al. December 30, 2	2003-12-30
Non self-aligned shallow trench isolation process with disposable space to define sub-lithographic poly space Grant 6,664,191 - Kim , et al. December 16, 2	2003-12-16
Method of forming smaller trench line width using a spacer hard mask Grant 6,664,180 - Hui , et al. December 16, 2	2003-12-16
Spin on polymers for organic memory devices Grant 6,656,763 - Oglesby , et al. December 2, 2	2003-12-02
Flash memory with controlled wordline width Grant 6,653,190 - Yang , et al. November 25, 2	2003-11-25
Method and system for reducing charge gain and charge loss in interlayer dielectric formation Grant 6,635,943 - Hui , et al. October 21, 2	2003-10-21
Memory wordline hard mask Grant 6,617,215 - Halliyal , et al. September 9, 2	2003-09-09
Interconnect methodology employing a low dielectric constant etch stop layer Grant 6,593,632 - Avanzino , et al. July 15, 2	2003-07-15
Innovative narrow gate formation for floating gate flash technology Grant 6,583,009 - Hui , et al. June 24, 2	2003-06-24
Thinning of trench and line or contact spacing by use of dual layer photoresist Grant 6,528,398 - Ghandehari , et al. March 4, 2	2003-03-04
Method of creating narrow trench lines using hard mask Grant 6,514,867 - Hui , et al. February 4, 2	2003-02-04
Method of forming smaller contact size using a spacer hard mask Grant 6,514,849 - Hui , et al. February 4, 2	2003-02-04
Method of creating a smaller contact using hard mask Grant 6,514,868 - Hui , et al. February 4, 2	2003-02-04
Method for forming high quality multiple thickness oxide using high temperature descum Grant 6,479,411 - Hui , et al. November 12, 2	2002-11-12
Method for forming a semiconductor device with self-aligned contacts using a liner oxide layer Grant 6,475,847 - Ngo , et al. November 5, 2	2002-11-05
Method of forming integrated circuit features by oxidation of titanium hard mask Grant 6,475,867 - Hui , et al. November 5, 2	2002-11-05
Low K Dielectric Etch In High Density Plasma Etcher App 20020151168 - WANG, FEI ; et al.	2002-10-17
Capping layer Grant 6,448,608 - Pham , et al. September 10, 2	2002-09-10
Plasma treatment for polymer removal after via etch Grant 6,431,182 - Rakhshandehroo , et al. August 13, 2	2002-08-13
Semiconductor device with self-aligned contacts using a liner oxide layer Grant 6,420,752 - Ngo , et al. July 16, 2	2002-07-16
Method and system for reducing ARC layer removal during removal of photoresist App 20020076931 - Plat, Marina V. ; et al.	2002-06-20
Method for forming high quality multiple thickness oxide layers by reducing descum induced defects App 20020058421 - Hui, Angela T. ; et al.	2002-05-16
Dual bit isolation scheme for flash memory devices having polysilicon floating gates App 20020048881 - Pham, Tuan ; et al.	2002-04-25
Method for removing anti-reflective coating layer using plasma etch process before contact CMP Grant 6,291,296 - Hui , et al. September 18, 2	2001-09-18
Method for contact size control for nand technology App 20010006847 - Wang, John JianShi ; et al.	2001-07-05
Method to reduce gate-to-local interconnect capacitance using a low dielectric constant material for LDD spacer Grant 6,137,126 - Avanzino , et al. October 24, 2	2000-10-24
Method and system for providing tapered shallow trench isolation structure profile Grant 5,998,301 - Pham , et al. December 7, 1	1999-12-07

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