HUANG; Yunteng

Patent Applications and Registrations

Patent applications and USPTO patent grants for HUANG; Yunteng.The latest application filed is for "dilatable balloon catheter".

Company Profile

5.43.37

HUANG; Yunteng - Shanghai CN
Huang; Yunteng - Palo Alto CA
Huang; Yunteng - Irvine CA US
Huang; Yunteng - Austin TX
Huang; Yunteng - Corvallis OR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Dilatable Balloon Catheter App 20200254230 - Kind Code	2020-08-13
Non-vascular Lumen Guide Wire App 20200147352 - Zheng; Zhongwei ; et al.	2020-05-14
Automated Meter Reading App 20190297395 - Huang; Yunteng	2019-09-26
Fail safe clock buffer and clock generator Grant 10,320,509 - Huang , et al.	2019-06-11
Dual path timing wander removal Grant 10,057,051 - Huang August 21, 2	2018-08-21
Dual path timing jitter removal Grant 9,705,668 - Huang July 11, 2	2017-07-11
Fail Safe Clock Buffer And Clock Generator App 20170187481 - Huang; Yunteng ; et al.	2017-06-29
Accurate frequency control using a MEMS-based oscillator Grant 9,621,170 - Huang April 11, 2	2017-04-11
Dual Path Timing Jitter Removal App 20160352505 - Huang; Yunteng	2016-12-01
Dual Path Timing Wander Removal App 20160352506 - Huang; Yunteng	2016-12-01
Identifying Indicia For Beverage Containers App 20160264299 - Zhang; Xiangdong ; et al.	2016-09-15
Isolated serializer-deserializer Grant 9,118,392 - Sundar , et al. August 25, 2	2015-08-25
Accurate Frequency Control Using A Mems-based Oscillator App 20150048895 - Huang; Yunteng	2015-02-19
Isolated Serializer-Deserializer App 20140307759 - Sundar; Siddharth ; et al.	2014-10-16
Time-interleaved digital-to-time converter Grant 8,860,514 - Weltin-Wu , et al. October 14, 2	2014-10-14
Frequency synthesizer with hit-less transitions between frequency- and phase-locked modes Grant 8,786,341 - Weltin-Wu , et al. July 22, 2	2014-07-22
Time-interleaved Digital-to-time Converter App 20140176201 - Weltin-Wu; Colin ; et al.	2014-06-26
Transmitter having a programmable amplifier operating class Grant 8,712,344 - Wang , et al. April 29, 2	2014-04-29
Direct digital interpolative synthesis Grant 8,531,246 - Huang September 10, 2	2013-09-10
Providing automatic power control for a power amplifier Grant 8,471,629 - Thomsen , et al. June 25, 2	2013-06-25
Providing Automatic Power Control For A Power Amplifier App 20130002357 - Thomsen; Axel ; et al.	2013-01-03
Radio frequency (RF) power detector suitable for use in automatic gain control (AGC) Grant 8,339,179 - Sun , et al. December 25, 2	2012-12-25
Radio Frequency (rf) Power Detector Suitable For Use In Automatic Gain Control (agc) App 20120299623 - Sun; Ruifeng ; et al.	2012-11-29
Transmitter App 20120252383 - WANG; ZHONDGA ; et al.	2012-10-04
Generating A Modulated Signal For A Transmitter App 20120250789 - Wang; Zhondga ; et al.	2012-10-04
Radio frequency (RF) power detector suitable for use in automatic gain control (AGC) Grant 8,264,255 - Sun , et al. September 11, 2	2012-09-11
Radio Frequency (RF) Power Detector Suitable for Use in Automatic Gain Control (AGC) App 20110102047 - Sun; Ruifeng ; et al.	2011-05-05
Direct Digital Interpolative Synthesis App 20110057693 - Huang; Yunteng	2011-03-10
Direct digital interpolative synthesis Grant 7,839,225 - Huang November 23, 2	2010-11-23
Dual loop architecture useful for a programmable clock source and clock multiplier applications Grant 7,825,708 - Thomsen , et al. November 2, 2	2010-11-02
Technique for expanding an input signal Grant 7,679,455 - Huang , et al. March 16, 2	2010-03-16
Digitally-synthesized loop filter method and circuit particularly useful for a phase locked loop Grant 7,613,267 - Perrott , et al. November 3, 2	2009-11-03
System and method for determining a resonant frequency in a communications device Grant 7,561,865 - Zhang , et al. July 14, 2	2009-07-14
Data cleaning with an asynchronous reference clock Grant 7,512,203 - Eldredge , et al. March 31, 2	2009-03-31
Dual Loop Architecture Useful For A Programmable Clock Source And Clock Multiplier Applications App 20090039968 - Thomsen; Axel ; et al.	2009-02-12
Direct Digital Interpolative Synthesis App 20080315963 - Huang; Yunteng	2008-12-25
Feedback system incorporating slow digital switching for glitch-free state changes Grant 7,463,098 - Baird , et al. December 9, 2	2008-12-09
Dual loop architecture useful for a programmable clock source and clock multiplier applications Grant 7,436,227 - Thomsen , et al. October 14, 2	2008-10-14
Direct digital interpolative synthesis Grant 7,417,510 - Huang August 26, 2	2008-08-26
Direct Digital Interpolative Synthesis App 20080079502 - Huang; Yunteng	2008-04-03
System And Method For Determining A Resonant Frequency In A Communications Device App 20080081583 - Zhang; Ligang ; et al.	2008-04-03
Multi-frequency clock synthesizer Grant 7,295,077 - Thomsen , et al. November 13, 2	2007-11-13
Voltage controlled clock synthesizer Grant 7,288,998 - Thomsen , et al. October 30, 2	2007-10-30
Digital expander for generating multiple analog control signals particularly useful for controlling an oscillator Grant 7,262,725 - Huang , et al. August 28, 2	2007-08-28
Signal dependent biasing scheme for an amplifier Grant 7,259,628 - Huang , et al. August 21, 2	2007-08-21
Method and apparatus for noise compensation in an oscillator circuit Grant 7,253,693 - Zhang , et al. August 7, 2	2007-08-07
Configurable circuit structure having reduced susceptibility to interference when using at least two such circuits to perform like functions Grant 7,236,024 - Huang , et al. June 26, 2	2007-06-26
Imbalanced differential circuit control Grant 7,230,503 - Huang June 12, 2	2007-06-12
Feedback System Incorporating Slow Digital Switching For Glitch-free State Changes App 20070057736 - Baird; Rex T. ; et al.	2007-03-15
Signal dependent biasing scheme for an amplifier App 20070001764 - Huang; Yunteng ; et al.	2007-01-04
Digital Expander For Generating Multiple Analog Control Signals Particularly Useful For Controlling An Oscillator App 20060284746 - Huang; Yunteng ; et al.	2006-12-21
Feedback system incorporating slow digital switching for glitch-free state changes Grant 7,133,485 - Baird , et al. November 7, 2	2006-11-07
Data cleaning with an asynchronous reference clock App 20060222134 - Eldredge; Adam B. ; et al.	2006-10-05
Technique For Expanding An Input Signal App 20060192598 - Baird; Rex T. ; et al.	2006-08-31
Digital expander apparatus and method for generating multiple analog control signals particularly useful for controlling an oscillator Grant 7,084,710 - Huang , et al. August 1, 2	2006-08-01
Maintaining a selected slice level App 20060120493 - Huang; Yunteng ; et al.	2006-06-08
Voltage controlled clock synthesizer App 20060119437 - Thomsen; Axel ; et al.	2006-06-08
Multi-frequency clock synthesizer App 20060119402 - Thomsen; Axel ; et al.	2006-06-08
Configurable circuit structure having reduced susceptibility to interference when using at least two such circuits to perform like functions App 20060033546 - Huang; Yunteng ; et al.	2006-02-16
Method and apparatus for noise compensation in an oscillator circuit App 20050285687 - Zhang, Ligang ; et al.	2005-12-29
Dual phased-locked loop structure having configurable intermediate frequency and reduced susceptibility to interference Grant 6,970,030 - Huang , et al. November 29, 2	2005-11-29
Method and apparatus for adjusting the phase of an output of a phase-locked loop Grant 6,920,622 - Garlepp , et al. July 19, 2	2005-07-19
Digital expander apparatus and method for generating multiple analog control signals particularly useful for controlling an oscillator App 20050134491 - Huang, Yunteng ; et al.	2005-06-23
Digitally-synthesized loop filter method and circuit particularly useful for a phase locked loop App 20040263225 - Perrott, Michael H. ; et al.	2004-12-30
Digital expander apparatus and method for generating multiple analog control signals particularly useful for controlling a sub-varactor array of a voltage controlled oscillator Grant 6,825,785 - Huang , et al. November 30, 2	2004-11-30
Dual loop architecture useful for a programmable clock source and clock multiplier applications App 20040232995 - Thomsen, Axel ; et al.	2004-11-25
Integrated modem and line-isolation circuitry and associated method utilizing a DC termination pin to monitor line voltage Grant 6,771,696 - Tuttle , et al. August 3, 2	2004-08-03
Digitally-synthesized loop filter circuit particularly useful for a phase locked loop Grant 6,765,445 - Perrott , et al. July 20, 2	2004-07-20
Method and apparatus for switching between input clocks in a phase-locked loop Grant 6,741,109 - Huang , et al. May 25, 2	2004-05-25
Integrated modem and line-isolation circuitry and associated method powering caller ID circuitry with power provided across an isolation barrier Grant 6,724,891 - Huang , et al. April 20, 2	2004-04-20
Digitally-synthesized loop filter circuit particularly useful for a phase locked loop App 20040051590 - Perrott, Michael H. ; et al.	2004-03-18
Digital-to-analog converter circuit incorporating hybrid sigma-delta modulator circuit Grant 6,646,581 - Huang November 11, 2	2003-11-11
Digitally-synthesized loop filter circuit particularly useful for a phase locked loop Grant 6,630,868 - Perrott , et al. October 7, 2	2003-10-07
Digitally-synthesized loop filter circuit particularly useful for a phase locked loop App 20020089356 - Perrott, Michael H. ; et al.	2002-07-11
Track-and-hold circuit utilizing a negative of the input signal for tracking Grant 5,689,201 - Temes , et al. November 18, 1	1997-11-18

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.