loadpatents
Patent applications and USPTO patent grants for Hu; Chih-Chia.The latest application filed is for "semiconductor device and method of manufacturing".
Patent | Date |
---|---|
Semiconductor Device and Method of Manufacturing App 20220278063 - Hu; Chih-Chia ;   et al. | 2022-09-01 |
Through-Dielectric Vias for Direct Connection and Method Forming Same App 20220262766 - Chen; Ming-Fa ;   et al. | 2022-08-18 |
Multiple-mask multiple-exposure lithography and masks Grant 11,402,747 - Yu , et al. August 2, 2 | 2022-08-02 |
Semiconductor device and method of manufacturing Grant 11,335,656 - Hu , et al. May 17, 2 | 2022-05-17 |
Integrating Passive Devices in Package Structures App 20220139885 - Hu; Chih-Chia ;   et al. | 2022-05-05 |
Integrating passive devices in package structures Grant 11,239,205 - Hu , et al. February 1, 2 | 2022-02-01 |
Method Of Manufacturing Integrated Circuit Having Through-substrate Via App 20220012402 - Hu; Chih-Chia ;   et al. | 2022-01-13 |
Semiconductor Package And Manufacturing Method Thereof App 20210384147 - Chen; Hsien-Wei ;   et al. | 2021-12-09 |
Methods Of Forming Semiconductor Packages With Shortened Talking Path App 20210358821 - Chen; Hsien-Wei ;   et al. | 2021-11-18 |
Manufacturing Method Of Semiconductor Structure App 20210327789 - Hu; Chih-Chia ;   et al. | 2021-10-21 |
Semiconductor package and manufacturing method thereof Grant 11,107,779 - Chen , et al. August 31, 2 | 2021-08-31 |
Multiple-Mask Multiple-Exposure Lithography and Masks App 20210255540 - Yu; Peter ;   et al. | 2021-08-19 |
Semiconductor structure and manufacturing method thereof Grant 11,094,613 - Hu , et al. August 17, 2 | 2021-08-17 |
Semiconductor packages with shortened talking path Grant 11,088,041 - Chen , et al. August 10, 2 | 2021-08-10 |
Layout design of integrated circuit with through-substrate via Grant 11,080,455 - Hu , et al. August 3, 2 | 2021-08-03 |
Semiconductor Device and Method of Manufacture App 20210175154 - Hu; Chih-Chia ;   et al. | 2021-06-10 |
Mixing organic materials into hybrid packages Grant 11,031,354 - Chen , et al. June 8, 2 | 2021-06-08 |
Multiple-mask multiple-exposure lithography and masks Grant 10,996,558 - Yu , et al. May 4, 2 | 2021-05-04 |
Bonding Structure of Dies with Dangling Bonds App 20210118832 - Chen; Hsien-Wei ;   et al. | 2021-04-22 |
Semiconductor Package And Manufacturing Method Thereof App 20210118827 - Chen; Hsien-Wei ;   et al. | 2021-04-22 |
Semiconductor Packages Wiyh Shortened Talking Path App 20210082779 - Chen; Hsien-Wei ;   et al. | 2021-03-18 |
Mixing organic materials into hybrid packages Grant 10,937,743 - Chen , et al. March 2, 2 | 2021-03-02 |
Semiconductor Structure And Manufacturing Method Thereof App 20210057309 - Hu; Chih-Chia ;   et al. | 2021-02-25 |
Semiconductor device and method of manufacture Grant 10,930,580 - Hu , et al. February 23, 2 | 2021-02-23 |
Semiconductor Device and Method of Manufacturing App 20210005561 - Hu; Chih-Chia ;   et al. | 2021-01-07 |
Bonding structure of dies with dangling bonds Grant 10,861,808 - Chen , et al. December 8, 2 | 2020-12-08 |
Seal Ring for Hybrid-Bond App 20200373253 - Hu; Chih-Chia ;   et al. | 2020-11-26 |
Integrated Circuit Packages And Methods Of Forming The Same App 20200343218 - Hu; Chih-Chia ;   et al. | 2020-10-29 |
Semiconductor device and method of manufacturing Grant 10,784,219 - Hu , et al. Sept | 2020-09-22 |
Seal ring for hybrid-bond Grant 10,741,506 - Hu , et al. A | 2020-08-11 |
Bonding Structure of Dies with Dangling Bonds App 20200161263 - Chen; Hsien-Wei ;   et al. | 2020-05-21 |
Integrating Passive Devices in Package Structures App 20200152608 - Hu; Chih-Chia ;   et al. | 2020-05-14 |
Semiconductor Device and Method of Manufacture App 20200144160 - Hu; Chih-Chia ;   et al. | 2020-05-07 |
System and Method for Aligned Stitching App 20200118937 - Hu; Chih-Chia ;   et al. | 2020-04-16 |
Multiple-mask multiple-exposure lithography and masks Grant 10,620,530 - Yu , et al. | 2020-04-14 |
Multiple-Mask Multiple-Exposure Lithography and Masks App 20200050102 - Yu; Peter ;   et al. | 2020-02-13 |
Integrating passive devices in package structures Grant 10,535,636 - Hu , et al. Ja | 2020-01-14 |
Mixing Organic Materials into Hybrid Packages App 20200006254 - Chen; Ming-Fa ;   et al. | 2020-01-02 |
Semiconductor device and method of manufacture Grant 10,515,874 - Hu , et al. Dec | 2019-12-24 |
System and method for aligned stitching Grant 10,510,676 - Hu , et al. Dec | 2019-12-17 |
Mixing Organic Materials Into Hybrid Packages App 20190333871 - Chen; Ming-Fa ;   et al. | 2019-10-31 |
Seal Ring for Hybrid-Bond App 20190287932 - Hu; Chih-Chia ;   et al. | 2019-09-19 |
Seal ring for hybrid-bond Grant 10,312,201 - Hu , et al. | 2019-06-04 |
Seal Ring for Hybrid-Bond App 20190164914 - Hu; Chih-Chia ;   et al. | 2019-05-30 |
System and Method for Aligned Stitching App 20190164899 - Hu; Chih-Chia ;   et al. | 2019-05-30 |
Semiconductor Device and Method of Manufacturing App 20190164919 - Hu; Chih-Chia ;   et al. | 2019-05-30 |
Semiconductor Device And Method Of Manufacture App 20190164867 - Hu; Chih-Chia ;   et al. | 2019-05-30 |
Integrating Passive Devices in Package Structures App 20190148342 - Hu; Chih-Chia ;   et al. | 2019-05-16 |
Multiple-Mask Multiple-Exposure Lithography and Masks App 20190033706 - Yu; Peter ;   et al. | 2019-01-31 |
Interconnect structure and method Grant 10,157,867 - Chen , et al. Dec | 2018-12-18 |
uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.
While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.
All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.