HSU; Steven K.

Patent Applications and Registrations

Patent applications and USPTO patent grants for HSU; Steven K..The latest application filed is for "vectored flip-flop".

Company Profile

10.44.52

HSU; Steven K. - Lake Oswego OR
Hsu; Steven K. - Oswego OR
Hsu, Steven K. - Iake Oswego OR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Vectored Flip-flop App 20210119616 - HSU; Steven K. ; et al.	2021-04-22
Vectored flip-flop Grant 10,862,462 - Hsu , et al. December 8, 2	2020-12-08
Fused voltage level shifting latch Grant 10,756,736 - Hsu , et al. A	2020-08-25
Vectored Flip-flop App 20200144995 - HSU; Steven K. ; et al.	2020-05-07
Vectored flip-flop Grant 10,498,314 - Hsu , et al. De	2019-12-03
Low clock supply voltage interruptible sequential Grant 10,418,975 - Agarwal , et al. Sept	2019-09-17
Fused Voltage Level Shifting Latch App 20190280693 - Hsu; Steven K. ; et al.	2019-09-12
Time borrowing flip-flop with clock gating scan multiplexer Grant 10,382,019 - Agarwal , et al. A	2019-08-13
Shared keeper and footer flip-flop Grant 10,193,536 - Agarwal , et al. Ja	2019-01-29
Integrated clock gate circuit with embedded NOR Grant 10,177,765 - Hsu , et al. J	2019-01-08
Time Borrowing Flip-flop With Clock Gating Scan Multiplexer App 20180278243 - Agarwal; Amit ; et al.	2018-09-27
Aging tolerant register file Grant 10,049,724 - Agarwal , et al. August 14, 2	2018-08-14
Time borrowing flip-flop with clock gating scan multiplexer Grant 9,985,612 - Agarwal , et al. May 29, 2	2018-05-29
Shared Keeper And Footer Flip-flop App 20180145663 - Agarwal; Amit ; et al.	2018-05-24
Fused Voltage Level Shifting Latch App 20180091150 - Hsu; Steven K. ; et al.	2018-03-29
Low Clock Supply Voltage Interruptible Sequential App 20180069538 - Agarwal; Amit ; et al.	2018-03-08
Integrated Clock Gate Circuit With Embedded Nor App 20180062658 - Hsu; Steven K. ; et al.	2018-03-01
Time Borrowing Flip-flop With Clock Gating Scan Multiplexer App 20180062625 - Agarwal; Amit ; et al.	2018-03-01
Shared keeper and footer flip-flop Grant 9,859,876 - Agarwal , et al. January 2, 2	2018-01-02
Vectored Flip-flop App 20170359054 - HSU; Steven K. ; et al.	2017-12-14
Aging Tolerant Register File App 20170352408 - AGARWAL; Amit ; et al.	2017-12-07
Pattern Matching Circuit App 20170286420 - Agarwal; Amit ; et al.	2017-10-05
Area/energy Complex Regular Expression Pattern Matching Hardware Filter Based On Truncated Deterministic Finite Automata (dfa) App 20170193376 - Agarwal; Amit ; et al.	2017-07-06
Apparatus And Method For Low Power Fully-interruptible Latches And Master-slave Flip-flops App 20160322962 - HSU; Steven K. ; et al.	2016-11-03
Apparatus and method for low power fully-interruptible latches and master-slave flip-flops Grant 9,397,641 - Hsu , et al. July 19, 2	2016-07-19
Apparatus And Method For Low Power Fully-interruptible Latches And Master-slave Flip-flops App 20150249442 - HSU; Steven K. ; et al.	2015-09-03
Voltage level shift with interim-voltage-controlled contention interrupt Grant 9,059,715 - Hsu , et al. June 16, 2	2015-06-16
Apparatus and method for low power fully-interruptible latches and master-slave flip-flops Grant 9,035,686 - Hsu , et al. May 19, 2	2015-05-19
Apparatus And Method For Low Power Fully-interruptible Latches And Master-slave Flip-flops App 20150116019 - HSU; Steven K. ; et al.	2015-04-30
Single Instruction Multiple Data (simd) Reconfigurable Vector Register File And Permutation Unit App 20130339649 - HSU; Steven K. ; et al.	2013-12-19
Voltage Level Shift With Interim-voltage-controlled Contention Interrupt App 20130271199 - Hsu; Steven K. ; et al.	2013-10-17
Multiplier product generation based on encoded data from addressable location Grant 8,078,662 - Mathew , et al. December 13, 2	2011-12-13
Wide voltage range level shifter with symmetrical switching Grant 7,855,575 - Hsu , et al. December 21, 2	2010-12-21
Multiple voltage mode pre-charging and selective level shifting Grant 7,800,407 - Agarwal , et al. September 21, 2	2010-09-21
Ultra low voltage and minimum operating voltage tolerant register file Grant 7,606,062 - Hsu , et al. October 20, 2	2009-10-20
Ultra wide voltage range register file circuit using programmable triple stacking App 20090168557 - Agarwal; Amit ; et al.	2009-07-02
Ultra low voltage and minimum operating voltage tolerant register file App 20090168483 - Hsu; Steven K. ; et al.	2009-07-02
Apparatus effecting interface between differing signal levels App 20090085637 - Hsu; Steven K. ; et al.	2009-04-02
Flop repeater circuit Grant 7,379,491 - Hsu , et al. May 27, 2	2008-05-27
Memory with spatially encoded data storage Grant 7,372,763 - Hsu , et al. May 13, 2	2008-05-13
Multiplier product generation based on encoded data from addressable location App 20080098278 - Mathew; Sanu ; et al.	2008-04-24
Register file with a selectable keeper circuit Grant 7,362,621 - Chatterjee , et al. April 22, 2	2008-04-22
Voltage-level converter Grant 7,352,209 - Hsu , et al. April 1, 2	2008-04-01
Dynamic logic with adaptive keeper Grant 7,332,937 - Hsu , et al. February 19, 2	2008-02-19
Transition-encoder sense amplifier Grant 7,272,029 - Hsu , et al. September 18, 2	2007-09-18
Current mirror multi-channel leakage current monitor circuit and method Grant 7,250,783 - Hsu , et al. July 31, 2	2007-07-31
Dynamic logic with adaptive keeper App 20070146013 - Hsu; Steven K. ; et al.	2007-06-28
Memory with spatially encoded data storage App 20070147158 - Hsu; Steven K. ; et al.	2007-06-28
Low leakage and leakage tolerant stack free multi-ported register file Grant 7,209,395 - Hsu , et al. April 24, 2	2007-04-24
Hybrid CVSL pass-gate level-converting sequential circuit for multi-Vcc microprocessors Grant 7,132,856 - Hsu , et al. November 7, 2	2006-11-07
Multi read port bit line Grant 7,099,219 - Hsu , et al. August 29, 2	2006-08-29
Voltage-level converter App 20060186924 - Hsu; Steven K. ; et al.	2006-08-24
Transition-encoder sense amplifier App 20060140034 - Hsu; Steven K. ; et al.	2006-06-29
Multi Read Port Bit Line App 20060133183 - Hsu; Steven K. ; et al.	2006-06-22
Low-power search line circuit encoding technique for content addressable memories Grant 7,057,913 - Hsu , et al. June 6, 2	2006-06-06
Low leakage and leakage tolerant stack free multi-ported register file App 20060067136 - Hsu; Steven K. ; et al.	2006-03-30
Leakage tolerant register file Grant 7,016,239 - Chatterjee , et al. March 21, 2	2006-03-21
Hybrid CVSL pass-gate level-converting sequential circuit for multi-Vcc microprocessors App 20060044013 - Hsu; Steven K. ; et al.	2006-03-02
Robust variable keeper strength process-compensated dynamic circuit and method Grant 7,002,375 - Hsu , et al. February 21, 2	2006-02-21
Hybrid pass gate level converting dual supply sequential circuit App 20050285624 - Hsu, Steven K. ; et al.	2005-12-29
Low-power search line circuit encoding technique for content addressable memories App 20050219887 - Hsu, Steven K. ; et al.	2005-10-06
Flop repeater circuit App 20050141599 - Hsu, Steven K. ; et al.	2005-06-30
Current mirror multi-channel leakage current monitor circuit and method App 20050104612 - Hsu, Steven K. ; et al.	2005-05-19
Register file with a selectable keeper circuit App 20050068814 - Chatterjee, Bhaskar P. ; et al.	2005-03-31
Leakage tolerant register file App 20050068801 - Chatterjee, Bhaskar P. ; et al.	2005-03-31
Current mirror based multi-channel leakage current monitor circuit and method Grant 6,844,750 - Hsu , et al. January 18, 2	2005-01-18
Robust variable keeper strength process-compensated dynamic circuit and method App 20040189347 - Hsu, Steven K. ; et al.	2004-09-30
Current mirror based multi-channel leakage current monitor circuit and method App 20040189337 - Hsu, Steven K. ; et al.	2004-09-30
Active leakage control in single-ended full-swing caches Grant 6,781,892 - Hsu , et al. August 24, 2	2004-08-24
Low clock swing latch for dual-supply voltage design Grant 6,762,957 - Hsu , et al. July 13, 2	2004-07-13
Static random access memory with symmetric leakage-compensated bit line Grant 6,707,708 - Alvandpour , et al. March 16, 2	2004-03-16
Static Random Access Memory With Symmetric Leakage-compensated Bit Line App 20040047176 - Alvandpour, Atila ; et al.	2004-03-11
Multiple supply-voltage zipper CMOS logic family with low active leakage power dissipation Grant 6,693,461 - Hsu , et al. February 17, 2	2004-02-17
Register files and caches with digital sub-threshold leakage current calibration Grant 6,690,604 - Hsu , et al. February 10, 2	2004-02-10
Memory with reduced sub-threshold leakage current in dynamic bit lines of read ports Grant 6,643,199 - Tang , et al. November 4, 2	2003-11-04
Leakage-tolerant memory arrangements Grant 6,628,557 - Hsu , et al. September 30, 2	2003-09-30
Full-swing source-follower leakage tolerant dynamic logic Grant 6,628,143 - Hsu , et al. September 30, 2	2003-09-30
Pseudo-static single-ended cache cell Grant 6,618,316 - Hsu , et al. September 9, 2	2003-09-09
Pseudo-static Single-ended Cache Cell App 20030117880 - Hsu, Steven K. ; et al.	2003-06-26
Multiple supply-voltage zipper CMOS logic family with low active leakage power dissipation App 20030117179 - Hsu, Steven K. ; et al.	2003-06-26
Active leakage control in single-ended full-swing caches App 20030117859 - Hsu, Steven K. ; et al.	2003-06-26
Low clock swing latch for dual-supply voltage design App 20030117933 - Hsu, Steven K. ; et al.	2003-06-26
Register files and caches with digital sub-threshold leakage current calibration App 20030112678 - Hsu, Steven K. ; et al.	2003-06-19
Level converting latch Grant 6,563,357 - Hsu , et al. May 13, 2	2003-05-13
Leakage-tolerant memory arrangements App 20030063511 - Hsu, Steven K. ; et al.	2003-04-03
Full-swing source-follower leakage tolerant dynamic logic App 20030058000 - Hsu, Steven K. ; et al.	2003-03-27
Voltage-level converter App 20030001628 - Hsu, Steven K. ; et al.	2003-01-02
Double data rate dynamic logic Grant 6,441,648 - Hsu , et al. August 27, 2	2002-08-27