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Distributing multiplexing logic to remove multiplexor latency on the output path for variable clock cycle, delayed signals
Grant 9,319,040 - Dinh , et al. April 19, 2 | 2016-04-19 |
Managing out-of-order memory command execution from multiple queues while maintaining data coherency
Grant 9,317,434 - Dinkjian , et al. April 19, 2 | 2016-04-19 |
Managing Out-of-order Memory Command Execution From Multiple Queues While Maintaining Data Coherency
App 20150339230 - Dinkjian; Robert M. ; et al. | 2015-11-26 |
Managing out-of-order memory command execution from multiple queues while maintaining data coherency
Grant 9,164,908 - Dinkjian , et al. October 20, 2 | 2015-10-20 |
Managing Out-of-order Memory Command Execution From Multiple Queues While Maintaining Data Coherency
App 20150212941 - Dinkjian; Robert M. ; et al. | 2015-07-30 |
Managing out-of-order memory command execution from multiple queues while maintaining data coherency
Grant 9,026,763 - Dinkjian , et al. May 5, 2 | 2015-05-05 |
Managing out-of-order memory command execution from multiple queues while maintaining data coherency
Grant 9,021,228 - Dinkjian , et al. April 28, 2 | 2015-04-28 |
Distributing Multiplexing Logic To Remove Multiplexor Latency On The Output Path For Variable Clock Cycle, Delayed Signals
App 20150102846 - DINH; HUU N. ; et al. | 2015-04-16 |
Distributing multiplexing logic to remove multiplexor latency on the output path for variable clock cycle, delayed signals
Grant 8,994,424 - Dinh , et al. March 31, 2 | 2015-03-31 |
Distributing Multiplexing Logic To Remove Multiplexor Latency On The Output Path For Variable Clock Cycle, Delayed Signals
App 20140266356 - DINH; HUU N. ; et al. | 2014-09-18 |
Managing Out-of-order Memory Command Execution From Multiple Queues While Maintaining Data Coherency
App 20140223111 - Dinkjian; Robert M. ; et al. | 2014-08-07 |
Managing Out-of-order Memory Command Execution From Multiple Queues While Maintaining Data Coherency
App 20140223115 - Dinkjian; Robert M. ; et al. | 2014-08-07 |
Semiconductor layer forming method and structure
Grant 8,341,588 - Herzl , et al. December 25, 2 | 2012-12-25 |
Method And Device For Identifying And Implementing Flexible Logic Block Logic For Easy Engineering Changes
App 20120167022 - HERZL; Robert D. ; et al. | 2012-06-28 |
Method for identifying and implementing flexible logic block logic for easy engineering changes
Grant 8,181,148 - Herzl , et al. May 15, 2 | 2012-05-15 |
Semiconductor Layer Forming Method And Structure
App 20120083913 - Herzl; Robert D. ; et al. | 2012-04-05 |
Structure for identifying and implementing flexible logic block logic for easy engineering changes
Grant 8,141,028 - Herzl , et al. March 20, 2 | 2012-03-20 |
Minimizing impact of design changes for integrated circuit designs
Grant 8,060,845 - Herzl , et al. November 15, 2 | 2011-11-15 |
Method for Minimizing Impact of Design Changes For Integrated Circuit Designs
App 20100017773 - Herzl; Robert D. ; et al. | 2010-01-21 |
Design Structure For Identifying And Implementing Flexible Logic Block Logic For Easy Engineering Changes
App 20090183134 - Herzl; Robert D. ; et al. | 2009-07-16 |
Method and Device for Identifying and Implementing Flexible Logic Block Logic for Easy Engineering Changes
App 20090183135 - Herzl; Robert D. ; et al. | 2009-07-16 |
Asic Logic Library Of Flexible Logic Blocks And Method To Enable Engineering Change
App 20090045839 - HERZL; Robert D. ; et al. | 2009-02-19 |
Asic Logic Library Of Flexible Logic Blocks And Method To Enable Engineering Change
App 20090045836 - Herzl; Robert D. ; et al. | 2009-02-19 |
Data ordering translation between linear and interleaved domains at a bus interface
Grant 7,206,886 - Horton , et al. April 17, 2 | 2007-04-17 |
Data ordering translation between linear and interleaved domains at a bus interface
App 20060190660 - Horton; Robert S. ; et al. | 2006-08-24 |
Circuit and method for pipelined insertion
Grant 7,065,602 - Horton , et al. June 20, 2 | 2006-06-20 |
Circuit And Method For Pipelined Insertion
App 20050001280 - Horton, Robert S. ; et al. | 2005-01-06 |
Decision variable hardware logic and processing methods for graphics display system
Grant 5,434,967 - Tannenbaum , et al. July 18, 1 | 1995-07-18 |
Programmable multi-format display controller
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Concave polygon drawing method and processor for a computer graphics display system
Grant 5,303,340 - Gonzalez-Lopez , et al. April 12, 1 | 1994-04-12 |
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