| Patent | Date |
|---|
Link Evaluation For A Memory Device
App 20210193252 - Balb; Markus ; et al. | 2021-06-24 |
Memory Health Status Reporting
App 20210182141 - Balb; Markus ; et al. | 2021-06-17 |
Interrupt Signaling For A Memory Device
App 20210181990 - Balb; Markus ; et al. | 2021-06-17 |
Memory scheduler for managing maintenance operations in a resistive memory in response to a trigger condition
Grant 8,595,449 - Kund , et al. November 26, 2 | 2013-11-26 |
Integrated circuit with resistive memory cells and method for manufacturing same
Grant 8,072,792 - Hoenigschmid December 6, 2 | 2011-12-06 |
Method and apparatus for an integrated circuit with programmable memory cells, data system
Grant 8,064,243 - Ivanov , et al. November 22, 2 | 2011-11-22 |
Method of determining a memory state of a resistive memory cell and device measuring the memory state of a resistive memory cell
Grant 7,869,253 - Liaw , et al. January 11, 2 | 2011-01-11 |
FB DRAM memory with state memory
Grant 7,848,134 - Ivanov , et al. December 7, 2 | 2010-12-07 |
Memory Scheduler for Managing Internal Memory Operations
App 20100058018 - Kund; Michael ; et al. | 2010-03-04 |
Integrated circuit having a resistively switching memory and method
Grant 7,656,697 - Markert , et al. February 2, 2 | 2010-02-02 |
FB DRAM Memory with State Memory
App 20100020586 - Ivanov; Milena ; et al. | 2010-01-28 |
Memory And Method Of Evaluating A Memory State Of A Resistive Memory Cell
App 20090257264 - Hoenigschmid; Heinz | 2009-10-15 |
Memory circuit including a resistive memory element and method for operating such a memory circuit
Grant 7,599,209 - Hoenigschmid , et al. October 6, 2 | 2009-10-06 |
Integrated Circuit and Method of Improved Determining a Memory State of a Memory Cell
App 20090213643 - Angerbauer; Michael ; et al. | 2009-08-27 |
Integrated Circuit With Resistive Memory Cells And Method For Manufacturing Same
App 20090207646 - Hoenigschmid; Heinz | 2009-08-20 |
Resistive Memory Cell And Method For Operating Same
App 20090201714 - Hoenigschmid; Heinz | 2009-08-13 |
Method And Apparatus For An Integrated Circuit With Programmable Memory Cells, Data System
App 20090122586 - Ivanov; Milena ; et al. | 2009-05-14 |
Memory circuit, method for operating a memory circuit, memory device and method for producing a memory device
Grant 7,522,444 - Liaw , et al. April 21, 2 | 2009-04-21 |
Resistive memory device and method for writing to a resistive memory cell in a resistive memory device
Grant 7,518,902 - Hoenigschmid , et al. April 14, 2 | 2009-04-14 |
Memory device and method for operating such a memory device
Grant 7,447,053 - Liaw , et al. November 4, 2 | 2008-11-04 |
Integrated Circuit, Memory Module, Method of Operating an Integrated Circuit, Method of Fabricating an Integrated Circuit, Computer Program Product, and Computing System
App 20080263415 - Ruf; Bernhard ; et al. | 2008-10-23 |
Integrated Circuit, Memory Module, Method of Operating an Integrated Circuit, Method of Manufacturing an Integrated Circuit, and Computer Program Product
App 20080259676 - Ruf; Bernhard ; et al. | 2008-10-23 |
Integrated Circuit Having A Resistively Switching Memory And Method
App 20080239788 - Markert; Michael ; et al. | 2008-10-02 |
Method and memory circuit for operating a resistive memory cell
Grant 7,428,163 - Hoenigschmid , et al. September 23, 2 | 2008-09-23 |
Integrated Circuit Having A Resistive Memory
App 20080192529 - HOENIGSCHMID; Heinz ; et al. | 2008-08-14 |
Integrated Circuit, Memory Chip And Method Of Evaluating A Memory State Of A Resistive Memory Cell
App 20080170444 - Hoenigschmid; Heinz | 2008-07-17 |
Integrated circuit, memory chip and method of evaluating a memory state of a resistive memory cell
Grant 7,400,521 - Hoenigschmid July 15, 2 | 2008-07-15 |
Semiconductor component with through-vias
App 20080142928 - Sitaram; Arkalgud ; et al. | 2008-06-19 |
Methods for generating a reference voltage and for reading a memory cell and circuit configurations implementing the methods
Grant 7,342,819 - Liaw , et al. March 11, 2 | 2008-03-11 |
Intergrated Circuit Having Memory With Resistive Memory Cells
App 20080043513 - Hoenigschmid; Heinz ; et al. | 2008-02-21 |
Method of determining a memory state of a resistive memory cell and device measuring the memory state of a resistive memory cell
App 20080043521 - Liaw; Corvin ; et al. | 2008-02-21 |
Method And Memory Circuit For Operating A Resistive Memory Cell
App 20080019163 - Hoenigschmid; Heinz ; et al. | 2008-01-24 |
Memory circuit, method for operating a memory circuit, memory device and method for producing a memory device
App 20070211514 - Liaw; Corvin ; et al. | 2007-09-13 |
Memory device and method for operating such a memory device
App 20070211513 - Liaw; Corvin ; et al. | 2007-09-13 |
Methods for generating a reference voltage and for reading a memory cell and circuit configurations implementing the methods
App 20070206402 - Liaw; Corvin ; et al. | 2007-09-06 |
Memory circuit having a resistive memory cell and method for operating such a memory circuit
App 20070195580 - Hoenigschmid; Heinz ; et al. | 2007-08-23 |
CBRAM memory device and method for writing to a resistive memory cell in a CBRAM memory device
App 20070171697 - Hoenigschmid; Heinz ; et al. | 2007-07-26 |
Memory circuit including a resistive memory element and method for operating such a memory circuit
App 20070171698 - Hoenigschmid; Heinz ; et al. | 2007-07-26 |
Integrated memory circuit comprising a resistive memory element and a method for manufacturing such a memory circuit
App 20070047291 - Hoenigschmid; Heinz | 2007-03-01 |
Magnetic tunnel junction memory cell architecture
Grant 6,944,049 - Hoenigschmid , et al. September 13, 2 | 2005-09-13 |
Method for reading out or in a status from or to a ferroelectrical transistor of a memory cell and memory matrix
Grant 6,944,044 - Goebel , et al. September 13, 2 | 2005-09-13 |
Using FeRam/MRAM cells having a high degree of flexibility and compact construction and method of operating the memory device
Grant 6,898,106 - Hoenigschmid , et al. May 24, 2 | 2005-05-24 |
Fuse concept and method of operation
Grant 6,801,471 - Viehmann , et al. October 5, 2 | 2004-10-05 |
Integrated magnetoresistive semiconductor memory configuration
Grant 6,775,182 - Boehm , et al. August 10, 2 | 2004-08-10 |
Integrated magnetoresistive semiconductor memory and fabrication method for the memory
Grant 6,757,187 - Hoenigschmid June 29, 2 | 2004-06-29 |
Magnetoresistive memory (MRAM)
Grant 6,744,662 - Freitag , et al. June 1, 2 | 2004-06-01 |
Magnetic tunnel junction memory cell architecture
App 20040085810 - Hoenigschmid, Heinz ; et al. | 2004-05-06 |
Method for reading out or in a status from or to a ferroelectrical transistor of a memory cell and memory matrix
App 20040076057 - Goebel, Holger ; et al. | 2004-04-22 |
Error detection and correction method and apparatus in a magnetoresistive random access memory
Grant 6,704,230 - DeBrosse , et al. March 9, 2 | 2004-03-09 |
Memory device and method of operating the memory device
App 20040022117 - Hoenigschmid, Heinz ; et al. | 2004-02-05 |
Integrated magnetoresistive semiconductor memory configuration
App 20040013022 - Boehm, Thomas ; et al. | 2004-01-22 |
Magnetoresistive memory (MRAM)
App 20030206461 - Freitag, Martin ; et al. | 2003-11-06 |
Memory device
Grant 6,624,461 - Hoenigschmid , et al. September 23, 2 | 2003-09-23 |
Fuse concept and method of operation
App 20030156469 - Viehmann, Hans ; et al. | 2003-08-21 |
Serial MRAM device
Grant 6,490,194 - Hoenigschmid December 3, 2 | 2002-12-03 |
Method for fabricating a ferroelectric memory configuration
App 20020110935 - Bergmann, Renate ; et al. | 2002-08-15 |
Dummy feature reduction using optical proximity effect correction
Grant 6,426,269 - Haffner , et al. July 30, 2 | 2002-07-30 |
Non-orthogonal MRAM device
App 20020097601 - Hoenigschmid, Heinz | 2002-07-25 |
Serial MRAM device
App 20020097598 - Hoenigschmid, Heinz | 2002-07-25 |
Integrated magnetoresistive semiconductor memory and fabrication method for the memory
App 20020066002 - Hoenigschmid, Heinz | 2002-05-30 |
Sense Amplifier
App 20020000839 - MUELLER, GERHARD ; et al. | 2002-01-03 |
DRAM cell with transfer device extending along perimeter of trench storage capacitor
Grant 6,037,620 - Hoenigschmid , et al. March 14, 2 | 2000-03-14 |
Semiconductor memory having hierarchical bit line architecture with non-uniform local bit lines
Grant 5,966,315 - Muller , et al. October 12, 1 | 1999-10-12 |
Space-efficient semiconductor memory having hierarchical column select line architecture
Grant 5,923,605 - Mueller , et al. July 13, 1 | 1999-07-13 |
High density semiconductor memory having diagonal bit lines and dual word lines
Grant 5,864,496 - Mueller , et al. January 26, 1 | 1999-01-26 |
| 