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Patent applications and USPTO patent grants for HARGROVE; Michael John.The latest application filed is for "structures and methods integrating different fin device architectures".
Patent | Date |
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Structures And Methods Integrating Different Fin Device Architectures App 20150021709 - JACOB; Ajey P. ;   et al. | 2015-01-22 |
Shallow trench isolation structure for strained Si on SiGe Grant 7,183,175 - Koester , et al. February 27, 2 | 2007-02-27 |
Shallow trench isolation structure for strained Si on SiGe App 20050260825 - Koester, Steven John ;   et al. | 2005-11-24 |
Shallow trench isolation structure for strained Si on SiGe App 20040164373 - Koester, Steven John ;   et al. | 2004-08-26 |
Method for fabricating different gate oxide thickness within the same chip App 20030094660 - Crowder, Scott W. ;   et al. | 2003-05-22 |
Method for fabricating different gate oxide thicknesses within the same chip Grant 6,335,262 - Crowder , et al. January 1, 2 | 2002-01-01 |
Electrostatic discharge suppression circuit employing trench capacitor Grant 5,731,941 - Hargrove , et al. March 24, 1 | 1998-03-24 |
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