| Patent | Date |
|---|
Method and a device for allowing only a specific kind of hardware to correctly execute software
Grant 7,451,491 - Watanabe , et al. November 11, 2 | 2008-11-11 |
Method and a device for allowing only a specific kind of hardware to correctly execute software
App 20060070057 - Watanabe; Momoto ; et al. | 2006-03-30 |
Data processor
App 20040177231 - Nishimukai, Tadahiko ; et al. | 2004-09-09 |
Data processor capable of executing an instruction that makes a cache memory ineffective
Grant 6,779,102 - Nishimukai , et al. August 17, 2 | 2004-08-17 |
Clocked logic gate circuit
Grant 6,333,645 - Kanetani , et al. December 25, 2 | 2001-12-25 |
Data processor
App 20010032296 - Nishimukai, Tadahiko ; et al. | 2001-10-18 |
Multi-port memory and a data processor accessing the same
Grant 6,282,505 - Hanawa , et al. August 28, 2 | 2001-08-28 |
Clocked logic gate circuit
App 20010000296 - Kanetani, Kazuo ; et al. | 2001-04-19 |
Clocked logic gate circuit
App 20010000017 - Kanetani, Kazuo ; et al. | 2001-03-15 |
Branch operation system where instructions are queued until preparations is ascertained to be completed and branch distance is considered as an execution condition
Grant 6,052,776 - Miki , et al. April 18, 2 | 2000-04-18 |
Logic circuit having error detection function and processor including the logic circuit
Grant 5,881,078 - Hanawa , et al. March 9, 1 | 1999-03-09 |
Instruction branching method and a processor
Grant 5,878,254 - Shimada , et al. March 2, 1 | 1999-03-02 |
Purge control for ON-chip cache memory
Grant 5,809,274 - Nishimukai , et al. September 15, 1 | 1998-09-15 |
System with reservation instruction execution to store branch target address for use upon reaching the branch point
Grant 5,790,845 - Shimada , et al. August 4, 1 | 1998-08-04 |
Multiprocessor system having a processor invalidating operand cache when lock-accessing
Grant 5,740,401 - Hanawa , et al. April 14, 1 | 1998-04-14 |
Pass transistor type selector circuit and digital logic circuit
Grant 5,572,151 - Hanawa , et al. November 5, 1 | 1996-11-05 |
Integrated circuit data processor including a control pin for deactivating the driving of a data bus without deactivating that of an address bus
Grant 5,557,760 - Nishii , et al. September 17, 1 | 1996-09-17 |
Semiconductor memory device for performing parallel operations on hierarchical data lines
Grant 5,386,394 - Kawahara , et al. January 31, 1 | 1995-01-31 |
Data processor for selective simultaneous execution of a delay slot instruction and a second subsequent instruction the pair following a conditional branch instruction
Grant 5,381,531 - Hanawa , et al. January 10, 1 | 1995-01-10 |
Multiprocessor system having shared memory divided into a plurality of banks with access queues corresponding to each bank
Grant 5,375,215 - Hanawa , et al. December 20, 1 | 1994-12-20 |
Data processor having logical address memories and purge capabilities
Grant 5,349,672 - Nishimukai , et al. September 20, 1 | 1994-09-20 |
Data processor having two instruction registers connected in cascade and two instruction decoders
Grant 5,301,285 - Hanawa , et al. April 5, 1 | 1994-04-05 |
RISC system capable of simultaneously executing data interlocked shift and arithmetic/logic instructions in one clock cycle by bypassing register
Grant 5,269,007 - Hanawa , et al. December 7, 1 | 1993-12-07 |
Semiconductor associative memory device with current sensing
Grant 5,253,197 - Suzuki , et al. October 12, 1 | 1993-10-12 |
System using microprocessor address lines for coprocessor selection within a multi-coprocessor apparatus
Grant 5,125,095 - Nakazawa , et al. June 23, 1 | 1992-06-23 |
Single chip pipeline data processor using instruction and operand cache memories for parallel operation of instruction control and executions unit
Grant 4,989,140 - Nishimukai , et al. January 29, 1 | 1991-01-29 |
Microprocessor with a cache memory in which validity flags for first and second data areas are simultaneously readable
Grant 4,942,521 - Hanawa , et al. July 17, 1 | 1990-07-17 |
Content-addressable memory
Grant 4,894,799 - Hanawa , et al. January 16, 1 | 1990-01-16 |
Microprocessor for retrying data transfer
Grant 4,845,614 - Hanawa , et al. July 4, 1 | 1989-07-04 |
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