Hanafi; Hussein I

Patent Applications and Registrations

Patent applications and USPTO patent grants for Hanafi; Hussein I.The latest application filed is for "distributed semiconductor device methods, apparatus, and systems".

Company Profile

0.57.47

Hanafi; Hussein I - Basking Ridge NJ
Hanafi; Hussein I. - Basking Ridge NJ
Hanafi; Hussein I. - Goldens Bridge NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Distributed semiconductor device methods, apparatus, and systems Grant 8,872,324 - Farrar , et al. October 28, 2	2014-10-28
Distributed Semiconductor Device Methods, Apparatus, And Systems App 20140247638 - Farrar; Paul A. ; et al.	2014-09-04
Distributed semiconductor device methods, apparatus, and systems Grant 8,729,691 - Farrar , et al. May 20, 2	2014-05-20
Distributed Semiconductor Device Methods, Apparatus, And Systems App 20130299999 - Farrar; Paul A. ; et al.	2013-11-14
Distributed semiconductor device methods, apparatus, and systems Grant 8,498,171 - Farrar , et al. July 30, 2	2013-07-30
Memory in logic cell Grant 8,367,505 - Hanafi , et al. February 5, 2	2013-02-05
Memory cell storage node length Grant 8,324,676 - Hanafi December 4, 2	2012-12-04
Distributed Semiconductor Device Methods, Apparatus, And Systems App 20120302006 - Farrar; Paul A. ; et al.	2012-11-29
FIN field effect transistor Grant 8,242,555 - Hanafi August 14, 2	2012-08-14
Distributed semiconductor device methods, apparatus, and systems Grant 8,237,254 - Farrar , et al. August 7, 2	2012-08-07
Distributed Semiconductor Device Methods, Apparatus, And Systems App 20110222328 - Farrar; Paul A. ; et al.	2011-09-15
Fabrication of self-aligned gallium arsenide MOSFETS using damascene gate methods Grant 7,955,917 - Hanafi June 7, 2	2011-06-07
Back gated SRAM cell Grant 7,952,913 - Hanafi May 31, 2	2011-05-31
Distributed semiconductor device methods, apparatus, and systems Grant 7,952,184 - Farrar , et al. May 31, 2	2011-05-31
Method and apparatus for improving SRAM cell stability by using boosted word lines Grant 7,934,181 - Hanafi , et al. April 26, 2	2011-04-26
Memory cells Grant 7,928,503 - Hanafi April 19, 2	2011-04-19
Semiconductor devices Grant 7,875,529 - Forbes , et al. January 25, 2	2011-01-25
Memory Cells App 20100224930 - Hanafi; Hussein I.	2010-09-09
Non-volatile SRAM cell Grant 7,791,941 - Hanafi September 7, 2	2010-09-07
Back Gated Sram Cell App 20100188889 - Hanafi; Hussein I.	2010-07-29
Methods of forming memory cells Grant 7,745,295 - Hanafi June 29, 2	2010-06-29
Buried biasing wells in FETs (Field Effect Transistors) Grant 7,732,286 - Hanafi , et al. June 8, 2	2010-06-08
Fin Field Effect Transistor App 20100133617 - Hanafi; Hussein I.	2010-06-03
Damascene gate field effect transistor with an internal spacer structure Grant 7,723,196 - Guha , et al. May 25, 2	2010-05-25
Back gated SRAM cell Grant 7,710,765 - Hanafi May 4, 2	2010-05-04
Memory Cell Storage Node Length App 20100091577 - Hanafi; Hussein I.	2010-04-15
FIN field effect transistor Grant 7,674,669 - Hanafi March 9, 2	2010-03-09
Memory In Logic Cell App 20100055871 - Hanafi; Hussein I. ; et al.	2010-03-04
Nitride-encapsulated FET (NNCFET) Grant 7,648,880 - Chan , et al. January 19, 2	2010-01-19
Memory cell storage node length Grant 7,646,053 - Hanafi January 12, 2	2010-01-12
Memory in logic cell Grant 7,633,801 - Hanafi , et al. December 15, 2	2009-12-15
System, apparatus, and method to increase read and write stability of scaled SRAM memory cells Grant 7,613,031 - Hanafi , et al. November 3, 2	2009-11-03
Transistor structure having interconnect to side of diffusion and related method Grant 7,579,655 - Hanafi , et al. August 25, 2	2009-08-25
Memory Cells, And Methods Of Forming Memory Cells App 20090134444 - Hanafi; Hussein I.	2009-05-28
Damascene Gate Field Effect Transistor With An Internal Spacer Structure App 20090124057 - Guha; Supratik ; et al.	2009-05-14
Non-volatile Sram Cell App 20090109734 - Hanafi; Hussein I.	2009-04-30
Memory Cell Storage Node Length App 20090097310 - Hanafi; Hussein I.	2009-04-16
Semiconductor Devices App 20090090950 - Forbes; Leonard ; et al.	2009-04-09
Back Gated Sram Cell App 20090086528 - Hanafi; Hussein I.	2009-04-02
Method and apparatus for improving SRAM cell stability by using boosted word lines Grant 7,512,908 - Hanafi , et al. March 31, 2	2009-03-31
System, Apparatus, And Method To Increase Read And Write Stability Of Scaled Sram Memory Cells App 20090073782 - Hanafi; Hussein I. ; et al.	2009-03-19
Fin Field Effect Transistor App 20090065853 - Hanafi; Hussein I.	2009-03-12
Field effect transistor including damascene gate with an internal spacer structure Grant 7,479,684 - Guha , et al. January 20, 2	2009-01-20
Backgated FinFET having different oxide thicknesses Grant 7,476,946 - Bryant , et al. January 13, 2	2009-01-13
Fabrication of Self-Aligned Gallium Arsenide Mosfets Using Damascene Gate Methods App 20090011563 - Hanafi; Hussein I.	2009-01-08
Memory in logic cell App 20080316828 - Hanafi; Hussein I. ; et al.	2008-12-25
Nitride-encapsulated Fet (nncfet) App 20080286930 - Chan; Kevin K. ; et al.	2008-11-20
Nitride-encapsulated FET (NNCFET) Grant 7,442,612 - Chan , et al. October 28, 2	2008-10-28
Fabrication of self-aligned gallium arsenide MOSFETs using damascene gate methods Grant 7,435,636 - Hanafi October 14, 2	2008-10-14
Fabrication Of Self-aligned Gallium Arsenide Mosfets Using Damascene Gate Methods App 20080237663 - Hanafi; Hussein I.	2008-10-02
Method And Apparatus For Improving Sram Cell Stabilty By Using Boosted Word Lines App 20080225611 - Hanafi; Hussein I. ; et al.	2008-09-18
Enhanced mobility MOSFET devices App 20080079084 - Hanafi; Hussein I.	2008-04-03
Distributed semiconductor device methods, apparatus, and systems App 20080054489 - Farrar; Paul A. ; et al.	2008-03-06
BURIED BIASING WELLS IN FETs (Field Effect Transistors) App 20070293010 - Hanafi; Hussein I. ; et al.	2007-12-20
Method and apparatus for improving SRAM cell stability by using boosted word lines App 20070291528 - Hanafi; Hussein I. ; et al.	2007-12-20
Method to control device threshold of SOI MOSFET's Grant 7,273,785 - Dennard , et al. September 25, 2	2007-09-25
Buried biasing wells in FETS Grant 7,271,453 - Hanafi , et al. September 18, 2	2007-09-18
Strained silicon-channel MOSFET using a damascene gate process Grant 7,214,972 - Hanafi , et al. May 8, 2	2007-05-08
Backgated FinFET having different oxide thicknesses Grant 7,187,042 - Bryant , et al. March 6, 2	2007-03-06
Low resistance T-gate MOSFET device using a damascene gate process and an innovative oxide removal etch Grant 7,176,534 - Hanafi , et al. February 13, 2	2007-02-13
SOI wafers with 30-100 .ANG. buried oxide (BOX) created by wafer bonding using 30-100 .ANG. thin oxide as bonding layer Grant 7,166,521 - Boyd , et al. January 23, 2	2007-01-23
Nitride-encapsulated FET (NNCFET) App 20060252241 - Chan; Kevin K. ; et al.	2006-11-09
Threshold voltage roll-off compensation using back-gated MOSFET devices for system high-performance and low standby power Grant 7,089,515 - Hanafi , et al. August 8, 2	2006-08-08
Nitride-encapsulated FET (NNCFET) Grant 7,078,773 - Chan , et al. July 18, 2	2006-07-18
Backgated Finfet Having Different Oxide Thicknesses App 20060145195 - Bryant; Andres ; et al.	2006-07-06
Backgated FinFET having different oxide thicknesses Grant 7,056,773 - Bryant , et al. June 6, 2	2006-06-06
Damascene gate field effect transistor with an internal spacer structure App 20060091432 - Guha; Supratik ; et al.	2006-05-04
Transistor Structure Having Interconnect To Side Of Diffusion And Related Method App 20060094182 - Hanafi; Hussein I. ; et al.	2006-05-04
Method of making a device threshold control of front-gate silicon-on-insulator MOSFET using a self-aligned back-gate Grant 7,018,873 - Dennard , et al. March 28, 2	2006-03-28
Buried Biasing Wells In Fets App 20060060918 - Hanafi; Hussein I. ; et al.	2006-03-23
Backgated Finfet Having Diferent Oxide Thicknesses App 20050245009 - Bryant, Andres ; et al.	2005-11-03
Threshold voltage roll-off compensation using back-gated mosfet devices for system high-performance and low standby power App 20050204319 - Hanafi, Hussein I. ; et al.	2005-09-15
Strained silicon-channel MOSFET using a damascene gate process App 20050196926 - Hanafi, Hussein I. ; et al.	2005-09-08
Low resistance T-gate MOSFET device using a damascene gate process and an innovative oxide removal etch App 20050170659 - Hanafi, Hussein I. ; et al.	2005-08-04
Strained silicon-channel MOSFET using a damascene gate process Grant 6,916,694 - Hanafi , et al. July 12, 2	2005-07-12
Strained silicon-channel mosfet using a damascene gate process App 20050045972 - Hanafi, Hussein I. ; et al.	2005-03-03
Method to control device threshold of SOI MOSFET's App 20050048703 - Dennard, Robert H. ; et al.	2005-03-03
SOI wafers with 30-100 A buried oxide (BOX) created by wafer bonding using 30-100 A thin oxide as bonding layer App 20050042841 - Boyd, Diane C. ; et al.	2005-02-24
Device Threshold Control Of Front-gate Silicon-on-insulator Mosfet Using A Self-aligned Back-gate App 20050037582 - Dennard, Robert H. ; et al.	2005-02-17
Fully-depleted SOI MOSFETs with low source and drain resistance and minimal overlap capacitance using a recessed channel damascene gate process Grant 6,841,831 - Hanafi , et al. January 11, 2	2005-01-11
Damascene double-gate MOSFET with vertical channel regions Grant 6,835,614 - Hanafi , et al. December 28, 2	2004-12-28
SOI wafers with 30-100 .ANG. buried oxide (BOX) created by wafer bonding using 30-100 .ANG. thin oxide as bonding layer Grant 6,835,633 - Boyd , et al. December 28, 2	2004-12-28
Polysilicon back-gated SOI MOSFET for dynamic threshold voltage control Grant 6,815,296 - Dennard , et al. November 9, 2	2004-11-09
Method to control device threshold of SOI MOSFET's Grant 6,812,527 - Dennard , et al. November 2, 2	2004-11-02
Nitride-encapsulated FET (NNCFET) App 20040119115 - Chan, Kevin K. ; et al.	2004-06-24
Damascene double-gate MOSFET with vertical channel regions App 20040092067 - Hanafi, Hussein I. ; et al.	2004-05-13
Method to control device threshold of SOI MOSFET'S App 20040046207 - Dennard, Robert H. ; et al.	2004-03-11
SOI wafers with 30-100 A buried oxide (box) created by wafer bonding using 30-100 A thin oxide as bonding layer App 20040018699 - Boyd, Diane C. ; et al.	2004-01-29
Polysilicon back-gated SOI MOSFET for dynamic threshold voltage control Grant 6,664,598 - Dennard , et al. December 16, 2	2003-12-16
Method of forming a fully-depleted SOI ( silicon-on-insulator) MOSFET having a thinned channel region Grant 6,660,598 - Hanafi , et al. December 9, 2	2003-12-09
Low resistance T-gate MOSFET device using a damascene gate process and an innovative oxide removal etch Grant 6,656,824 - Hanafi , et al. December 2, 2	2003-12-02
Fully-depleted SOI MOSFETs with low source and drain resistance and minimal overlap capacitance using a recessed channel damascene gate process App 20030211681 - Hanafi, Hussein I. ; et al.	2003-11-13
Damascene double-gate MOSFET with vertical channel regions Grant 6,635,923 - Hanafi , et al. October 21, 2	2003-10-21
Method Of Forming A Fully-depleted Soi (silicon-on-insulator) Mosfet Having A Thinned Channel Region App 20030162358 - Hanafi, Hussein I. ; et al.	2003-08-28
Method of protecting semiconductor areas while exposing a gate Grant 6,562,713 - Belyansky , et al. May 13, 2	2003-05-13
Mosfet having a variable gate oxide thickness and a variable gate work function, and a method for making the same App 20020197810 - Hanafi, Hussein I. ; et al.	2002-12-26
Damascene double-gate MOSFET with vertical channel regions App 20020177263 - Hanafi, Hussein I. ; et al.	2002-11-28
Anisotropic nitride etch process with high selectivity to oxide and photoresist layers in a damascene etch scheme Grant 6,461,529 - Boyd , et al. October 8, 2	2002-10-08
Field effect transistors with improved implants and method for making such transistors Grant 6,143,635 - Boyd , et al. November 7, 2	2000-11-07
Method for making field effect transistors having sub-lithographic gates with vertical side walls Grant 6,040,214 - Boyd , et al. March 21, 2	2000-03-21
Silicon sidewall etching Grant 5,895,273 - Burns , et al. April 20, 1	1999-04-20
CMOS off-chip driver with reduced signal swing and reduced power supply disturbance Grant 5,206,544 - Chen , et al. April 27, 1	1993-04-27

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