| Patent | Date |
|---|
Devices, systems, and methods for sterilization, disinfection, sanitization and decontamination
Grant 11,344,643 - Golkowski , et al. May 31, 2 | 2022-05-31 |
Sterilization, disinfection, sanitization, decontamination, and therapeutic devices, systems, and methods
Grant 11,253,620 - Golkowski , et al. February 22, 2 | 2022-02-22 |
Method For Combining Analog Neural Net With Fpga Routing In A Monolithic Integrated Circuit
App 20210232658 - McCollum; John L. ; et al. | 2021-07-29 |
Apparatus and method for combining analog neural net with FPGA routing in a monolithic integrated circuit
Grant 11,023,559 - McCollum , et al. June 1, 2 | 2021-06-01 |
SRAM configuration cell for low-power field programmable gate arrays
Grant 10,971,216 - Greene , et al. April 6, 2 | 2021-04-06 |
FPGA logic cell with improved support for counters
Grant 10,936,286 - Greene , et al. March 2, 2 | 2021-03-02 |
Apparatus And Method For Combining Analog Neural Net With Fpga Routing In A Monolithic Integrated Circuit
App 20200242190 - McCollum; John L. ; et al. | 2020-07-30 |
Hybrid configuration memory cell
Grant 10,714,180 - McCollum , et al. | 2020-07-14 |
Fpga Logic Cell With Improved Support For Counters
App 20200150925 - Greene; Jonathan W. ; et al. | 2020-05-14 |
Efficient lookup table modules for user-programmable integrated circuits
Grant 10,523,208 - Hecht , et al. Dec | 2019-12-31 |
Hybrid Configuration Memory Cell
App 20190237139 - McCollum; John L. ; et al. | 2019-08-01 |
FPGA math block with dedicated connections
Grant 10,361,702 - Greene , et al. | 2019-07-23 |
FPGA Math Block with Dedicated Connections
App 20190190522 - Greene; Jonathan W. ; et al. | 2019-06-20 |
SRAM Configuration Cell for Low-Power Field Programmable Gate Arrays
App 20190172522 - Greene; Jonathan W. ; et al. | 2019-06-06 |
Efficient Lookup Table Modules for User-Programmable Integrated Circuits
App 20190165788 - Hecht; Volker ; et al. | 2019-05-30 |
Multi-state configuration RAM cell
Grant 9,514,804 - Greene December 6, 2 | 2016-12-06 |
Multi-state Configuration Ram Cell
App 20160180922 - Greene; Jonathan W. | 2016-06-23 |
On-chip probe circuit for detecting faults in an FPGA
Grant 9,000,807 - Greene , et al. April 7, 2 | 2015-04-07 |
On-Chip Probe Circuit for Detecting Faults in an FPGA
App 20140006887 - Greene; Jonathan W. ; et al. | 2014-01-02 |
On-Chip Probe Circuit for Detecting Faults in an FPGA
App 20140002136 - Greene; Jonathan W. ; et al. | 2014-01-02 |
Inverting flip-flop for use in field programmable gate arrays
Grant 7,932,745 - Hecht , et al. April 26, 2 | 2011-04-26 |
Staggered I/O groups for integrated circuits
Grant 7,932,744 - Greene , et al. April 26, 2 | 2011-04-26 |
Circuits and methods for testing FPGA routing switches
Grant 7,919,977 - Greene , et al. April 5, 2 | 2011-04-05 |
PLD providing soft wakeup logic
Grant 7,884,640 - Greene , et al. February 8, 2 | 2011-02-08 |
Inverting Flip-flop For Use In Field Programmable Gate Arrays
App 20100327906 - Hecht; Volker ; et al. | 2010-12-30 |
Circuits And Methods For Testing Fpga Routing Switches
App 20100315118 - Greene; Jonathan W. ; et al. | 2010-12-16 |
Inverting flip-flop for use in field programmable gate arrays
Grant 7,816,946 - Hecht , et al. October 19, 2 | 2010-10-19 |
Circuits and methods for testing FPGA routing switches
Grant 7,804,321 - Greene , et al. September 28, 2 | 2010-09-28 |
Pld Providing Soft Wakeup Logic
App 20100156457 - Greene; Jonathan W. ; et al. | 2010-06-24 |
Circuits And Methods For Testing Fpga Routing Switches
App 20100060311 - Greene; Jonathan W. ; et al. | 2010-03-11 |
Corner I/o Pad Density
App 20090051050 - Bakker; Gregory W. ; et al. | 2009-02-26 |
Apparatus and method for reducing leakage of unused buffers in an integrated circuit
Grant 7,463,061 - Greene , et al. December 9, 2 | 2008-12-09 |
Non-volatile memory cells in a field programmable gate array
Grant 7,430,137 - Greene , et al. September 30, 2 | 2008-09-30 |
Non-volatile Memory Cells In A Field Programmable Gate Array
App 20080025091 - Greene; Jonathan W. ; et al. | 2008-01-31 |
Logic module with configurable combinational and sequential blocks
Grant 5,781,033 - Galbraith , et al. July 14, 1 | 1998-07-14 |
Logic module for a programmable logic device
Grant 5,610,534 - Galbraith , et al. March 11, 1 | 1997-03-11 |
Logic module with configurable combinational and sequential blocks
Grant 5,440,245 - Galbraith , et al. * August 8, 1 | 1995-08-08 |
Logic module with configurable combinational and sequential blocks
Grant 5,198,705 - Galbraith , et al. * March 30, 1 | 1993-03-30 |
Programmable interconnect architecture
Grant 5,191,241 - McCollum , et al. March 2, 1 | 1993-03-02 |
Programmable interconnect architecture having interconnects disposed above function modules
Grant 5,132,571 - McCollum , et al. July 21, 1 | 1992-07-21 |
Circuits for preventing breakdown of low-voltage device inputs during high voltage antifuse programming
Grant 5,095,228 - Galbraith , et al. March 10, 1 | 1992-03-10 |
Logic module with configurable combinational and sequential blocks
Grant 5,055,718 - Galbraith , et al. October 8, 1 | 1991-10-08 |
Input/output module with latches
Grant 5,017,813 - Galbraith , et al. May 21, 1 | 1991-05-21 |
Universal logic module comprising multiplexers
Grant 4,910,417 - El Gamal , et al. March 20, 1 | 1990-03-20 |
Programmable interconnect architecture
Grant 4,873,459 - El Gamal , et al. * October 10, 1 | 1989-10-10 |
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