Giles; Martin D.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Giles; Martin D..The latest application filed is for "silicon and silicon germanium nanowire structures".

Company Profile

7.32.40

Giles; Martin D. - Portland OR
Giles; Martin D - Portland OR
Giles; Martin D. - Hillsboro OR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Silicon And Silicon Germanium Nanowire Structures App 20210226006 - Kuhn; Kelin J. ; et al.	2021-07-22
Fins For Metal Oxide Semiconductor Device Structures App 20210210514 - GILES; Martin D. ; et al.	2021-07-08
Silicon and silicon germanium nanowire structures Grant 10,991,799 - Kuhn , et al. April 27, 2	2021-04-27
Fins for metal oxide semiconductor device structures Grant 10,985,184 - Giles , et al. April 20, 2	2021-04-20
Semiconductor device having metallic source and drain regions Grant 10,847,653 - Giles , et al. November 24, 2	2020-11-24
Silicon And Silicon Germanium Nanowire Structures App 20200227520 - KUHN; Kelin J. ; et al.	2020-07-16
Nanowire Structures Having Non-discrete Source And Drain Regions App 20200152797 - CEA; Stephen M. ; et al.	2020-05-14
Silicon and silicon germanium nanowire structures Grant 10,636,871 - Kuhn , et al.	2020-04-28
Nanowire structures having non-discrete source and drain regions Grant 10,580,899 - Cea , et al.	2020-03-03
Methods For Forming Fins For Metal Oxide Semiconductor Device Structures App 20170200744 - Giles; Martin D. ; et al.	2017-07-13
Non-planar device having uniaxially strained semiconductor body and method of making same Grant 9,680,013 - Cea , et al. June 13, 2	2017-06-13
Nanowire Structures Having Non-discrete Source And Drain Regions App 20170141239 - CEA; Stephen M. ; et al.	2017-05-18
Silicon And Silicon Germanium Nanowire Structures App 20170133462 - KUHN; Kelin J. ; et al.	2017-05-11
Semiconductor Device Having Metallic Source And Drain Regions App 20170125591 - GILES; Martin D. ; et al.	2017-05-04
Methods for forming fins for metal oxide semiconductor device structures Grant 9,607,987 - Giles , et al. March 28, 2	2017-03-28
Silicon and silicon germanium nanowire structures Grant 9,595,581 - Kuhn , et al. March 14, 2	2017-03-14
Semiconductor device having metallic source and drain regions Grant 9,583,487 - Giles , et al. February 28, 2	2017-02-28
Nanowire structures having non-discrete source and drain regions Grant 9,564,522 - Cea , et al. February 7, 2	2017-02-07
Nanowire Structures Having Non-discrete Source And Drain Regions App 20150325648 - CEA; Stephen M. ; et al.	2015-11-12
Silicon And Silicon Germanium Nanowire Structures App 20150303258 - KUHN; Kelin J. ; et al.	2015-10-22
Silicon and silicon germanium nanowire structures Grant 9,129,829 - Kuhn , et al. September 8, 2	2015-09-08
Nanowire structures having non-discrete source and drain regions Grant 9,087,863 - Cea , et al. July 21, 2	2015-07-21
Silicon And Silicon Germanium Nanowire Structures App 20140326952 - KUHN; Kelin J. ; et al.	2014-11-06
Silicon and silicon germanium nanowire structures Grant 8,753,942 - Kuhn , et al. June 17, 2	2014-06-17
Methods For Forming Fins For Metal Oxide Semiconductor Device Structures App 20140151814 - Giles; Martin D. ; et al.	2014-06-05
Non-Planar Device Having Uniaxially Strained Semiconductor Body and Method of Making Same App 20140070273 - Cea; Stephen M. ; et al.	2014-03-13
Nanowire Structures Having Non-discrete Source And Drain Regions App 20140042386 - Cea; Stephen M. ; et al.	2014-02-13
Semiconductor Device Having Metallic Source And Drain Regions App 20140035059 - Giles; Martin D. ; et al.	2014-02-06
Non-planar device having uniaxially strained semiconductor body and method of making same Grant 8,558,279 - Cea , et al. October 15, 2	2013-10-15
Methods and apparatus to reduce layout based strain variations in non-planar transistor structures Grant 8,487,348 - Cea , et al. July 16, 2	2013-07-16
Methods And Apparatus To Reduce Layout Based Strain Variations In Non-planar Transistor Structures App 20120305990 - Cea; Stephen M ; et al.	2012-12-06
Methods and apparatus to reduce layout based strain variations in non-planar transistor structures Grant 8,269,283 - Cea , et al. September 18, 2	2012-09-18
Silicon And Silicon Germanium Nanowire Structures App 20120138886 - Kuhn; Kelin J. ; et al.	2012-06-07
Non-planar device having uniaxially strained semiconductor body and method of making same App 20120074464 - Cea; Stephen M. ; et al.	2012-03-29
Methods and apparatus to reduce layout based strain variations in non-planar transistor structures App 20110147847 - Cea; Stephen M. ; et al.	2011-06-23
Multiple oxide thickness for a semiconductor device Grant 7,719,057 - Giles , et al. May 18, 2	2010-05-18
Transistor performance enhancement using engineered strains Grant 7,679,145 - He , et al. March 16, 2	2010-03-16
Systems And Methods To Increase Uniaxial Compressive Stress In Tri-Gate Transistors App 20090152589 - Rakshit; Titash ; et al.	2009-06-18
Method for manufacturing a silicon-on-insulator (SOI) wafer with an etch stop layer App 20090096025 - Tolchinsky; Peter G. ; et al.	2009-04-16
Complementary metal oxide semiconductor integrated circuit using uniaxial compressive stress and biaxial compressive stress App 20090075445 - Kavalieros; Jack ; et al.	2009-03-19
Multiple Oxide Thickness For A Semiconductor Device App 20090032872 - Giles; Martin D. ; et al.	2009-02-05
Method for manufacturing a silicon-on-insulator (SOI) wafer with an etch stop layer Grant 7,473,614 - Tolchinsky , et al. January 6, 2	2009-01-06
Complementary metal oxide semiconductor integrated circuit using uniaxial compressive stress and biaxial compressive stress Grant 7,470,972 - Kavalieros , et al. December 30, 2	2008-12-30
Gate-induced strain for MOS performance improvement Grant 7,452,764 - Hoffmann , et al. November 18, 2	2008-11-18
Insulation layer for silicon-on-insulator wafer App 20070063279 - Tolchinsky; Peter G. ; et al.	2007-03-22
Methods of forming stress enhanced PMOS structures App 20060226453 - Wang; Everett X. ; et al.	2006-10-12
Complementary metal oxide semiconductor integrated circuit using uniaxial compressive stress and biaxial compressive stress App 20060205167 - Kavalieros; Jack ; et al.	2006-09-14
Method and structure to decrease area capacitance within a buried insulator device Grant 7,091,560 - Stettler , et al. August 15, 2	2006-08-15
Method for manufacturing a silicon-on-Insulator (SOI) wafer with an etch stop layer App 20060102988 - Tolchinsky; Peter G. ; et al.	2006-05-18
Transistor performance enhancement using engineered strains App 20060043579 - He; Jun ; et al.	2006-03-02
Gate-induced strain for MOS performance improvement Grant 6,982,433 - Hoffman , et al. January 3, 2	2006-01-03
Gate-induced strain for MOS performance improvement App 20050167652 - Hoffmann, Thomas ; et al.	2005-08-04
Method and structure to decrease area capacitance within a buried insulator device App 20050130379 - Stettler, Mark A. ; et al.	2005-06-16
Method to form a structure to decrease area capacitance within a buried insulator device Grant 6,867,104 - Stettler , et al. March 15, 2	2005-03-15
Gate-induced strain for MOS performance improvement App 20040253776 - Hoffmann, Thomas ; et al.	2004-12-16
Method and structure to decrease area capacitance within a buried insulator device App 20040124467 - Stettler, Mark A. ; et al.	2004-07-01

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