Gerowitz; Robert Glen

Patent Applications and Registrations

Patent applications and USPTO patent grants for Gerowitz; Robert Glen.The latest application filed is for "indeterminate state logic insertion".

Company Profile

0.7.6

Gerowitz; Robert Glen - Raleigh NC

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Indeterminate state logic insertion Grant 8,136,059 - Gerowitz , et al. March 13, 2	2012-03-13
Validating manufacturing test rules pertaining to an electronic component Grant 8,135,571 - Cassani , et al. March 13, 2	2012-03-13
Automatically creating manufacturing test rules pertaining to an electronic component Grant 8,065,641 - Gerowitz , et al. November 22, 2	2011-11-22
Scanned memory testing of multi-port memory arrays Grant 7,865,786 - Gerowitz , et al. January 4, 2	2011-01-04
Indeterminate State Logic Insertion App 20100107129 - Gerowitz; Robert Glen ; et al.	2010-04-29
Automatically Creating Manufacturing Test Rules Pertaining To An Electronic Component App 20100057425 - Gerowitz; Robert Glen ; et al.	2010-03-04
Automated Method for Validating Manufacturing Test Rules Pertaining to an Electronic Component App 20100042396 - Cassani; Carisa Anne ; et al.	2010-02-18
Scanned Memory Testing Of Multi-port Memory Arrays App 20090116323 - Gerowitz; Robert Glen ; et al.	2009-05-07
Scanned memory testing of multi-port memory arrays Grant 7,506,225 - Gerowitz , et al. March 17, 2	2009-03-17
Scanned memory testing of multi-port memory arrays App 20070086253 - Gerowitz; Robert Glen ; et al.	2007-04-19
Scan chain connectivity Grant 6,681,356 - Gerowitz , et al. January 20, 2	2004-01-20
Integrated Circuit With In Situ Circuit Arrangement For Testing Integrity Of Differential Receiver Inputs App 20020030505 - BOETTLER, JEFFREY PAUL ; et al.	2002-03-14
High speed parallel/serial link for data communication Grant 6,222,380 - Gerowitz , et al. April 24, 2	2001-04-24

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