Flachowsky; Stefan

Patent Applications and Registrations

Patent applications and USPTO patent grants for Flachowsky; Stefan.The latest application filed is for "device including a floating gate electrode and a layer offerroelectric material and method for the formation thereof".

Company Profile

1.153.199

Flachowsky; Stefan - Dresden DE

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Device including a floating gate electrode and a layer of ferroelectric material and method for the formation thereof Grant 11,424,253 - Mueller , et al. August 23, 2	2022-08-23
Three-dimensional transistor with improved channel mobility Grant 10,340,380 - Flachowsky , et al.	2019-07-02
NVM device in SOI technology and method of fabricating an according device Grant 10,084,057 - Beyer , et al. September 25, 2	2018-09-25
Ferroelectric FinFET Grant 10,056,376 - Flachowsky , et al. August 21, 2	2018-08-21
Device Including A Floating Gate Electrode And A Layer Offerroelectric Material And Method For The Formation Thereof App 20180151577 - Mueller; Johannes ; et al.	2018-05-31
Semiconductor-on-insulator wafer, semiconductor structure including a transistor, and methods for the formation and operation thereof Grant 9,966,466 - Flachowsky , et al. May 8, 2	2018-05-08
Nvm Device In Soi Technology And Method Of Fabricating An According Device App 20180053832 - Beyer; Sven ; et al.	2018-02-22
Semiconductor structure including a first transistor and a second transistor Grant 9,899,417 - Flachowsky , et al. February 20, 2	2018-02-20
Semiconductor-on-insulator Wafer, Semiconductor Structure Including A Transistor, And Methods For The Formation And Operation Thereof App 20180040731 - Flachowsky; Stefan ; et al.	2018-02-08
Method of forming a device including a floating gate electrode and a layer of ferroelectric material Grant 9,865,608 - Mueller , et al. January 9, 2	2018-01-09
Semiconductor Device And Method App 20170338350 - Flachowsky; Stefan ; et al.	2017-11-23
Semiconductor Structure Including A First Transistor And A Second Transistor App 20170200743 - Flachowsky; Stefan ; et al.	2017-07-13
Method including a formation of a transistor and semiconductor structure including a first transistor and a second transistor Grant 9,685,457 - Flachowsky , et al. June 20, 2	2017-06-20
Temperature independent resistor Grant 9,583,240 - Flachowsky , et al. February 28, 2	2017-02-28
Method Including A Formation Of A Transistor And Semiconductor Structure Including A First Transistor And A Second Transistor App 20170025442 - Flachowsky; Stefan ; et al.	2017-01-26
Ferroelectric Finfet App 20160358915 - Flachowsky; Stefan ; et al.	2016-12-08
E-fuse design for high-K metal-gate technology Grant 9,515,155 - Boschke , et al. December 6, 2	2016-12-06
Canyon gate transistor and methods for its fabrication Grant 9,490,361 - Flachowsky , et al. November 8, 2	2016-11-08
Methods of making transistor devices with elevated source/drain regions to accommodate consumption during metal silicide formation process Grant 9,490,344 - Flachowsky , et al. November 8, 2	2016-11-08
Methods of forming a nanowire transistor device Grant 9,484,407 - Baldauf , et al. November 1, 2	2016-11-01
Contact Geometry Having A Gate Silicon Length Decoupled From A Transistor Length App 20160315162 - Richter; Ralf ; et al.	2016-10-27
Method of forming a semiconductor device structure and such a semiconductor device structure Grant 9,472,642 - Hoentschel , et al. October 18, 2	2016-10-18
Densely Packed Transistor Devices App 20160300928 - Hoentschel; Jan ; et al.	2016-10-13
Ferroelectric FinFET Grant 9,449,972 - Flachowsky , et al. September 20, 2	2016-09-20
Three-dimensional Transistor With Improved Channel Mobility App 20160268426 - Flachowsky; Stefan ; et al.	2016-09-15
Method Of Forming A Device Including A Floating Gate Electrode And A Layer Of Ferroelectric Material App 20160268271 - Mueller; Johannes ; et al.	2016-09-15
Transistor including a gate electrode extending all around one or more channel regions Grant 9,443,945 - Flachowsky , et al. September 13, 2	2016-09-13
Ferroelectric Finfet App 20160260714 - Flachowsky; Stefan ; et al.	2016-09-08
Integrated Circuits With Fets Having Nanowires And Methods Of Manufacturing The Same App 20160254382 - Hoentschel; Jan ; et al.	2016-09-01
Simplified gate-first HKMG manufacturing flow Grant 9,431,508 - Flachowsky , et al. August 30, 2	2016-08-30
Transistor devices with high-k insulation layers Grant 9,425,194 - Gerhardt , et al. August 23, 2	2016-08-23
Integrated circuits with fets having nanowires and methods of manufacturing the same Grant 9,425,318 - Hoentschel , et al. August 23, 2	2016-08-23
Methods Of Forming A Complex Gaa Fet Device At Advanced Technology Nodes App 20160233318 - Richter; Ralf ; et al.	2016-08-11
Contact geometry having a gate silicon length decoupled from a transistor length Grant 9,412,859 - Richter , et al. August 9, 2	2016-08-09
Methods of forming a complex GAA FET device at advanced technology nodes Grant 9,412,848 - Richter , et al. August 9, 2	2016-08-09
Enhancing transistor performance and reliability by incorporating deuterium into a strained capping layer Grant 9,401,423 - Javorka , et al. July 26, 2	2016-07-26
Devices With Fully And Partially Silicided Gate Structures In Gate First Cmos Technologies App 20160204217 - Javorka; Peter ; et al.	2016-07-14
Multi-gate FETs having corrugated semiconductor stacks and method of forming the same Grant 9,391,176 - Flachowsky , et al. July 12, 2	2016-07-12
FINFET doping method with curvilnear trajectory implantation beam path Grant 9,373,509 - Richter , et al. June 21, 2	2016-06-21
Three-dimensional transistor with improved channel mobility Grant 9,373,720 - Flachowsky , et al. June 21, 2	2016-06-21
Highly conformal extension doping in advanced multi-gate devices Grant 9,368,513 - Zschatzsch , et al. June 14, 2	2016-06-14
Method Of Forming A Semiconductor Device Structure And Such A Semiconductor Device Structure App 20160163815 - Hoentschel; Jan ; et al.	2016-06-09
Selective FuSi gate formation in gate first CMOS technologies Grant 9,349,734 - Javorka , et al. May 24, 2	2016-05-24
Meander Resistor App 20160141393 - Hoentschel; Jan ; et al.	2016-05-19
Efficient main spacer pull back process for advanced VLSI CMOS technologies Grant 9,343,374 - Hoentschel , et al. May 17, 2	2016-05-17
Efficient Main Spacer Pull Back Process For Advanced Vlsi Cmos Technologies App 20160126146 - HOENTSCHEL; Jan ; et al.	2016-05-05
Multi-gate Fets Having Corrugated Semiconductor Stacks And Method Of Forming The Same App 20160118483 - Flachowsky; Stefan ; et al.	2016-04-28
Forming transistors without spacers and resulting devices Grant 9,324,831 - Zschatzsch , et al. April 26, 2	2016-04-26
Finfet Doping Method With Curvilinear Trajectory Implantation Beam Path App 20160071731 - RICHTER; Ralf ; et al.	2016-03-10
Highly Conformal Extension Doping In Advanced Multi-gate Devices App 20160071886 - Zschatzsch; Gerd ; et al.	2016-03-10
Method Including A Replacement Of A Dummy Gate Structure With A Gate Structure Including A Ferroelectric Material App 20160071947 - Wiatr; Maciej ; et al.	2016-03-10
Methods Of Making Integrated Circuits And Components Thereof App 20160064515 - Zschatzsch; Gerd ; et al.	2016-03-03
SELECTIVE FuSi GATE FORMATION IN GATE FIRST CMOS TECHNOLOGIES App 20160064382 - Javorka; Peter ; et al.	2016-03-03
Temperature Independent Resistor App 20160064123 - Flachowsky; Stefan ; et al.	2016-03-03
Device Including A Floating Gate Electrode And A Layer Of Ferroelectric Material And Method For The Formation Thereof App 20160064510 - Mueller; Johannes ; et al.	2016-03-03
Device including a transistor having a stressed channel region and method for the formation thereof Grant 9,269,714 - Flachowsky , et al. February 23, 2	2016-02-23
Forming Transistors Without Spacers And Resulting Devices App 20160049494 - ZSCHATZSCH; Gerd ; et al.	2016-02-18
Methods of making integrated circuits and components thereof Grant 9,257,530 - Zschatzsch , et al. February 9, 2	2016-02-09
Forming A Vertical Capacitor And Resulting Device App 20160035818 - HOENTSCHEL; Jan ; et al.	2016-02-04
Sandwich silicidation for fully silicided gate formation Grant 9,236,440 - Boschke , et al. January 12, 2	2016-01-12
Methods for fabricating integrated circuits with polycrystalline silicon resistor structures using a replacment gate process flow, and the integrated circuits fabricated thereby Grant 9,231,045 - Hoentschel , et al. January 5, 2	2016-01-05
Methods of removing gate cap layers in CMOS applications Grant 9,224,655 - Javorka , et al. December 29, 2	2015-12-29
Replacement gate FinFET structures with high mobility channel Grant 9,224,840 - Flachowsky , et al. December 29, 2	2015-12-29
Integrated Circuits Having Improved Contacts And Methods For Fabricating Same App 20150372100 - Zschatzsch; Gerd ; et al.	2015-12-24
Fully silicided gate formed according to the gate-first HKMG approach Grant 9,218,976 - Flachowsky , et al. December 22, 2	2015-12-22
Technique for manufacturing semiconductor devices comprising transistors with different threshold voltages Grant 9,219,013 - Gerhardt , et al. December 22, 2	2015-12-22
Transistor with embedded stress-inducing layers Grant 9,214,396 - Flachowsky , et al. December 15, 2	2015-12-15
Highly conformal extension doping in advanced multi-gate devices Grant 9,209,274 - Zschaetzsch , et al. December 8, 2	2015-12-08
Transistor With Embedded Stress-inducing Layers App 20150348849 - Flachowsky; Stefan ; et al.	2015-12-03
Integrated Circuit Including A Semiconductor-on-insulator Region And A Bulk Region App 20150340380 - Flachowsky; Stefan ; et al.	2015-11-26
Transistor Devices With High-k Insulation Layers App 20150340362 - Gerhardt; Martin ; et al.	2015-11-26
Meander Resistor App 20150333057 - Hoentschel; Jan ; et al.	2015-11-19
Integrated Circuits And Methods For Operating Integrated Circuits With Non-volatile Memory App 20150333080 - Mikalo; Ricardo Pablo ; et al.	2015-11-19
Method for a uniform compressive strain layer and device thereof Grant 9,190,516 - Yan , et al. November 17, 2	2015-11-17
Semiconductor structure including a semiconductor-on-insulator region and a bulk region, and method for the formation thereof Grant 9,165,840 - Flachowsky , et al. October 20, 2	2015-10-20
Methods of forming transistor devices with high-k insulation layers and the resulting devices Grant 9,136,177 - Gerhardt , et al. September 15, 2	2015-09-15
Integrated inductor Grant 9,129,843 - Flachowsky , et al. September 8, 2	2015-09-08
Method For A Uniform Compressive Strain Layer And Device Thereof App 20150243787 - YAN; Ran ; et al.	2015-08-27
Low Leakage Pmos Transistor App 20150214116 - Javorka; Peter ; et al.	2015-07-30
Ultrathin Body Fully Depleted Silicon-on-insulator Integrated Circuits And Methods For Fabricating Same App 20150214121 - Illgen; Ralf ; et al.	2015-07-30
Methods of forming semiconductor devices with embedded semiconductor material as source/drain regions using a reduced number of spacers Grant 9,093,554 - Flachowsky , et al. July 28, 2	2015-07-28
Integrated circuits and methods for operating integrated circuits with non-volatile memory Grant 9,087,587 - Mikalo , et al. July 21, 2	2015-07-21
Field Effect Transistors For High-performance And Low-power Applications App 20150200270 - Flachowsky; Stefan ; et al.	2015-07-16
SOI semiconductor device comprising a substrate diode and a film diode formed by using a common well implantation mask Grant 9,082,662 - Scheiper , et al. July 14, 2	2015-07-14
Integrated circuits and methods for fabricating integrated circuits with gate electrode structure protection Grant 9,082,876 - Javorka , et al. July 14, 2	2015-07-14
Spacer stress relaxation Grant 9,076,815 - Richter , et al. July 7, 2	2015-07-07
Novel E-fuse Design For High-k Metal-gate Technology App 20150179753 - Boschke; Roman ; et al.	2015-06-25
Semiconductor Device Including A Transistor Having A Low Doped Drift Region And Method For The Formation Thereof App 20150162439 - Hoentschel; Jan ; et al.	2015-06-11
Sandwich Silicidation For Fully Silicided Gate Formation App 20150162414 - Boschke; Roman ; et al.	2015-06-11
Method for forming a semiconductor device and semiconductor device structures Grant 9,054,044 - Flachowsky , et al. June 9, 2	2015-06-09
Methods for fabricating integrated circuits having gate to active and gate to gate interconnects Grant 9,040,403 - Scheiper , et al. May 26, 2	2015-05-26
Transistor Including A Gate Electrode Extending All Around One Or More Channel Regions App 20150129966 - Flachowsky; Stefan ; et al.	2015-05-14
Nanowire Transistor Device App 20150129964 - Baldauf; Tim ; et al.	2015-05-14
Integrated circuits and methods for fabricating integrated circuits with improved silicide contacts Grant 9,029,214 - Hoentschel , et al. May 12, 2	2015-05-12
Ultrathin body fully depleted silicon-on-insulator integrated circuits and methods for fabricating same Grant 9,023,713 - Illgen , et al. May 5, 2	2015-05-05
Semiconductor Structure Including A Semiconductor-on-insulator Region And A Bulk Region, And Method For The Formation Thereof App 20150111349 - Flachowsky; Stefan ; et al.	2015-04-23
Channel SiGe removal from PFET source/drain region for improved silicide formation in HKMG technologies without embedded SiGe Grant 9,012,956 - Flachowsky , et al. April 21, 2	2015-04-21
In situ doping and diffusionless annealing of embedded stressor regions in PMOS and NMOS devices Grant 9,012,277 - Flachowsky , et al. April 21, 2	2015-04-21
Three-dimensional Transistor With Improved Channel Mobility App 20150102426 - Flachowsky; Stefan ; et al.	2015-04-16
Transistor including a gate electrode extending all around one or more channel regions Grant 9,006,045 - Flachowsky , et al. April 14, 2	2015-04-14
Simplified Gate-first Hkmg Manufacturing Flow App 20150097252 - Flachowsky; Stefan ; et al.	2015-04-09
Middle in-situ doped SiGe junctions for PMOS devices on 28 nm low power/high performance technologies using a silicon oxide encapsulation, early halo and extension implantations Grant 8,975,704 - Hoentschel , et al. March 10, 2	2015-03-10
Late In-situ Doped Sige Junctions For Pmos Devices On 28 Nm Low Power/high Performance Technologies Using A Silicon Oxide Encapsulation, Early Halo And Extension Implantations App 20150054072 - HOENTSCHEL; Jan ; et al.	2015-02-26
Integrated circuits with improved spacers and methods for fabricating same Grant 8,962,429 - Flachowsky , et al. February 24, 2	2015-02-24
Semiconductor structure including a semiconductor-on-insulator region and a bulk region, and method for the formation thereof Grant 8,963,208 - Flachowsky , et al. February 24, 2	2015-02-24
Fully Silicided Gate Formed According To The Gate-first Hkmg Approach App 20150050787 - Flachowsky; Stefan ; et al.	2015-02-19
Semiconductor devices having encapsulated stressor regions and related fabrication methods Grant 8,951,873 - Flachowsky , et al. February 10, 2	2015-02-10
Strain engineering in three-dimensional transistors based on strained isolation material Grant 8,941,187 - Baldauf , et al. January 27, 2	2015-01-27
Enhancing Transistor Performance And Reliability By Incorporating Deuterium Into A Strained Capping Layer App 20150021693 - Javorka; Peter ; et al.	2015-01-22
Highly Conformal Extension Doping In Advanced Multi-gate Devices App 20150021712 - Zschaetzsch; Gerd ; et al.	2015-01-22
Late in-situ doped SiGe junctions for PMOS devices on 28 nm low power/high performance technologies using a silicon oxide encapsulation, early halo and extension implantations Grant 8,936,977 - Hoentschel , et al. January 20, 2	2015-01-20
Threshold voltage adjustment in a fin transistor by corner implantation Grant 8,916,928 - Baldauf , et al. December 23, 2	2014-12-23
Integrated circuits having protruding source and drain regions and methods for forming integrated circuits Grant 8,912,606 - Baldauf , et al. December 16, 2	2014-12-16
Device Including A Transistor Having A Stressed Channel Region And Method For The Formation Thereof App 20140361335 - Flachowsky; Stefan ; et al.	2014-12-11
Spacer Stress Relaxation App 20140357042 - Richter; Ralf ; et al.	2014-12-04
Methods of inducing a desired stress in the channel region of a transistor by performing ion implantation/anneal processes on the gate electrode Grant 8,877,582 - Richter , et al. November 4, 2	2014-11-04
Methods For Fabricating Integrated Circuits With Polycrystalline Silicon Resistor Structures Using A Replacment Gate Process Flow, And The Integrated Circuits Fabricated Thereby App 20140319620 - Hoentschel; Jan ; et al.	2014-10-30
Stress enhanced CMOS circuits and methods for their manufacture Grant 8,872,272 - Flachowsky , et al. October 28, 2	2014-10-28
Stabilized metal silicides in silicon-germanium regions of transistor elements Grant 8,859,408 - Flachowsky , et al. October 14, 2	2014-10-14
Silicidation of semiconductor devices Grant 8,846,467 - Boschke , et al. September 30, 2	2014-09-30
Technique For Manufacturing Semiconductor Devices Comprising Transistors With Different Threshold Voltages App 20140273370 - Gerhardt; Martin ; et al.	2014-09-18
Integrated Circuits And Methods For Fabricating Integrated Circuits With Gate Electrode Structure Protection App 20140273367 - Javorka; Peter ; et al.	2014-09-18
Integrated Circuits And Methods For Operating Integrated Circuits With Non-volatile Memory App 20140269060 - Mikalo; Ricardo P. ; et al.	2014-09-18
Method of forming a semiconductor structure including a vertical nanowire Grant 8,835,255 - Baldauf , et al. September 16, 2	2014-09-16
Source and drain doping using doped raised source and drain regions Grant 8,835,936 - Hoentschel , et al. September 16, 2	2014-09-16
Methods Of Removing Gate Cap Layers In Cmos Applications App 20140256135 - Javorka; Peter ; et al.	2014-09-11
Contact Geometry Having A Gate Silicon Length Decoupled From A Transistor Length App 20140252429 - Richter; Ralf ; et al.	2014-09-11
Transistor Including A Gate Electrode Extending All Around One Or More Channel Regions App 20140252481 - Flachowsky; Stefan ; et al.	2014-09-11
Method For Forming A Semiconductor Device And Semiconductor Device Structures App 20140252557 - Flachowsky; Stefan ; et al.	2014-09-11
Stress Memorization Technique App 20140248749 - Hoentschel; Jan ; et al.	2014-09-04
Transistor With Embedded Strain-inducing Material Formed In Cavities Formed In A Silicon/germanium Substrate App 20140246696 - Flachowsky; Stefan ; et al.	2014-09-04
CHANNEL SiGe REMOVAL FROM PFET SOURCE/DRAIN REGION FOR IMPROVED SILICIDE FORMATION IN HKMG TECHNOLOGIES WITHOUT EMBEDDED SiGe App 20140246698 - Flachowsky; Stefan ; et al.	2014-09-04
Performance enhancement in transistors by reducing the recessing of active regions and removing spacers Grant 8,822,298 - Flachowsky , et al. September 2, 2	2014-09-02
Methods of forming metal silicide regions on semiconductor devices using different temperatures Grant 8,815,736 - Scheiper , et al. August 26, 2	2014-08-26
Methods Of Inducing A Desired Stress In The Channel Region Of A Transistor By Performing Ion Implantation/anneal Processes On The Gate Electrode App 20140231907 - Richter; Ralf ; et al.	2014-08-21
Transistor comprising an embedded sigma shaped sequentially formed semiconductor alloy Grant 8,809,151 - Flachowsky , et al. August 19, 2	2014-08-19
Methods For Fabricating Integrated Circuits Having Gate To Active And Gate To Gate Interconnects App 20140220759 - Scheiper; Thilo ; et al.	2014-08-07
Method Of Forming A Semiconductor Structure Including A Vertical Nanowire App 20140206157 - Baldauf; Tim ; et al.	2014-07-24
Integrated Circuits And Methods For Fabricating Integrated Circuits With Improved Silicide Contacts App 20140197498 - Hoentschel; Jan ; et al.	2014-07-17
Middle In-situ Doped Sige Junctions For Pmos Devices On 28 Nm Low Power/high Performance Technologies Using A Silicon Oxide Encapsulation, Early Halo And Extension Implantations App 20140183654 - HOENTSCHEL; Jan ; et al.	2014-07-03
Canyon Gate Transistor And Methods For Its Fabrication App 20140175539 - Flachowsky; Stefan ; et al.	2014-06-26
Full silicidation prevention via dual nickel deposition approach Grant 8,759,922 - Javorka , et al. June 24, 2	2014-06-24
Methods for fabricating MOS devices with stress memorization Grant 8,753,969 - Flachowsky , et al. June 17, 2	2014-06-17
Semiconductor Device With A Silicon Dioxide Gate Insulation Layer Implanted With A Rare Earth Element And Methods Of Making Such A Device App 20140151818 - Hoentschel; Jan ; et al.	2014-06-05
Semiconductor device structure and methods for forming a CMOS integrated circuit structure Grant 8,735,241 - Flachowsky , et al. May 27, 2	2014-05-27
Semiconductor Structure Including A Semiconductor-on-insulator Region And A Bulk Region, And Method For The Formation Thereof App 20140131771 - Flachowsky; Stefan ; et al.	2014-05-15
Source And Drain Doping Using Doped Raised Source And Drain Regions App 20140131735 - Hoentschel; Jan ; et al.	2014-05-15
Methods for fabricating integrated circuits having gate to active and gate to gate interconnects Grant 8,722,500 - Scheiper , et al. May 13, 2	2014-05-13
Three-dimensional Silicon-based Transistor Comprising A High-mobility Channel Formed By Non-masked Epitaxy App 20140117418 - Flachowsky; Stefan ; et al.	2014-05-01
Sacrificial spacer approach for differential source/drain implantation spacers in transistors comprising a high-k metal gate electrode structure Grant 8,709,902 - Scheiper , et al. April 29, 2	2014-04-29
Middle in-situ doped SiGe junctions for PMOS devices on 28 nm low power/high performance technologies using a silicon oxide encapsulation, early halo and extension implantations Grant 8,703,578 - Hoentschel , et al. April 22, 2	2014-04-22
Semiconductor device with strain-inducing regions and method thereof Grant 8,698,243 - Flachowsky , et al. April 15, 2	2014-04-15
Canyon gate transistor and methods for its fabrication Grant 8,679,921 - Flachowsky , et al. March 25, 2	2014-03-25
Complementary stress liner to improve DGO/AVT devices and poly and diffusion resistors Grant 8,673,728 - Flachowsky , et al. March 18, 2	2014-03-18
Integrated Circuits Having Boron-doped Silicon Germanium Channels And Methods For Fabricating The Same App 20140070321 - Gerhardt; Martin ; et al.	2014-03-13
Methods of reducing gate leakage Grant 8,669,170 - Mikalo , et al. March 11, 2	2014-03-11
Low-diffusion drain and source regions in CMOS transistors for low power/high performance applications Grant 8,664,068 - Hoentschel , et al. March 4, 2	2014-03-04
Integrated Circuits With Improved Spacers And Methods For Fabricating Same App 20140042550 - Flachowsky; Stefan ; et al.	2014-02-13
Implantation of hydrogen to improve gate insulation layer-substrate interface Grant 8,647,951 - Flachowsky , et al. February 11, 2	2014-02-11
Fabrication of a semiconductor device with extended epitaxial semiconductor regions Grant 8,642,420 - Flachowsky , et al. February 4, 2	2014-02-04
Processes for preparing stressed semiconductor wafers and for preparing devices including the stressed semiconductor wafers Grant 8,642,430 - Flachowsky , et al. February 4, 2	2014-02-04
Methods Of Forming Transistor Devices With High-k Insulation Layers And The Resulting Devices App 20140027859 - Gerhardt; Martin ; et al.	2014-01-30
Methods For Fabricating High Carrier Mobility Finfet Structures App 20140030876 - Flachowsky; Stefan ; et al.	2014-01-30
Threshold Voltage Adjustment In A Fin Transistor By Corner Implantation App 20140027825 - Baldauf; Tim ; et al.	2014-01-30
Finfet Structures And Methods For Fabricating The Same App 20140015055 - Flachowsky; Stefan ; et al.	2014-01-16
Stress Enhanced Cmos Circuits And Methods For Their Manufacture App 20140015060 - Flachowsky; Stefan ; et al.	2014-01-16
Ultrathin Body Fully Depleted Silicon-on-insulator Integrated Circuits And Methods For Fabricating Same App 20130341722 - Illgen; Ralf ; et al.	2013-12-26
Soi Semiconductor Device Comprising A Substrate Diode And A Film Diode Formed By Using A Common Well Implantation Mask App 20130334604 - Scheiper; Thilo ; et al.	2013-12-19
Methods for fabricating integrated circuits having substrate contacts and integrated circuits having substrate contacts Grant 8,609,533 - Scheiper , et al. December 17, 2	2013-12-17
Middle In-situ Doped Sige Junctions For Pmos Devices On 28 Nm Low Power/high Performance Technologies Using A Silicon Oxide Encapsulation, Early Halo And Extension Implantations App 20130320450 - Hoentschel; Jan ; et al.	2013-12-05
Methods Of Performing Highly Tilted Halo Implantation Processes On Semiconductor Devices App 20130323892 - Flachowsky; Stefan ; et al.	2013-12-05
Full Silicidation Prevention Via Dual Nickel Deposition Approach App 20130320415 - JAVORKA; Peter ; et al.	2013-12-05
Late In-situ Doped Sige Junctions For Pmos Devices On 28 Nm Low Power/high Performance Technologies Using A Silicon Oxide Encapsulation, Early Halo And Extension Implantations App 20130320449 - Hoentschel; Jan ; et al.	2013-12-05
Methods of performing highly tilted halo implantation processes on semiconductor devices Grant 8,598,007 - Flachowsky , et al. December 3, 2	2013-12-03
Semiconductor Device With Strain-inducing Regions And Method Thereof App 20130313572 - Flachowsky; Stefan ; et al.	2013-11-28
Methods for fabricating integrated circuits using non-oxidizing resist removal Grant 8,586,440 - Flachowsky , et al. November 19, 2	2013-11-19
Methods of Forming Semiconductor Devices with Embedded Semiconductor Material as Source/Drain Regions Using a Reduced Number of Spacers App 20130302956 - Flachowsky; Stefan ; et al.	2013-11-14
Threshold voltage adjustment in a Fin transistor by corner implantation Grant 8,580,643 - Baldauf , et al. November 12, 2	2013-11-12
Method For Forming A Semiconductor Device Having Raised Drain And Source Regions And Corresponding Semiconductor Device App 20130292774 - Hoentschel; Jan ; et al.	2013-11-07
Method of increasing the germanium concentration in a silicon-germanium layer and semiconductor device comprising same Grant 8,574,981 - Flachowsky , et al. November 5, 2	2013-11-05
Integrated Circuits Having Protruding Source And Drain Regions And Methods For Forming Integrated Circuits App 20130277746 - Baldauf; Tim ; et al.	2013-10-24
Strained semiconductor devices having asymmetrical heterojunction structures and methods for the fabrication thereof Grant 8,563,374 - Flachowsky , et al. October 22, 2	2013-10-22
Semiconductor device with dual metal silicide regions and methods of making same Grant 8,558,290 - Scheiper , et al. October 15, 2	2013-10-15
Processes For Preparing Stressed Semiconductor Wafers And For Preparing Devices Including The Stressed Semiconductor Wafers App 20130267078 - Flachowsky; Stefan ; et al.	2013-10-10
Methods For Fabricating Integrated Circuits Having Substrate Contacts And Integrated Circuits Having Substrate Contacts App 20130256901 - Scheiper; Thilo ; et al.	2013-10-03
Methods For Fabricating Integrated Circuits With Reduced Electrical Parameter Variation App 20130244388 - Scheiper; Thilo ; et al.	2013-09-19
Methods Of Forming Features On An Integrated Circuit Product Using A Novel Compound Sidewall Image Transfer Technique App 20130244437 - Flachowsky; Stefan ; et al.	2013-09-19
SOI semiconductor device comprising a substrate diode and a film diode formed by using a common well implantation mask Grant 8,536,033 - Scheiper , et al. September 17, 2	2013-09-17
Methods of forming stressed silicon-carbon areas in an NMOS transistor Grant 8,536,034 - Flachowsky , et al. September 17, 2	2013-09-17
Semiconductor device with strain-inducing regions and method thereof Grant 8,524,563 - Flachowsky , et al. September 3, 2	2013-09-03
Methods for the fabrication of integrated circuits including back-etching of raised conductive structures Grant 8,524,566 - Flachowsky , et al. September 3, 2	2013-09-03
Full silicidation prevention via dual nickel deposition approach Grant 8,524,564 - Javorka , et al. September 3, 2	2013-09-03
Methods of Forming Device Level Conductive Contacts to Improve Device Performance and Semiconductor Devices Comprising Such Contacts App 20130207275 - Mikalo; Ricardo P. ; et al.	2013-08-15
Semiconductor device with work function adjusting layer having varied thickness in a gate width direction and methods of making same Grant 8,508,001 - Langdon , et al. August 13, 2	2013-08-13
Drive current increase in field effect transistors by asymmetric concentration profile of alloy species of a channel semiconductor alloy Grant 8,501,601 - Flachowsky , et al. August 6, 2	2013-08-06
Methods For Fabricating Mos Devices With Stress Memorization App 20130196495 - Flachowsky; Stefan ; et al.	2013-08-01
Semiconductor Devices Having Encapsulated Stressor Regions And Related Fabrication Methods App 20130187209 - Flachowsky; Stefan ; et al.	2013-07-25
Strain Engineering in Three-Dimensional Transistors Based on Strained Isolation Material App 20130181299 - Baldauf; Tim ; et al.	2013-07-18
Methods of Reducing Gate Leakage App 20130183817 - Mikalo; Ricardo P. ; et al.	2013-07-18
Stress Enhanced Mos Transistor And Methods For Fabrication App 20130175640 - Illgen; Ralf ; et al.	2013-07-11
Semiconductor Device With Strain-inducing Regions And Method Thereof App 20130175545 - Flachowsky; Stefan ; et al.	2013-07-11
Transistor With Stress Enhanced Channel And Methods For Fabrication App 20130175610 - Flachowsky; Stefan ; et al.	2013-07-11
In Situ Doping and Diffusionless Annealing of Embedded Stressor Regions in PMOS and NMOS Devices App 20130178024 - Flachowsky; Stefan ; et al.	2013-07-11
Methods of Making Transistor Devices with Elevated Source/Drain Regions to Accommodate Consumption During Metal Silicide Formation Process App 20130178034 - Flachowsky; Stefan ; et al.	2013-07-11
Methods of forming a semiconductor device with recessed source/design regions, and a semiconductor device comprising same Grant 8,476,131 - Flachowsky , et al. July 2, 2	2013-07-02
Integrated circuits formed on strained substrates and including relaxed buffer layers and methods for the manufacture thereof Grant 8,471,342 - Flachowsky , et al. June 25, 2	2013-06-25
Methods For The Fabrication Of Integrated Circuits Including Back-etching Of Raised Conductive Structures App 20130157421 - Flachowsky; Stefan ; et al.	2013-06-20
Methods of forming a PMOS device with in situ doped epitaxial source/drain regions Grant 8,466,018 - Illgen , et al. June 18, 2	2013-06-18
Integrated Circuits Formed On Strained Substrates And Including Relaxed Buffer Layers And Methods For The Manufacture Thereof App 20130146976 - Flachowsky; Stefan ; et al.	2013-06-13
Methods of forming highly scaled semiconductor devices using a disposable spacer technique Grant 8,440,530 - Hoentschel , et al. May 14, 2	2013-05-14
Canyon Gate Transistor And Methods For Its Fabrication App 20130105885 - Flachowsky; Stefan ; et al.	2013-05-02
Methods of Forming Source/Drain Regions on Transistor Devices App 20130095627 - Flachowsky; Stefan ; et al.	2013-04-18
Methods Of Forming Highly Scaled Semiconductor Devices Using A Disposable Spacer Technique App 20130095620 - Hoentschel; Jan ; et al.	2013-04-18
Semiconductor devices having encapsulated stressor regions and related fabrication methods Grant 8,415,221 - Flachowsky , et al. April 9, 2	2013-04-09
Methods For Fabricating Integrated Circuits Having Gate To Active And Gate To Gate Interconnects App 20130071977 - Scheiper; Thilo ; et al.	2013-03-21
Cmos Semiconductor Devices Having Stressor Regions And Related Fabrication Methods App 20130069123 - Illgen; Ralf ; et al.	2013-03-21
Strained Semiconductor Devices Having Asymmetrical Heterojunction Structures And Methods For The Fabrication Thereof App 20130069111 - Flachowsky; Stefan ; et al.	2013-03-21
Methods and Systems for Forming Implanted Doped Regions for a Semiconductor Device Using Reduced Temperature Ion Implantation App 20130065373 - Flachowsky; Stefan ; et al.	2013-03-14
Methods of Forming Highly Scaled Semiconductor Devices Using a Reduced Number of Spacers App 20130065367 - Flachowsky; Stefan ; et al.	2013-03-14
Complementary Stress Liner To Improve Dgo/avt Devices And Poly And Diffusion Resistors App 20130056854 - FLACHOWSKY; Stefan ; et al.	2013-03-07
Semiconductor Device With Work Function Adjusting Layer Having Varied Thickness in a Gate Width Direction and Methods of Making Same App 20130049139 - Langdon; Steve ; et al.	2013-02-28
Threshold Voltage Adjustment in a Fin Transistor by Corner Implantation App 20130049121 - Baldauf; Tim ; et al.	2013-02-28
Mosfet Integrated Circuit With Improved Silicide Thickness Uniformity And Methods For Its Manufacture App 20130049124 - Fitz; Clemens ; et al.	2013-02-28
Methods of Forming a Semiconductor Device with Recessed Source/Drain Regions, and a Semiconductor Device Comprising Same App 20130049126 - Flachowsky; Stefan ; et al.	2013-02-28
Methods of Forming Metal Silicide Regions on Semiconductor Devices Using Different Temperatures App 20130052819 - Scheiper; Thilo ; et al.	2013-02-28
Semiconductor Device with Dual Metal Silicide Regions and Methods of Making Same App 20130049128 - Scheiper; Thilo ; et al.	2013-02-28
Fabrication Of A Semiconductor Device With Extended Epitaxial Semiconductor Regions App 20130052779 - Flachowsky; Stefan ; et al.	2013-02-28
Methods of Forming Stressed Silicon-Carbon Areas in an NMOS Transistor App 20130052783 - Flachowsky; Stefan ; et al.	2013-02-28
Implantation of Hydrogen to Improve Gate Insulation Layer-Substrate Interface App 20130052782 - Flachowsky; Stefan ; et al.	2013-02-28
Full Silicidation Prevention Via Dual Nickel Deposition Approach App 20130032901 - Javorka; Peter ; et al.	2013-02-07
N-channel Transistor Comprising A High-k Metal Gate Electrode Structure And A Reduced Series Resistance By Epitaxially Formed Semiconductor Material In The Drain And Source Areas App 20130032877 - OSTERMAY; Ina ; et al.	2013-02-07
Methods For Fabricating Integrated Circuits Using Non-oxidizing Resist Removal App 20130029464 - Flachowsky; Stefan ; et al.	2013-01-31
Methods of Forming a PMOS Device with In Situ Doped Epitaxial Source/Drain Regions App 20130029463 - Illgen; Ralf ; et al.	2013-01-31
Semiconductor device substrate with embedded stress region, and related fabrication methods Grant 8,329,551 - Flachowsky , et al. December 11, 2	2012-12-11
Method of Forming Sidewall Spacers Having Different Widths Using a Non-Conformal Deposition Process App 20120309182 - Flachowsky; Stefan ; et al.	2012-12-06
Complementary stress liner to improve DGO/AVT devices and poly and diffusion resistors Grant 8,324,041 - Flachowsky , et al. December 4, 2	2012-12-04
Method of Increasing the Germanium Concentration in a Silicon-Germanium Layer and Semiconductor Device Comprising Same App 20120280289 - Flachowsky; Stefan ; et al.	2012-11-08
Stabilized Metal Silicides in Silicon-Germanium Regions of Transistor Elements App 20120261725 - Flachowsky; Stefan ; et al.	2012-10-18
Stabilization of Metal Silicides in PFET Transistors by Incorporation of Stabilizing Species in a Si/Ge Semiconductor Material App 20120241816 - Flachowsky; Stefan ; et al.	2012-09-27
Performance Enhancement In Transistors By Reducing The Recessing Of Active Regions And Removing Spacers App 20120235215 - Flachowsky; Stefan ; et al.	2012-09-20
Methods For Fabricating Cmos Integrated Circuits Having Metal Silicide Contacts App 20120231591 - FLACHOWSKY; Stefan ; et al.	2012-09-13
Complementary Stress Liner To Improve Dgo/avt Devices And Poly And Diffusion Resistors App 20120199912 - Flachowsky; Stefan ; et al.	2012-08-09
Semiconductor Devices Having Encapsulated Stressor Regions And Related Fabrication Methods App 20120193686 - FLACHOWSKY; Stefan ; et al.	2012-08-02
High-K Metal Gate Electrode Structures Formed by a Replacement Gate Approach Based on Superior Planarity of Placeholder Materials App 20120196425 - Scheiper; Thilo ; et al.	2012-08-02
Drive Current Increase in Field Effect Transistors by Asymmetric Concentration Profile of Alloy Species of a Channel Semiconductor Alloy App 20120193708 - Flachowsky; Stefan ; et al.	2012-08-02
Stress Memorization Technique Using Gate Encapsulation App 20120196422 - Flachowsky; Stefan ; et al.	2012-08-02
SOI Semiconductor Device Comprising a Substrate Diode and a Film Diode Formed by Using a Common Well Implantation Mask App 20120181655 - Scheiper; Thilo ; et al.	2012-07-19
Transistor Comprising an Embedded Sigma Shaped Sequentially Formed Semiconductor Alloy App 20120161204 - Flachowsky; Stefan ; et al.	2012-06-28
Strain Enhancement in Transistors Comprising an Embedded Strain-Inducing Semiconductor Material by Alloy Species Condensation App 20120161203 - Flachowsky; Stefan ; et al.	2012-06-28
Low-Diffusion Drain and Source Regions in CMOS Transistors for Low Power/High Performance Applications App 20120153399 - Hoentschel; Jan ; et al.	2012-06-21
Patterning of a Stressed Dielectric Material in a Contact Level Without Using an Underlying Etch Stop Layer App 20120156839 - Scheiper; Thilo ; et al.	2012-06-21
Sacrificial Spacer Approach for Differential Source/Drain Implantation Spacers in Transistors Comprising a High-K Metal Gate Electrode Structure App 20120156837 - Scheiper; Thilo ; et al.	2012-06-21
Semiconductor Device Substrate With Embedded Stress Region, And Related Fabrication Methods App 20120119259 - FLACHOWSKY; Stefan ; et al.	2012-05-17
Strain Engineering in Three-Dimensional Transistors Based on a Strained Channel Semiconductor Material App 20120025312 - Scheiper; Thilo ; et al.	2012-02-02
Strain transformation in biaxially strained SOI substrates for performance enhancement of P-channel and N-channel transistors Grant 8,062,952 - Hoentschel , et al. November 22, 2	2011-11-22
Strain Transformation In Biaxially Strained Soi Substrates For Performance Enhancement Of P-channel And N-channel Transistors App 20100301416 - Hoentschel; Jan ; et al.	2010-12-02