name:-0.11566781997681
name:-0.15417003631592
name:-0.0026669502258301
Fitzsimmons; John A. Patent Filings

Fitzsimmons; John A.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Fitzsimmons; John A..The latest application filed is for "soi wafers with buried dielectric layers to prevent cu diffusion".

Company Profile
3.102.109
  • Fitzsimmons; John A. - Poughkeepsie NY
  • Fitzsimmons; John A - Poughkeepsie NY
  • Fitzsimmons; John A. - Hopewell Junction NY
  • - Poughkeepsie NY US
  • Fitzsimmons, John A. - Poughkepsie NY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Trademarks
Patent Activity
PatentDate
SOI wafers with buried dielectric layers to prevent CU diffusion
Grant 10,923,427 - Stamper , et al. February 16, 2
2021-02-16
Soi Wafers With Buried Dielectric Layers To Prevent Cu Diffusion
App 20190172789 - Stamper; Anthony K ;   et al.
2019-06-06
SOI wafers with buried dielectric layers to prevent CU diffusion
Grant 10,242,947 - Stamper , et al.
2019-03-26
Self aligned contact structure
Grant 10,074,562 - Orozco-Teran , et al. September 11, 2
2018-09-11
Device layer transfer with a preserved handle wafer section
Grant 10,037,911 - Stamper , et al. July 31, 2
2018-07-31
Integrated circuit structure having deep trench capacitor and through-silicon via and method of forming same
Grant 9,966,310 - Farooq , et al. May 8, 2
2018-05-08
Integrated Circuit Structure Having Deep Trench Capacitor And Through-silicon Via And Method Of Forming Same
App 20180108566 - Farooq; Mukta G. ;   et al.
2018-04-19
Integrated circuit structure having deep trench capacitor and through-silicon via and method of forming same
Grant 9,929,085 - Fitzsimmons , et al. March 27, 2
2018-03-27
Integrated circuit structure having deep trench capacitor and through-silicon via and method of forming same
Grant 9,892,970 - Farooq , et al. February 13, 2
2018-02-13
Soi Wafers With Buried Dielectric Layers To Prevent Cu Diffusion
App 20180012845 - Stamper; Anthony K. ;   et al.
2018-01-11
Device Layer Transfer With A Preserved Handle Wafer Section
App 20180005873 - Stamper; Anthony K. ;   et al.
2018-01-04
Corrosion resistant chip sidewall connection with crackstop and hermetic seal
Grant 9,852,959 - Fitzsimmons , et al. December 26, 2
2017-12-26
Integrated Circuit Structure Having Deep Trench Capacitor And Through-silicon Via And Method Of Forming Same
App 20170352592 - Farooq; Mukta G. ;   et al.
2017-12-07
Integrated Circuit Structure Having Deep Trench Capacitor And Through-silicon Via And Method Of Forming Same
App 20170352618 - Fitzsimmons; John A. ;   et al.
2017-12-07
Device layer transfer with a preserved handle wafer section
Grant 9,818,637 - Stamper , et al. November 14, 2
2017-11-14
Electrical connection around a crackstop structure
Grant 9,812,404 - Shapiro , et al. November 7, 2
2017-11-07
SOI wafers with buried dielectric layers to prevent Cu diffusion
Grant 9,806,025 - Stamper , et al. October 31, 2
2017-10-31
Corrosion Resistant Chip Sidewall Connection With Crackstop And Hermetic Seal
App 20170229362 - Fitzsimmons; John A. ;   et al.
2017-08-10
Electrical Connection Around A Crackstop Structure
App 20170194265 - Shapiro; Michael J. ;   et al.
2017-07-06
Device Layer Transfer With A Preserved Handle Wafer Section
App 20170186643 - Stamper; Anthony K. ;   et al.
2017-06-29
Soi Wafers With Buried Dielectric Layers To Prevent Cu Diffusion
App 20170186693 - Stamper; Anthony K. ;   et al.
2017-06-29
Metal to metal bonding for stacked (3D) integrated circuits
Grant 9,673,176 - Cheng , et al. June 6, 2
2017-06-06
Wafer to wafer alignment
Grant 9,671,215 - Farooq , et al. June 6, 2
2017-06-06
Metal to metal bonding for stacked (3D) integrated circuits
Grant 9,666,563 - Cheng , et al. May 30, 2
2017-05-30
Metal to metal bonding for stacked (3D) integrated circuits
Grant 9,653,431 - Cheng , et al. May 16, 2
2017-05-16
Metal to metal bonding for stacked (3D) integrated circuits
Grant 9,653,432 - Cheng , et al. May 16, 2
2017-05-16
Integrated circuit with replacement gate stacks and method of forming same
Grant 9,589,806 - Bao , et al. March 7, 2
2017-03-07
Strain detection structures for bonded wafers and chips
Grant 9,553,054 - Farooq , et al. January 24, 2
2017-01-24
Self-aligned contact structure
Grant 9,548,244 - Orozco-Teran , et al. January 17, 2
2017-01-17
Metal to metal bonding for stacked (3D) integrated circuits
Grant 9,515,051 - Cheng , et al. December 6, 2
2016-12-06
Self Aligned Contact Structure
App 20160336266 - Orozco-Teran; Rosa A. ;   et al.
2016-11-17
Electronic Package That Includes A Plurality Of Integrated Circuit Devices Bonded In A Three-dimensional Stack Arrangement
App 20160300814 - FAROOQ; MUKTA G. ;   et al.
2016-10-13
Electronic package that includes a plurality of integrated circuit devices bonded in a three-dimensional stack arrangement
Grant 9,461,017 - Farooq , et al. October 4, 2
2016-10-04
Wafer To Wafer Alignment
App 20160178344 - Farooq; Mukta G. ;   et al.
2016-06-23
Strain Detection Structures For Bonded Wafers And Chips
App 20160118348 - FAROOQ; Mukta G. ;   et al.
2016-04-28
Metal To Metal Bonding For Stacked (3d) Integrated Circuits
App 20160086915 - Cheng; Tien-Jen ;   et al.
2016-03-24
Metal To Metal Bonding For Stacked (3d) Integrated Circuits
App 20160086925 - Cheng; Tien-Jen ;   et al.
2016-03-24
Metal To Metal Bonding For Stacked (3d) Integrated Circuits
App 20160086914 - Cheng; Tien-Jen ;   et al.
2016-03-24
Metal To Metal Bonding For Stacked (3d) Integrated Circuits
App 20160086916 - Cheng; Tien-Jen ;   et al.
2016-03-24
Acidified Conductive Water For Developer Residue Removal
App 20160041471 - Briend; Guillaume D. ;   et al.
2016-02-11
Bottom-up plating of through-substrate vias
Grant 9,257,336 - Farooq , et al. February 9, 2
2016-02-09
Self-aligned contact structure
Grant 9,252,053 - Orozco-Teran , et al. February 2, 2
2016-02-02
Self-aligned Contact Structure
App 20150371948 - Orozco-Teran; Rosa A. ;   et al.
2015-12-24
Electromigration immune through-substrate vias
Grant 9,153,558 - Filippi , et al. October 6, 2
2015-10-06
Selective Etch Chemistry For Gate Electrode Materials
App 20150275376 - Fitzsimmons; John A. ;   et al.
2015-10-01
Wafer to wafer alignment by LED/LSD devices
Grant 9,105,517 - Farooq , et al. August 11, 2
2015-08-11
Self-aligned Contact Structure
App 20150200137 - Orozco-Teran; Rosa A. ;   et al.
2015-07-16
Selective etch chemistry for gate electrode materials
Grant 9,070,625 - Fitzsimmons , et al. June 30, 2
2015-06-30
Electronic fuse line with modified cap
Grant 9,059,173 - Filippi , et al. June 16, 2
2015-06-16
Sidewalls of electroplated copper interconnects
Grant 9,060,457 - Farooq , et al. June 16, 2
2015-06-16
Cleaning composition and process for cleaning semiconductor devices and/or tooling during manufacturing thereof
Grant 9,058,976 - Chhabra , et al. June 16, 2
2015-06-16
Sidewalls of electroplated copper interconnects
Grant 9,055,703 - Farooq , et al. June 9, 2
2015-06-09
Sidewalls of electroplated copper interconnects
Grant 9,040,407 - Farooq , et al. May 26, 2
2015-05-26
Forming semiconductor chip connections
Grant 9,035,465 - Cheng , et al. May 19, 2
2015-05-19
Wafer To Wafer Alignment By Led/lsd Devices
App 20150069421 - Farooq; Mukta G. ;   et al.
2015-03-12
Co-axial restraint for connectors within flip-chip packages
Grant 8,970,041 - Farooq , et al. March 3, 2
2015-03-03
Bottom-up Plating Of Through-substrate Vias
App 20150056804 - Farooq; Mukta G. ;   et al.
2015-02-26
Bottom-up plating of through-substrate vias
Grant 8,956,973 - Farooq , et al. February 17, 2
2015-02-17
Electronic Fuse Line With Modified Cap
App 20150021736 - Filippi; Ronald G. ;   et al.
2015-01-22
Cleaning Composition And Process For Cleaning Semiconductor Devices And/or Tooling During Manufacturing Thereof
App 20150024989 - Chhabra; Vishal ;   et al.
2015-01-22
Metal To Metal Bonding For Stacked (3d) Integrated Circuits
App 20140374903 - Cheng; Tien-Jen ;   et al.
2014-12-25
Metal to metal bonding for stacked (3D) integrated circuits
Grant 8,916,448 - Cheng , et al. December 23, 2
2014-12-23
Method of forming electronic fuse line with modified cap
Grant 8,889,491 - Filippi , et al. November 18, 2
2014-11-18
Forming Semiconductor Chip Connections
App 20140332929 - Cheng; Kangguo ;   et al.
2014-11-13
Titanium-Nitride Removal
App 20140312265 - Chen; Shyng-Tsong ;   et al.
2014-10-23
Method and structure for reworking antireflective coating over semiconductor substrate
Grant 8,835,307 - Akinmade-Yusuff , et al. September 16, 2
2014-09-16
Titanium-nitride removal
Grant 8,835,326 - Fitzsimmons , et al. September 16, 2
2014-09-16
Forming semiconductor chip connections
Grant 8,802,497 - Hsu , et al. August 12, 2
2014-08-12
Bilayer trench first hardmask structure and process for reduced defectivity
Grant 8,796,150 - Akinmade-Yusuff , et al. August 5, 2
2014-08-05
Electronic Fuse Line With Modified Cap
App 20140210040 - FILIPPI; RONALD G. ;   et al.
2014-07-31
Sidewalls of electroplated copper interconnects
Grant 8,791,005 - Farooq , et al. July 29, 2
2014-07-29
Metal To Metal Bonding For Stacked (3d) Integrated Circuits
App 20140191418 - Cheng; Tien-Jen ;   et al.
2014-07-10
Detecting leaks in a fluid cooling system by sensing for a drop of fluid pressure in the system
Grant 8,763,445 - Fitzsimmons , et al. July 1, 2
2014-07-01
Cleaning Composition And Process For Cleaning Semiconductor Devices And/or Tooling During Manufacturing Thereof
App 20140128307 - Chhabra; Vishal ;   et al.
2014-05-08
Process for cleaning semiconductor devices and/or tooling during manufacturing thereof
Grant 8,647,445 - Chhabra , et al. February 11, 2
2014-02-11
Sidewalls Of Electroplated Copper Interconnects
App 20140027912 - Farooq; Mukta G. ;   et al.
2014-01-30
Sidewalls Of Electroplated Copper Interconnects
App 20140027911 - Farooq; Mukta G. ;   et al.
2014-01-30
Sidewalls Of Electroplated Copper Interconnects
App 20140027296 - Farooq; Mukta G. ;   et al.
2014-01-30
Aqueous cerium-containing solution having an extended bath lifetime for removing mask material
Grant 08618036 -
2013-12-31
Aqueous cerium-containing solution having an extended bath lifetime for removing mask material
Grant 8,618,036 - Afzali-Ardakani , et al. December 31, 2
2013-12-31
Sidewalls Of Electroplated Copper Interconnects
App 20130334691 - Farooq; Mukta G. ;   et al.
2013-12-19
Bottom-up Plating Of Through-substrate Vias
App 20130260556 - Farooq; Mukta G. ;   et al.
2013-10-03
Co-axial restraint for connectors within flip-chip packages
Grant 8,507,325 - Farooq , et al. August 13, 2
2013-08-13
Titanium Nitride Removal
App 20130200040 - Fitzsimmons; John A. ;   et al.
2013-08-08
Selective Etch Chemistry For Gate Electrode Materials
App 20130203231 - Fitzsimmons; John A. ;   et al.
2013-08-08
Method And Device To Enable Semiconductor Processing In Solution That Generates Particles
App 20130167883 - FITZSIMMONS; JOHN A. ;   et al.
2013-07-04
Titanium-Nitride Removal
App 20130171829 - Fitzsimmons; John A. ;   et al.
2013-07-04
Detecting Leaks In A Fluid Cooling System By Sensing For A Drop Of Fluid Pressure In The System
App 20130145615 - Fitzsimmons; John A. ;   et al.
2013-06-13
Aqueous Cerium-containing Solution Having An Extended Bath Lifetime For Removing Mask Material
App 20130123159 - Afzali-Ardakani; Ali ;   et al.
2013-05-16
Mitigating Environment, Health, and Safety Complications
App 20130041894 - DiZio; Kathleen A. ;   et al.
2013-02-14
Device and methodology for reducing effective dielectric constant in semiconductor devices
Grant 8,343,868 - Edelstein , et al. January 1, 2
2013-01-01
Cleaning exhaust screens in a manufacturing process
Grant 8,337,627 - Fitzsimmons , et al. December 25, 2
2012-12-25
Electromigration Immune Through-substrate Vias
App 20120292763 - Filippi; Ronald G. ;   et al.
2012-11-22
Electromigration immune through-substrate vias
Grant 8,304,863 - Filippi , et al. November 6, 2
2012-11-06
Copper alloy via bottom liner
Grant 8,294,270 - Edelstein , et al. October 23, 2
2012-10-23
Method for reworking antireflective coating over semiconductor substrate
Grant 8,288,271 - Akinmade Yusuff , et al. October 16, 2
2012-10-16
Method And Structure For Reworking Antireflective Coating Over Semiconductor Substrate
App 20120231554 - Akinmade Yusuff; Hakeem ;   et al.
2012-09-13
Co-axial Restraint For Connectors Within Flip-chip Packages
App 20120223434 - Farooq; Mukta G. ;   et al.
2012-09-06
Method And Structure For Reworking Antireflective Coating Over Semiconductor Substrate
App 20120205786 - Akinmade-Yusuff; Hakeem ;   et al.
2012-08-16
Forming semiconductor chip connections
Grant 8,236,610 - Hsu , et al. August 7, 2
2012-08-07
Forming Semiconductor Chip Connections
App 20120187561 - Hsu; Louis Lu-Chen ;   et al.
2012-07-26
Bilayer Trench First Hardmask Structure And Process For Reduced Defectivity
App 20120187546 - Akinmade-Yusuff; Hakeem B.S. ;   et al.
2012-07-26
Reducing effective dielectric constant in semiconductor devices
Grant 8,129,286 - Edelstein , et al. March 6, 2
2012-03-06
Copper Alloy Via Bottom Liner
App 20110227225 - Edelstein; Daniel C. ;   et al.
2011-09-22
Integrated circuit hard mask processing system
Grant 8,018,061 - Liu , et al. September 13, 2
2011-09-13
Electromigration Immune Through-substrate Vias
App 20110193199 - Filippi; Ronald G. ;   et al.
2011-08-11
Co-axial Restraint For Connectors Within Flip-chip Packages
App 20110180920 - Farooq; Mukta G. ;   et al.
2011-07-28
Device And Methodology For Reducing Effective Dielectric Constant In Semiconductor Devices
App 20110111590 - Edelstein; Daniel C. ;   et al.
2011-05-12
Method And Structure For Reworking Antireflective Coating Over Semiconductor Substrate
App 20110101507 - Akinmade Yusuff; Hakeem ;   et al.
2011-05-05
Cleaning Exhaust Screens In A Manufacturing Process
App 20110079255 - Fitzsimmons; John A. ;   et al.
2011-04-07
Device and methodology for reducing effective dielectric constant in semiconductor devices
Grant 7,892,940 - Edelstein , et al. February 22, 2
2011-02-22
Forming Semiconductor Chip Connections
App 20100301475 - Hsu; Louis Lu-Chen ;   et al.
2010-12-02
Pad structure to provide improved stress relief
Grant 7,755,206 - Farooq , et al. July 13, 2
2010-07-13
Integrated circuit fabrication process using gas cluster ion beam etching
Grant 7,709,344 - Chen , et al. May 4, 2
2010-05-04
Minimizing low-k dielectric damage during plasma processing
Grant 7,691,736 - Beck , et al. April 6, 2
2010-04-06
Oxidant and passivant composition and method for use in treating a microelectronic structure
Grant 7,670,497 - Fitzsimmons , et al. March 2, 2
2010-03-02
Integrated Circuit Hard Mask Processing System
App 20100013104 - Liu; Wuping ;   et al.
2010-01-21
Integrated circuit manufacturing method using hard mask
Grant 7,615,484 - Liu , et al. November 10, 2
2009-11-10
Device and methodology for reducing effective dielectric constant in semiconductor devices
Grant 7,592,685 - Edelstein , et al. September 22, 2
2009-09-22
Compressible films surrounding solder connectors
Grant 7,566,649 - Bernier , et al. July 28, 2
2009-07-28
Pad Structure To Provide Improved Stress Relief
App 20090140432 - Farooq; Mukta G. ;   et al.
2009-06-04
Exposed pore sealing post patterning
Grant 7,541,679 - Cooney, III , et al. June 2, 2
2009-06-02
Self-assembled Stress Relief Interface
App 20090108442 - Fitzsimmons; John A. ;   et al.
2009-04-30
Structure and method of chemically formed anchored metallic vias
Grant 7,517,736 - Mehta , et al. April 14, 2
2009-04-14
Method and structure to enhance temperature/humidity/bias performance of semiconductor devices by surface modification
Grant 7,517,790 - Fitzsimmons , et al. April 14, 2
2009-04-14
Method of making conductor contacts having enhanced reliability
Grant 7,480,990 - Fitzsimmons , et al. January 27, 2
2009-01-27
Oxidant And Passivant Composition And Method For Use In Treating A Microelectronic Structure
App 20090008361 - Fitzsimmons; John A. ;   et al.
2009-01-08
Integrated Circuit Hard Mask Processing System
App 20080265409 - Liu; Wuping ;   et al.
2008-10-30
Device And Methodology For Reducing Effective Dielectric Constant In Semiconductor Devices
App 20080254630 - EDELSTEIN; Daniel C. ;   et al.
2008-10-16
Device and methodology for reducing effective dielectric constant in semiconductor devices
Grant 7,405,147 - Edelstein , et al. July 29, 2
2008-07-29
Method For Fabricating A Microelectronic Conductor Structure
App 20080160754 - Fitzsimmons; John A. ;   et al.
2008-07-03
Densifying Surface Of Porous Dielectric Layer Using Gas Cluster Ion Beam
App 20080090402 - Bonilla; Griselda ;   et al.
2008-04-17
Detection of diamond contamination in polishing pad
Grant 7,354,333 - Economikos , et al. April 8, 2
2008-04-08
Method And Structure To Enhance Temperature/humidity/bias Performance Of Semiconductor Devices By Surface Modification
App 20080079176 - Fitzsimmons; John A. ;   et al.
2008-04-03
Detection Of Diamond Contamination In Polishing Pad And Reconditioning System Therefor
App 20080076331 - Economikos; Laertis ;   et al.
2008-03-27
Compressible films surrounding solder connectors
Grant 7,332,821 - Bernier , et al. February 19, 2
2008-02-19
Device And Methodology For Reducing Effective Dielectric Constant In Semiconductor Devices
App 20080038915 - EDELSTEIN; Daniel C. ;   et al.
2008-02-14
Device And Methodology For Reducing Effective Dielectric Constant In Semiconductor Devices
App 20080038923 - EDELSTEIN; Daniel C. ;   et al.
2008-02-14
Copper alloy via bottom liner
Grant 7,327,033 - Edelstein , et al. February 5, 2
2008-02-05
Copper Alloy Via Bottom Liner
App 20080020230 - Edelstein; Daniel C. ;   et al.
2008-01-24
Structure And Method Of Chemically Formed Anchored Metallic Vias
App 20080012142 - Mehta; Sanjay C. ;   et al.
2008-01-17
Compressible Films Surrounding Solder Connectors
App 20080009101 - Bernier; William E. ;   et al.
2008-01-10
Minimizing low-k dielectric damage during plasma processing
App 20070190804 - Beck; Michael ;   et al.
2007-08-16
Conductor Contacts With Enhanced Reliability
App 20070161290 - Fitzsimmons; John A. ;   et al.
2007-07-12
Gcib Liner And Hardmask Removal Process
App 20070117342 - Chen; Shyng-Tsong T. ;   et al.
2007-05-24
Interlayer connector for preventing delamination of semiconductor device
Grant 7,180,187 - Fitzsimmons , et al. February 20, 2
2007-02-20
Reliable low-k interconnect structure with hybrid dielectric
Grant 7,135,398 - Fitzsimmons , et al. November 14, 2
2006-11-14
Crackstop with release layer for crack control in semiconductors
Grant 7,109,093 - Fitzsimmons , et al. September 19, 2
2006-09-19
Detection Of Diamond Contamination In Polishing Pad And Reconditioning System Therefor
App 20060166607 - Economikos; Laertis ;   et al.
2006-07-27
Self-locking wire bond structure and method of making the same
Grant 7,073,702 - Fitzsimmons , et al. July 11, 2
2006-07-11
Exposed pore sealing post patterning
Grant 7,015,150 - Cooney, III , et al. March 21, 2
2006-03-21
Roughened bonding pad and bonding wire surfaces for low pressure wire bonding
Grant 7,015,580 - Fitzsimmons , et al. March 21, 2
2006-03-21
Compressible Films Surrounding Solder Connectors
App 20060040567 - Bernier; William E. ;   et al.
2006-02-23
Exposed pore sealing post patterning
App 20060027929 - Cooney; Edward C. III ;   et al.
2006-02-09
Copper Alloy Via Bottom Liner
App 20060027930 - Edelstein; Daniel C. ;   et al.
2006-02-09
Interlayer Connector For Preventing Delamination Of Semiconductor Device And Methods Of Forming Same
App 20050280152 - Fitzsimmons, John A. ;   et al.
2005-12-22
Exposed Pore Sealing Post Patterning
App 20050266698 - Cooney, Edward C. III ;   et al.
2005-12-01
Interconnect structure improvements
Grant 6,960,519 - Dalton , et al. November 1, 2
2005-11-01
Filled Cavities Semiconductor Devices
App 20050218504 - Dalton, Timothy J. ;   et al.
2005-10-06
Crackstop With Release Layer For Crack Control In Semiconductors
App 20050208781 - Fitzsimmons, John A. ;   et al.
2005-09-22
Advanced BEOL interconnect structures with low-k PE CVD cap layer and method thereof
Grant 6,939,797 - Barth , et al. September 6, 2
2005-09-06
Device And Methodology For Reducing Effective Dielectric Constant In Semiconductor Devices
App 20050167838 - Edelstein, Daniel C. ;   et al.
2005-08-04
Reliable low-k interconnect structure with hybrid dielectric
Grant 6,917,108 - Fitzsimmons , et al. July 12, 2
2005-07-12
Bilayer HDP CVD/PE CVD cap in advanced BEOL interconnect structures and method thereof
Grant 6,914,320 - Chen , et al. July 5, 2
2005-07-05
Stabilization of fluorine-containing dielectric materials in a metal insulator wiring structure
Grant 6,911,378 - Conti , et al. June 28, 2
2005-06-28
Method And Structure To Enhance Temperature/humidity/bias Performance Of Semiconductor Devices By Surface Modification
App 20050116357 - Fitzsimmons, John A. ;   et al.
2005-06-02
Roughened bonding pad and bonding wire surfaces for low pressure wire bonding
App 20050112861 - Fitzsimmons, John A. ;   et al.
2005-05-26
Apparatus and method for low pressure wirebond
App 20050098605 - Edelstein, Daniel C. ;   et al.
2005-05-12
Bilayer HDP CVD/PE CVD cap in advance BEOL interconnect structures and method thereof
Grant 6,887,783 - Chen , et al. May 3, 2
2005-05-03
Self-locking wire bond structure and method of making the same
App 20050082347 - Fitzsimmons, John A ;   et al.
2005-04-21
Method for reworking low-k polymers used in semiconductor structures
Grant 6,864,180 - Restaino , et al. March 8, 2
2005-03-08
Reliable low-k interconnect structure with hybrid dielectric
App 20050023693 - Fitzsimmons, John A. ;   et al.
2005-02-03
Method and apparatus for controlling coating thickness
Grant 6,849,563 - Barth , et al. February 1, 2
2005-02-01
Plasma Processing Material Reclamation And Reuse
App 20050011442 - Chen, Bomy A. ;   et al.
2005-01-20
Damascene interconnect structures including etchback for low-k dielectric materials
Grant 6,838,355 - Stamper , et al. January 4, 2
2005-01-04
Stabilization Of Fluorine-containing Dielectric Materials In A Metal Insulator Wiring Structure
App 20040266140 - Conti, Richard A. ;   et al.
2004-12-30
Bilayer HDP CVD / PE CVD cap in advanced BEOL interconnect structures and method thereof
App 20040173907 - Chen, Tze-Chiang ;   et al.
2004-09-09
Advanced BEOL interconnect structures with low-k PE CVD cap layer and method thereof
App 20040173908 - Barth, Edward ;   et al.
2004-09-09
Method and apparatus for controlling coating thickness
App 20040110394 - Barth, Edward ;   et al.
2004-06-10
Reliable low-k interconnect structure with hybrid dielectric
App 20040094839 - Fitzsimmons, John A. ;   et al.
2004-05-20
Advanced BEOL interconnect structures with low-k PE CVD cap layer and method thereof
Grant 6,737,747 - Barth , et al. May 18, 2
2004-05-18
Film planarization for low-k polymers used in semiconductor structures
Grant 6,638,878 - Restaino , et al. October 28, 2
2003-10-28
Method for cleaning and preconditioning a chemical vapor deposition chamber dome
Grant 6,626,188 - Fitzsimmons , et al. September 30, 2
2003-09-30
Interconnect structures containing stress adjustment cap layer
Grant 6,617,690 - Gates , et al. September 9, 2
2003-09-09
Integrated, active, moisture and oxygen getter layers
App 20030155655 - Fitzsimmons, John A. ;   et al.
2003-08-21
Advanced BEOL interconnect structures with low-k PE CVD cap layer and method thereof
App 20030132510 - Barth, Edward ;   et al.
2003-07-17
Bilayer HDP CVD / PE CVD cap in advanced BEOL interconnect structures and method thereof
App 20030134499 - Chen, Tze-Chiang ;   et al.
2003-07-17
Integration scheme for advanced BEOL metallization including low-k cap layer and method thereof
App 20030134495 - Gates, Stephen ;   et al.
2003-07-17
Film planarization for low-k polymers used in semiconductor structures
App 20030064605 - Restaino, Darryl D. ;   et al.
2003-04-03
Method for reworking low-K polymers used in semiconductor structures
App 20030062336 - Restaino, Darryl D. ;   et al.
2003-04-03
Method for cleaning and preconditioning a chemical vapor deposition chamber dome
App 20030000545 - Fitzsimmons, John A. ;   et al.
2003-01-02
Adhesion of silicon carbide films
Grant 6,252,295 - Cote , et al. June 26, 2
2001-06-26
Structure and fabrication of SiCr microfuses
Grant 5,340,775 - Carruthers , et al. August 23, 1
1994-08-23
Method for forming patterned films on a substrate
Grant 5,240,878 - Fitzsimmons , et al. August 31, 1
1993-08-31
Company Registrations
SEC0001219439FITZSIMMONS JOHN A

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