Fee; Setho Sing

Patent Applications and Registrations

Patent applications and USPTO patent grants for Fee; Setho Sing.The latest application filed is for "integrated circuit packages, methods of forming integrated circuit packages, and methods of assembling integrated circuit packages".

Company Profile

0.30.30

Fee; Setho Sing - Singapore SG
Fee; Setho Sing - Republic of Singapore SG

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Methods of forming integrated circuit packages Grant 8,709,866 - Fee , et al. April 29, 2	2014-04-29
Microelectronic devices having intermediate contacts for connection to interposer substrates, and associated methods of packaging microelectronic devices with intermediate contacts Grant 8,703,599 - Fee April 22, 2	2014-04-22
Integrated Circuit Packages, Methods of Forming Integrated Circuit Packages, And Methods of Assembling Integrated Circuit Packages App 20130330882 - Fee; Setho Sing ; et al.	2013-12-12
Integrated circuit packages Grant 8,531,031 - Fee , et al. September 10, 2	2013-09-10
Microelectronic Devices Having Intermediate Contacts For Connection To Interposer Substrates, And Associated Methods Of Packaging Microelectronic Devices With Intermediate Contacts App 20130082384 - Fee; Setho Sing	2013-04-04
Microelectronic devices having intermediate contacts for connection to interposer substrates, and associated methods of packaging microelectronic devices with intermediate contacts Grant 8,319,332 - Fee November 27, 2	2012-11-27
Integrated Circuit Packages App 20110233745 - Fee; Setho Sing ; et al.	2011-09-29
Methods of forming integrated circuit packages, and methods of assembling integrated circuit packages Grant 7,977,157 - Fee , et al. July 12, 2	2011-07-12
Microelectronic Devices Having Intermediate Contacts For Connection To Interposer Substrates, And Associated Methods Of Packaging Microelectronic Devices With Intermediate Contacts App 20100224989 - Fee; Setho Sing	2010-09-09
Microelectronic devices having intermediate contacts for connection to interposer substrates, and associated methods of packaging microelectronic devices with intermediate contacts Grant 7,745,944 - Fee June 29, 2	2010-06-29
Methods of Forming Integrated Circuit Packages, and Methods of Assembling Integrated Circuit Packages App 20100151630 - Fee; Setho Sing ; et al.	2010-06-17
Methods of assembling integrated circuit packages Grant 7,700,406 - Fee , et al. April 20, 2	2010-04-20
Semiconductor device assemblies and packages including multiple semiconductor device components Grant 7,573,136 - Jiang , et al. August 11, 2	2009-08-11
Methods for assembling semiconductor devices and interposers Grant 7,528,007 - Fee , et al. May 5, 2	2009-05-05
Integrated Circuit Packages, Methods of Forming Integrated Circuit Packages, And Methods of Assembling Integrated Circuit Packages App 20080284000 - Fee; Setho Sing ; et al.	2008-11-20
Ultrathin leadframe BGA circuit package Grant 7,294,911 - Lee , et al. November 13, 2	2007-11-13
Quad flat no-lead (QFN) grid array package, method of making and memory module and computer system including same Grant 7,279,780 - Fee , et al. October 9, 2	2007-10-09
Interposers with receptacles for receiving semiconductor devices and assemblies and packages including such interposers Grant 7,274,095 - Fee , et al. September 25, 2	2007-09-25
Ultrathin leadframe BGA circuit package App 20070099344 - Lee; Teck Kheng ; et al.	2007-05-03
Methods for assembling multiple semiconductor devices Grant 7,198,980 - Jiang , et al. April 3, 2	2007-04-03
Microelectronic devices having intermediate contacts for connection to interposer substrates, and associated methods of packaging microelectronic devices with intermediate contacts App 20070045872 - Fee; Setho Sing	2007-03-01
Ultrathin leadframe BGA circuit package Grant 7,183,134 - Lee , et al. February 27, 2	2007-02-27
Interposers and other carriers including a slot with laterally recessed area at an end thereof and semiconductor device assemblies and packages including such carriers Grant 7,112,876 - Fee , et al. September 26, 2	2006-09-26
Quad flat no lead (QFN) grid array package Grant 7,109,572 - Fee , et al. September 19, 2	2006-09-19
Methods for assembling semiconductor devices and interposers App 20060194373 - Fee; Setho Sing ; et al.	2006-08-31
Quad flat no-lead (QFN) grid array package, method of making and memory module and computer system including same Grant 7,075,816 - Fee , et al. July 11, 2	2006-07-11
Interposers and other carriers including a slot with laterally recessed area at an end thereof and semiconductor device assemblies and packages including such carriers App 20060006513 - Fee; Setho Sing ; et al.	2006-01-12
Quad flat no-lead (QFN) grid array package, method of making and memory module and computer system including same App 20050285241 - Fee, Setho Sing ; et al.	2005-12-29
Quad flat no lead (QFN) grid array package, method of making and memory module and computer system including same Grant 6,967,125 - Fee , et al. November 22, 2	2005-11-22
Semiconductor device assemblies and packages including multiple semiconductor device components App 20050218518 - Jiang, Tongbi ; et al.	2005-10-06
Packaged microelectronic component assemblies Grant 6,951,982 - Chye , et al. October 4, 2	2005-10-04
Methods for forming a slot with a laterally recessed area at an end thereof through an interposer or other carrier substrate Grant 6,951,777 - Fee , et al. October 4, 2	2005-10-04
Packaged microelectronic devices and methods of forming same Grant 6,943,450 - Fee , et al. September 13, 2	2005-09-13
Semiconductor device assemblies and packages including multiple semiconductor devices and methods Grant 6,906,415 - Jiang , et al. June 14, 2	2005-06-14
Packaged microelectronic devices and methods of forming same Grant 6,876,066 - Fee , et al. April 5, 2	2005-04-05
Interposer with a lateral recess in a slot to facilitate connection of intermediate conductive elements to bond pads of a semiconductor die with which the interposer is assembled Grant 6,870,247 - Fee , et al. March 22, 2	2005-03-22
Packaged microelectronic devices and methods of forming same App 20050023655 - Fee, Setho Sing ; et al.	2005-02-03
Ultrathin leadframe BGA circuit package App 20050026386 - Lee, Teck Kheng ; et al.	2005-02-03
Enhanced BGA grounded heatsink Grant 6,828,671 - Aquien , et al. December 7, 2	2004-12-07
Ball grid array interposer, packages and methods App 20040217459 - Fee, Setho Sing ; et al.	2004-11-04
Methods for forming a slot with a laterally recessed area at an end thereof through an interposer or other carrier substrate App 20040203191 - Fee, Setho Sing ; et al.	2004-10-14
Methods for forming a slot with a laterally recessed area at an end thereof through an interposer or other carrier substrate Grant 6,773,960 - Fee , et al. August 10, 2	2004-08-10
Quad flat no-lead (QFN) grid array package, method of making and memory module and computer system including same App 20040114426 - Fee, Setho Sing ; et al.	2004-06-17
Heat spreader hole pin 1 identifier Grant 6,750,534 - Aquien , et al. June 15, 2	2004-06-15
Ball grid array interposer, packages and methods Grant 6,746,894 - Fee , et al. June 8, 2	2004-06-08
Methods for assembling multiple semiconductor devices App 20040106229 - Jiang, Tongbi ; et al.	2004-06-03
Packaged microelectronic component assemblies App 20040100772 - Chye, Lim Thiam ; et al.	2004-05-27
Quad flat no-lead (QFN) grid array package, method of making and memory module and computer system including same App 20040080030 - Fee, Setho Sing ; et al.	2004-04-29
Semiconductor device assemblies and packages including multiple semiconductor devices and methods App 20030230801 - Jiang, Tongbi ; et al.	2003-12-18
Ultrathin leadframe BGA circuit package App 20030197267 - Lee, Teck Kheng ; et al.	2003-10-23
Methods for forming a slot with a laterally recessed area at an end thereof through an interposer or other carrier substrate App 20030176045 - Fee, Setho Sing ; et al.	2003-09-18
Quad flat no lead (QFN) grid array package, method of making and memory module and computer system including same App 20030164554 - Fee, Setho Sing ; et al.	2003-09-04
Enhanced BGA grounded heatsink App 20030085462 - Aquien, Weddie ; et al.	2003-05-08
Packaged Microelectronic Devices And Methods Of Forming Same App 20030042581 - Fee, Setho Sing ; et al.	2003-03-06
Interposer, packages including the interposer, and methods App 20020167092 - Fee, Setho Sing ; et al.	2002-11-14
Enhanced BGA grounded heatsink App 20020163064 - Aquien, Weddie ; et al.	2002-11-07
Ball grid array interposer, packages and methods App 20020142513 - Fee, Setho Sing ; et al.	2002-10-03
Heat spreader hole pin 1 identifier App 20020093095 - Aquien, Weddie Pacio ; et al.	2002-07-18
Heat spreader hole pin 1 identifier Grant 6,403,401 - Aquien , et al. June 11, 2	2002-06-11

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.