loadpatents
name:-0.028970956802368
name:-0.016800165176392
name:-0.0025680065155029
Dietz; Franz Patent Filings

Dietz; Franz

Patent Applications and Registrations

Patent applications and USPTO patent grants for Dietz; Franz.The latest application filed is for "aging detector for an electrical circuit component, method for monitoring an aging of a circuit component, component and control device".

Company Profile
2.17.24
  • Dietz; Franz - Willmandingen DE
  • Dietz; Franz - Untereisesheim DE
  • Dietz; Franz - Heilbronn DE
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Aging detector for an electrical circuit component, method for monitoring an aging of a circuit component, component and control device
Grant 11,175,331 - Schneider , et al. November 16, 2
2021-11-16
Aging Detector For An Electrical Circuit Component, Method For Monitoring An Aging Of A Circuit Component, Component And Control Device
App 20210199708 - Schneider; Daniel ;   et al.
2021-07-01
Assembly of strip conductors, device, and method for determining errors in a semiconductor circuit
Grant 10,684,323 - Dietz , et al.
2020-06-16
Contact-via chain as corrosion detector
Grant 10,431,507 - Schneider , et al. O
2019-10-01
Device And Method For Detecting A Number Of Electrostatic Discharges
App 20190271728 - Seitzinger; Timo ;   et al.
2019-09-05
Assembly Of Conducting Tracks, Device, And Method For The Fault Detection Of A Semiconductor Circuit
App 20180143243 - Dietz; Franz ;   et al.
2018-05-24
Contact-via Chain As Corrosion Detector
App 20180138098 - Schneider; Daniel ;   et al.
2018-05-17
Lateral DMOS transistor and method for the production thereof
Grant 7,973,333 - Dietz , et al. July 5, 2
2011-07-05
Integrierter Schaltungsteil
App 20110133286 - DIETZ; Franz
2011-06-09
Method for manufacturing a metal-semiconductor contact in semiconductor components
Grant 7,923,362 - Dietz , et al. April 12, 2
2011-04-12
Method for producing deep trench structures
Grant 7,851,326 - Dietz , et al. December 14, 2
2010-12-14
Semiconductor array and method for manufacturing a semiconductor array
App 20090160009 - Dietz; Franz ;   et al.
2009-06-25
DMOS transistor with optimized periphery structure
Grant 7,521,756 - Dietz , et al. April 21, 2
2009-04-21
Manufacturing Process For Integrated Microelectromechanical Components
App 20090017305 - Dietz; Franz ;   et al.
2009-01-15
Method for producing a semiconductor arrangement, semiconductor arrangement and its application
App 20070290226 - Berntgen; Juergen ;   et al.
2007-12-20
Nonvolatile memory cell of a circuit integrated in a semiconductor chip, method for producing the same, and application of a nonvolatile memory cell
App 20070267683 - Dietz; Franz
2007-11-22
Method for producing deep trench structures
App 20070264792 - Dietz; Franz ;   et al.
2007-11-15
Lateral DMOS transistor and method for the production thereof
App 20070235779 - Dietz; Franz ;   et al.
2007-10-11
Registration Mark Within An Overlap Of Dopant Regions
App 20070207589 - Dietz; Franz ;   et al.
2007-09-06
DMOS transistor with optimized periphery structure
App 20070132019 - Dietz; Franz ;   et al.
2007-06-14
Registration mark within an overlap of dopant regions
Grant 7,230,342 - Dietz , et al. June 12, 2
2007-06-12
Process for manufacturing vertically insulated structural components on SOI material of various thickness
Grant 7,189,619 - Dietz , et al. March 13, 2
2007-03-13
Registration mark within an overlap of dopant regions
App 20070048959 - Dietz; Franz ;   et al.
2007-03-01
Method for manufacturing a metal-semiconductor contact in semiconductor components
App 20060281291 - Dietz; Franz ;   et al.
2006-12-14
Method of fabricating semiconductor components through implantation and diffusion in a semiconductor substrate
Grant 7,144,796 - Dietz , et al. December 5, 2
2006-12-05
Monolithic integratable circuit arrangement for protection against a transient voltage
Grant 7,130,175 - Dietz , et al. October 31, 2
2006-10-31
Semiconductor over-voltage protection structure for integrated circuit and for diode
Grant 7,009,256 - Dietz , et al. March 7, 2
2006-03-07
Method of producing active semiconductor layers of different thicknesses in an SOI wafer
Grant 7,001,804 - Dietz , et al. February 21, 2
2006-02-21
Process for doping a semiconductor body
Grant 6,933,215 - Bromberger , et al. August 23, 2
2005-08-23
Process for manufacturing vertically insulated structural components on SOI material of various thickness
App 20050167779 - Dietz, Franz ;   et al.
2005-08-04
Method of producing active semiconductor layers of different thicknesses in an SOI wafer
App 20050170571 - Dietz, Franz ;   et al.
2005-08-04
Method of fabricating semiconductor components through implantation and diffusion in a semiconductor substrate
App 20050095804 - Dietz, Franz ;   et al.
2005-05-05
Process for manufacturing a DMOS transistor
Grant 6,878,603 - Bromberger , et al. April 12, 2
2005-04-12
Semiconductor over-voltage protection structure for integrated circuit and for diode
App 20050062110 - Dietz, Franz ;   et al.
2005-03-24
Monolithic integratable circuit arrangement for protection against a transient voltage
App 20050024801 - Dietz, Franz ;   et al.
2005-02-03
Process for manufacturing a DMOS transistor
Grant 6,806,131 - Bromberger , et al. October 19, 2
2004-10-19
Process for manufacturing a DMOS transistor
Grant 6,780,713 - Bromberger , et al. August 24, 2
2004-08-24
Process for manufacturing a DMOS transistor
App 20030001198 - Bromberger, Christoph ;   et al.
2003-01-02
Process for doping a semiconductor body
App 20030003643 - Bromberger, Christoph ;   et al.
2003-01-02
Process for manufacturing a DMOS transistor
App 20030003638 - Bromberger, Christoph ;   et al.
2003-01-02
Process for manufacturing a DMOS transistor
App 20030003669 - Bromberger, Christoph ;   et al.
2003-01-02

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