DESAI; Kunal

Patent Applications and Registrations

Patent applications and USPTO patent grants for DESAI; Kunal.The latest application filed is for "effective dram interleaving for asymmetric size channels or ranks while supporting improved partial array self-refresh".

Company Profile

5.9.15

DESAI; Kunal - Bangalore IN
DESAI; Kunal - Menlo Park CA
Desai; Kunal - Karnataka IN
Desai; Kunal - Karnrataka IN
Desai; Kunal - Foster City CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Trademarks

Patent Activity

Patent	Date
Effective DRAM Interleaving For Asymmetric Size Channels Or Ranks While Supporting Improved Partial Array Self-Refresh App 20220254409 - DESAI; Kunal ; et al.	2022-08-11
Methods And Systems For Electronically Rewarding Travelers For Usage Of Their Travel Itineraries By Other Travelers App 20210133795 - DESAI; Kunal ; et al.	2021-05-06
Bandwidth-based selective memory channel connectivity on a system on chip Grant 10,769,073 - Desai , et al. Sep	2020-09-08
System and method for dynamic buffer sizing in a computing device Grant 10,713,189 - Bandur Puttappa , et al.	2020-07-14
Dynamic adjustment of memory channel interleave granularity Grant 10,628,308 - Desai , et al.	2020-04-21
Dynamic Adjustment Of Memory Channel Interleave Granularity App 20190361807 - DESAI; KUNAL ; et al.	2019-11-28
Bandwidth-based Selective Memory Channel Connectivity On A System On Chip App 20190306005 - DESAI; KUNAL ; et al.	2019-10-03
Receiver clock test circuitry and related methods and apparatuses Grant 10,320,534 - Chandrasekaran , et al.	2019-06-11
System And Method For Dynamic Buffer Sizing In A Computing Device App 20180373652 - Bandur Puttappa; Vasantha Kumar ; et al.	2018-12-27
Worst-case Memory Latency Reduction Via Data Cache Preloading Based On Page Table Entry Read Data App 20180336141 - DESAI; KUNAL ; et al.	2018-11-22
Receiver Clock Test Circuitry And Related Methods And Apparatuses App 20180248661 - Chandrasekaran; Srinivasaraman ; et al.	2018-08-30
Receiver clock test circuitry and related methods and apparatuses Grant 9,906,335 - Chandrasekaran , et al. February 27, 2	2018-02-27
Receiver Clock Test Circuitry And Related Methods And Apparatuses App 20170187498 - Chandrasekaran; Srinivasaraman ; et al.	2017-06-29
Integrated Circuit With Low Latency And High Density Routing Between A Memory Controller Digital Core And I/os App 20170083461 - Desai; Kunal ; et al.	2017-03-23
Receiver clock test circuitry and related methods and apparatuses Grant 9,537,617 - Chandrasekaran , et al. January 3, 2	2017-01-03
Receiver Clock Test Circuitry And Related Methods And Apparatuses App 20160233991 - Chandrasekaran; Srinivasaraman ; et al.	2016-08-11
Receiver clock test circuitry and related methods and apparatuses Grant 9,294,262 - Chandrasekaran , et al. March 22, 2	2016-03-22
Receiver Clock Test Circuitry And Related Methods And Apparatuses App 20150372804 - Chandrasekaran; Srinivasaraman ; et al.	2015-12-24
Receiver clock test circuitry and related methods and apparatuses Grant 9,071,407 - Chandrasekaran , et al. June 30, 2	2015-06-30
Receiver Clock Test Circuitry And Related Methods And Apparatuses App 20130294490 - Chandrasekaran; Srinivasaraman ; et al.	2013-11-07
Match rules to identify duplicate records in inbound data Grant 8,078,651 - Desai , et al. December 13, 2	2011-12-13
Match Rules To Identify Duplicate Records In Inbound Data App 20090193046 - Desai; Kunal ; et al.	2009-07-30

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