Desai Kunal

USPTO Trademark & Patent Filings

Desai Kunal

Trademark applications and grants for Desai Kunal. Desai Kunal has 4 trademark applications. The latest application filed is for "CAPITAL LETTER U WITH A REVERSE AMPERSAND AND CAPITAL LETTER O"

Company Profile
    Company Aliases
  • Desai, Kunal
  • kunal desai
  • DESAI; Kunal - Bangalore IN
  • DESAI; Kunal - Menlo Park CA
  • DESAI; KUNAL - BANGALORE IN
  • Desai; Kunal - Bangalore IN
  • Desai; Kunal - Karnataka IN

Trademarks Patents
Patent Applications
Patent ApplicationDate
Effective DRAM Interleaving For Asymmetric Size Channels Or Ranks While Supporting Improved Partial Array Self-Refresh
20220254409 - 17/174073 DESAI; Kunal ;   et al.
2022-08-11
METHODS AND SYSTEMS FOR ELECTRONICALLY REWARDING TRAVELERS FOR USAGE OF THEIR TRAVEL ITINERARIES BY OTHER TRAVELERS
20210133795 - 17/090526 DESAI; Kunal ;   et al.
2021-05-06
DYNAMIC ADJUSTMENT OF MEMORY CHANNEL INTERLEAVE GRANULARITY
20190361807 - 15/988863 DESAI; KUNAL ;   et al.
2019-11-28
BANDWIDTH-BASED SELECTIVE MEMORY CHANNEL CONNECTIVITY ON A SYSTEM ON CHIP
20190306005 - 15/939031 DESAI; KUNAL ;   et al.
2019-10-03
SYSTEM AND METHOD FOR DYNAMIC BUFFER SIZING IN A COMPUTING DEVICE
20180373652 - 15/634701 Bandur Puttappa; Vasantha Kumar ;   et al.
2018-12-27
Bandwidth-based selective memory channel connectivity on a system on chip
10,769,073 - 15/939,031 Desai , et al. Sep
2020-09-08
System and method for dynamic buffer sizing in a computing device
10,713,189 - 15/634,701 Bandur Puttappa , et al.
2020-07-14
Dynamic adjustment of memory channel interleave granularity
10,628,308 - 15/988,863 Desai , et al.
2020-04-21
Receiver clock test circuitry and related methods and apparatuses
10,320,534 - 15/872,885 Chandrasekaran , et al.
2019-06-11
Receiver clock test circuitry and related methods and apparatuses
9,906,335 - 15/361,152 Chandrasekaran , et al. February 27, 2
2018-02-27
Patent Grants & Applications

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