Derderian; Garo Jacques

Patent Applications and Registrations

Patent applications and USPTO patent grants for Derderian; Garo Jacques.The latest application filed is for "tapered fin-type field-effect transistors".

Company Profile

7.10.9

Derderian; Garo Jacques - Saratoga Springs NY
DERDERIAN; Garo Jacques - Saratoga Spring NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Tapered fin-type field-effect transistors Grant 10,832,967 - Zang , et al. November 10, 2	2020-11-10
Hybrid fin cut with improved fin profiles Grant 10,586,736 - Wang , et al.	2020-03-10
Tapered Fin-type Field-effect Transistors App 20200051868 - Zang; Hui ; et al.	2020-02-13
Hybrid Fin Cut With Improved Fin Profiles App 20190378763 - WANG; Haiting ; et al.	2019-12-12
Transistor Fins With Different Thickness Gate Dielectric App 20190371796 - Zang; Hui ; et al.	2019-12-05
Methods, Apparatus, And System For A Semiconductor Device Comprising Gates With Short Heights App 20190355615 - Shu; Jiehui ; et al.	2019-11-21
Transistor fins with different thickness gate dielectric Grant 10,475,791 - Zang , et al. Nov	2019-11-12
Methods, apparatus, and system for a semiconductor device comprising gates with short heights Grant 10,418,272 - Shu , et al. Sept	2019-09-17
Devices And Methods Of Forming Sadp On Sram And Saqp On Logic App 20180012760 - SHU; Jiehui ; et al.	2018-01-11
Devices and methods of forming SADP on SRAM and SAQP on logic Grant 9,761,452 - Shu , et al. September 12, 2	2017-09-12
Fin cutting process for manufacturing FinFET semiconductor devices Grant 9,754,792 - Derderian September 5, 2	2017-09-05
Fin Cutting Process For Manufacturing Finfet Semiconductor Devices App 20170250088 - Derderian; Garo Jacques	2017-08-31
Methods of forming CMOS based integrated circuit products using disposable spacers Grant 9,704,759 - Peng , et al. July 11, 2	2017-07-11
Methods Of Forming Cmos Based Integrated Circuit Products Using Disposable Spacers App 20170069547 - Peng; Wen Pin ; et al.	2017-03-09
Methods of forming reduced thickness spacers in CMOS based integrated circuit products Grant 9,385,124 - Peng , et al. July 5, 2	2016-07-05
Formation of carbon-rich contact liner material Grant 9,318,440 - Cao , et al. April 19, 2	2016-04-19
Formation Of Carbon-rich Contact Liner Material App 20150357285 - CAO; Huy ; et al.	2015-12-10
Formation of carbon-rich contact liner material Grant 9,130,019 - Cao , et al. September 8, 2	2015-09-08
Formation Of Carbon-rich Contact Liner Material App 20150194342 - CAO; Huy ; et al.	2015-07-09

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.