| Patent | Date |
|---|
Carbon nanotube-based structures and methods for removing heat from solid-state devices
Grant 8,080,871 - Dangelo , et al. December 20, 2 | 2011-12-20 |
System and method using self-assembled nano structures in the design and fabrication of an integrated circuit micro-cooler
Grant 8,039,953 - Dangelo October 18, 2 | 2011-10-18 |
Carbon Nanotube-Based Structures and Methods for Removing Heat from Solid-State Devices
App 20110103020 - Dangelo; Carlos ; et al. | 2011-05-05 |
Nanoengineered thermal materials based on carbon nanotube array composites
Grant 7,784,531 - Li , et al. August 31, 2 | 2010-08-31 |
Vapor chamber heat sink having a carbon nanotube fluid interface
Grant 7,732,918 - Dangelo , et al. June 8, 2 | 2010-06-08 |
In-chip structures and methods for removing heat from integrated circuits
Grant 7,656,027 - Dangelo , et al. February 2, 2 | 2010-02-02 |
Structures & Methods for Combining Carbon Nanotube Array and Organic Materials as a Variable Gap Interposer for Removing Heat from Solid-State Devices
App 20090302295 - Schwartz; Peter ; et al. | 2009-12-10 |
Integrated circuit micro-cooler having multi-layers of tubes of a CNT array
Grant 7,538,422 - Dangelo , et al. May 26, 2 | 2009-05-26 |
Vapor Chamber Heat Sink Having A Carbon Nanotube Fluid Interface
App 20080128116 - Dangelo; Carlos ; et al. | 2008-06-05 |
Nanoengineered Thermal Materials Based On Carbon Nanotube Array Composites
App 20070163769 - Li; Jun ; et al. | 2007-07-19 |
Integrated Circuit Micro-Cooler Having Tubes of a CNT Array in Essentially the Same Height over a Surface
App 20070126116 - Dangelo; Carlos ; et al. | 2007-06-07 |
Integrated Circuit Micro-Cooler with Double-Sided Tubes of a CNT Array
App 20070114658 - Dangelo; Carlos ; et al. | 2007-05-24 |
Integrated Circuit Micro-cooler Having Multi-layers Of Tubes Of A Cnt Array
App 20070114657 - Dangelo; Carlos ; et al. | 2007-05-24 |
Method and apparatus for establishing optimal thermal contact between opposing surfaces
App 20070097648 - Xu; Kevin ; et al. | 2007-05-03 |
In-chip structures and methods for removing heat from integrated circuits
App 20060278901 - Dangelo; Carlos ; et al. | 2006-12-14 |
System and method using self-assembled nano structures in the design and fabrication of an integrated circuit micro-cooler
App 20060270116 - Dangelo; Carlos | 2006-11-30 |
Apparatus and method for cooling ICs using nano-rod based chip-level heat sinks
App 20060231237 - Dangelo; Carlos | 2006-10-19 |
System and method using self-assembled nano structures in the design and fabrication of an integrated circuit micro-cooler
Grant 7,109,581 - Dangelo , et al. September 19, 2 | 2006-09-19 |
System and method using self-assembled nano structures in the design and fabrication of an integrated circuit micro-cooler
App 20050046017 - Dangelo, Carlos | 2005-03-03 |
Method and apparatus for the use of self-assembled nanowires for the removal of heat from integrated circuits
App 20040152240 - Dangelo, Carlos | 2004-08-05 |
Method And System For Creating, Deriving And Validating Structural Description Of Electronic System From Higher Level, Behavior-oriented Description, Including Interactive Schematic Design And Simulation
Grant 6,470,482 - Rostoker , et al. October 22, 2 | 2002-10-22 |
Method and system for creating and validating low level description of electronic design
Grant 6,324,678 - Dangelo , et al. November 27, 2 | 2001-11-27 |
Method and system for creating, validating, and scaling structural description of electronic device
Grant 6,216,252 - Dangelo , et al. April 10, 2 | 2001-04-10 |
Object-oriented multi-media architecture
Grant 5,946,487 - Dangelo August 31, 1 | 1999-08-31 |
Method and system for creating and verifying structural logic model of electronic design from behavioral description, including generation of logic and timing models
Grant 5,933,356 - Rostoker , et al. August 3, 1 | 1999-08-03 |
Specification and design of complex digital systems
Grant 5,910,897 - Dangelo , et al. June 8, 1 | 1999-06-08 |
Integrated circuit device having a switched routing network
Grant 5,898,677 - Deeley , et al. April 27, 1 | 1999-04-27 |
Methodology for deriving executable low-level structural descriptions and valid physical implementations of circuits and systems from semantic specifications and descriptions thereof
Grant 5,880,971 - Dangelo , et al. March 9, 1 | 1999-03-09 |
Method and system for creating and validating low-level description of electronic design
Grant 5,870,308 - Dangelo , et al. February 9, 1 | 1999-02-09 |
Testing and exercising individual, unsingulated dies on a wafer
Grant 5,838,163 - Rostoker , et al. November 17, 1 | 1998-11-17 |
Method and system for creating and validating low level description of electronic design from higher level, behavior-oriented description, including interactive system for hierarchical display of control and dataflow information
Grant 5,801,958 - Dangelo , et al. September 1, 1 | 1998-09-01 |
Programmable microsystems in silicon
Grant 5,665,989 - Dangelo September 9, 1 | 1997-09-09 |
Integrated circuit wafer comprising unsingulated dies, and decoder arrangement for individually testing the dies
Grant 5,648,661 - Rostoker , et al. * July 15, 1 | 1997-07-15 |
High-speed internal interconnection technique for integrated circuits that reduces the number of signal lines through multiplexing
Grant 5,615,126 - Deeley , et al. March 25, 1 | 1997-03-25 |
Method and system for creating, validating, and scaling structural description of electronic device
Grant 5,598,344 - Dangelo , et al. * January 28, 1 | 1997-01-28 |
Method and system for creating and verifying structural logic model of electronic design from behavioral description, including generation of logic and timing models
Grant 5,572,437 - Rostoker , et al. * November 5, 1 | 1996-11-05 |
Method and system for creating and validating low level description of electronic design
Grant 5,572,436 - Dangelo , et al. * November 5, 1 | 1996-11-05 |
Method and system for creating and validating low level structural description of electronic design from higher level, behavior-oriented description, including estimating power dissipation of physical implementation
Grant 5,557,531 - Rostoker , et al. * September 17, 1 | 1996-09-17 |
Method and system for creating and validating low level description of electronic design from higher level, behavior-oriented description, including interactive system for hierarchical display of control and dataflow information
Grant 5,555,201 - Dangelo , et al. * September 10, 1 | 1996-09-10 |
Method and system for creating and validating low level description of electronic design from higher level, behavior-oriented description, using milestone matrix incorporated into user-interface
Grant 5,553,002 - Dangelo , et al. * September 3, 1 | 1996-09-03 |
Method and system for creating, deriving and validating structural description of electronic system from higher level, behavior-oriented description, including interactive schematic design and simulation
Grant 5,544,067 - Rostoker , et al. * August 6, 1 | 1996-08-06 |
Method and system for creating and validating low level description of electronic design from higher level, behavior-oriented description, including estimation and comparison of low-level design constraints
Grant 5,544,066 - Rostoker , et al. * August 6, 1 | 1996-08-06 |
Method and system for creating and validating low level description of electronic design from higher level, behavior-oriented description, including estimation and comparison of timing parameters
Grant 5,541,849 - Rostoker , et al. * July 30, 1 | 1996-07-30 |
Testing and exercising individual, unsingulated dies on a wafer
Grant 5,539,325 - Rostoker , et al. July 23, 1 | 1996-07-23 |
ECAD system for deriving executable low-level structural descriptions and valid physical implementations of circuits and systems from high-level semantic descriptions thereof
Grant 5,526,277 - Dangelo , et al. June 11, 1 | 1996-06-11 |
Specification and design of complex digital systems
Grant 5,493,508 - Dangelo , et al. February 20, 1 | 1996-02-20 |
Testing and exercising individual, unsingulated dies on a wafer
Grant 5,442,282 - Rostoker , et al. August 15, 1 | 1995-08-15 |
Individually powering-up unsingulated dies on a wafer
Grant 5,389,556 - Rostoker , et al. February 14, 1 | 1995-02-14 |
Methodology for deriving executable low-level structural descriptions and valid physical implementations of circuits and systems from high-level semantic specifications and descriptions thereof
Grant 5,222,030 - Dangelo , et al. June 22, 1 | 1993-06-22 |
| 