Damberg; Philip

Patent Applications and Registrations

Patent applications and USPTO patent grants for Damberg; Philip.The latest application filed is for "package-on-package assembly with wire bond vias".

Company Profile

2.51.55

Damberg; Philip - Cupertino CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Package-on-package Assembly With Wire Bond Vias App 20220165703 - Chau; Ellis ; et al.	2022-05-26
Package-on-package assembly with wire bond vias Grant 11,189,595 - Chau , et al. November 30, 2	2021-11-30
Package-on-package Assembly With Wire Bond Vias App 20210035948 - Chau; Ellis ; et al.	2021-02-04
Package-on-package assembly with wire bond vias Grant 10,756,049 - Chau , et al. A	2020-08-25
Package-on-package Assembly With Wire Bond Vias App 20180026007 - Chau; Ellis ; et al.	2018-01-25
Semiconductor chip assembly and method for making same App 20170309593 - KANG; Teck-Gyu ; et al.	2017-10-26
Package-on-package assembly with wire bond vias Grant 9,761,558 - Chau , et al. September 12, 2	2017-09-12
Semiconductor chip assembly and method for making same Grant 9,716,075 - Kang , et al. July 25, 2	2017-07-25
Substrate and assembly thereof with dielectric removal for increased post height Grant 9,666,450 - Sakuma , et al. May 30, 2	2017-05-30
Fan-out WLP with package App 20160254247 - SATO; Hiroaki ; et al.	2016-09-01
Substrate And Assembly Thereof With Dielectric Removal For Increased Post Height App 20160233109 - Sakuma; Kazuo ; et al.	2016-08-11
Method for manufacturing a fan-out WLP with package Grant 9,337,165 - Sato , et al. May 10, 2	2016-05-10
Substrate and assembly thereof with dielectric removal for increased post height Grant 9,318,460 - Sakuma , et al. April 19, 2	2016-04-19
Package-on-package assembly with wire bond vias Grant 9,252,122 - Chau , et al. February 2, 2	2016-02-02
Semiconductor Chip Assembly And Method For Making Same App 20160005711 - Kang; Teck-Gyu ; et al.	2016-01-07
Impedence controlled packages with metal sheet or 2-layer RDL Grant 9,136,197 - Haba , et al. September 15, 2	2015-09-15
Semiconductor chip assembly and method for making same Grant 9,137,903 - Kang , et al. September 15, 2	2015-09-15
Package-on-package Assembly With Wire Bond Vias App 20150255424 - Chau; Ellis ; et al.	2015-09-10
Package-on-package assembly with wire bond vias Grant 9,105,483 - Chau , et al. August 11, 2	2015-08-11
High Strength Through-substrate Vias App 20150146393 - UZOH; CYPRIAN EMEKA ; et al.	2015-05-28
Package-on-package assembly with wire bond vias Grant 9,041,227 - Chau , et al. May 26, 2	2015-05-26
Impedance controlled packages with metal sheet or 2-layer rdl Grant 8,981,579 - Haba , et al. March 17, 2	2015-03-17
Microelectronic assembly comprising dielectric structures with different young modulus and having reduced mechanical stresses between the device terminals and external contacts Grant 8,957,520 - Sato , et al. February 17, 2	2015-02-17
Fan-Out WLP With Package App 20150044824 - Sato; Hiroaki ; et al.	2015-02-12
Methods of fabricating a flip chip package for dram with two underfill materials Grant 8,951,845 - Sakuma , et al. February 10, 2	2015-02-10
Substrate And Assembly Thereof With Dielectric Removal For Increased Post Height App 20150028480 - Sakuma; Kazuo ; et al.	2015-01-29
Method of making wire bond vias and microelectronic package having wire bond vias Grant 8,940,630 - Damberg , et al. January 27, 2	2015-01-27
Fan-out microelectronic unit WLP having interconnects comprising a matrix of a high melting point, a low melting point and a polymer material Grant 8,890,304 - Sato , et al. November 18, 2	2014-11-18
Substrate and assembly thereof with dielectric removal for increased post height Grant 8,884,432 - Sakuma , et al. November 11, 2	2014-11-11
Impedance Controlled Packages With Metal Sheet Or 2-layer Rdl App 20140291871 - Haba; Belgacem ; et al.	2014-10-02
Package-on-package assembly with wire bond vias Grant 8,836,136 - Chau , et al. September 16, 2	2014-09-16
Microelectronic assembly with joined bond elements having lowered inductance Grant 8,816,514 - Haba , et al. August 26, 2	2014-08-26
Method Of Making Wire Bond Vias And Microelectronic Package Having Wire Bond Vias App 20140220744 - Damberg; Philip ; et al.	2014-08-07
Impedance controlled packages with metal sheet or 2-layer RDL Grant 8,786,083 - Haba , et al. July 22, 2	2014-07-22
High strength through-substrate vias Grant 8,785,790 - Uzoh , et al. July 22, 2	2014-07-22
Flip Chip Package For Dram With Two Underfill Materials App 20140141568 - Sakuma; Kazuo ; et al.	2014-05-22
Microelectronic Assembly With Joined Bond Elements Having Lowered Inductance App 20140124565 - Haba; Belgacem ; et al.	2014-05-08
Flip chip package for DRAM with two underfill materials Grant 8,637,992 - Sakuma , et al. January 28, 2	2014-01-28
Package-on-package Assembly With Wire Bond Vias App 20130328219 - Chau; Ellis ; et al.	2013-12-12
Ultra-thin Near-hermetic Package Based On Rainier App 20130316501 - Honer; Kenneth Allen ; et al.	2013-11-28
Microelectronic Assembly With Joined Bond Elements Having Lowered Inductance App 20130292834 - Haba; Belgacem ; et al.	2013-11-07
Micro pin grid array with pin motion isolation Grant 8,531,039 - Damberg , et al. September 10, 2	2013-09-10
Chip with sintered connections to package Grant 8,525,338 - Sato , et al. September 3, 2	2013-09-03
Ultra-thin near-hermetic package based on rainier Grant 8,508,036 - Honer , et al. August 13, 2	2013-08-13
Package-on-package Assembly With Wire Bond Vias App 20130200533 - Chau; Ellis ; et al.	2013-08-08
Flip Chip Package For Dram With Two Underfill Materials App 20130134602 - Sakuma; Kazuo ; et al.	2013-05-30
High Strength Through-substrate Vias App 20130118784 - Uzoh; Cyprian ; et al.	2013-05-16
Package-on-package Assembly With Wire Bond Vias App 20130093088 - Chau; Ellis ; et al.	2013-04-18
Package-on-package Assembly With Wire Bond Vias App 20130093087 - Chau; Ellis ; et al.	2013-04-18
Package-on-package Assembly With Wire Bond Vias App 20130095610 - Chau; Ellis ; et al.	2013-04-18
Microelectronic assembly with joined bond elements having lowered inductance Grant 8,410,618 - Haba , et al. April 2, 2	2013-04-02
Package-on-package assembly with wire bond vias Grant 8,404,520 - Chau , et al. March 26, 2	2013-03-26
Semiconductor Chip Package Assembly And Method For Making Same App 20120313238 - Sato; Hiroaki ; et al.	2012-12-13
Chip With Sintered Connections To Package App 20120313264 - Sato; Hiroaki ; et al.	2012-12-13
Substrate And Assembly Thereof With Dielectric Removal For Increased Post Height App 20120313242 - Sakuma; Kazuo ; et al.	2012-12-13
Fan-out Wlp With Package App 20120313253 - Nakadaira; Yoshikuni ; et al.	2012-12-13
Impedence Controlled Packages With Metal Sheet Or 2-layer Rdl App 20120313228 - Haba; Belgacem ; et al.	2012-12-13
Semiconductor Chip Package Assembly And Method For Making Same App 20120286416 - Sato; Hiroaki ; et al.	2012-11-15
Semiconductor Chip Assembly And Method For Making Same App 20120155055 - Kang; Teck-Gyu ; et al.	2012-06-21
Impedance Controlled Packages With Metal Sheet Or 2-layer Rdl App 20120068338 - Haba; Belgacem ; et al.	2012-03-22
Microelectronic Assembly With Joined Bond Elements Having Lowered Inductance App 20110285020 - Haba; Belgacem ; et al.	2011-11-24
Microelectronic assembly with joined bond elements having lowered inductance Grant 8,008,785 - Haba , et al. August 30, 2	2011-08-30
Microelectronic Assembly With Joined Bond Elements Having Lowered Inductance App 20110147953 - Haba; Belgacem ; et al.	2011-06-23
Microelectronic Assembly With Bond Elements Having Lowered Inductance App 20110147928 - Haba; Belgacem ; et al.	2011-06-23
Micro Pin Grid Array With Pin Motion Isolation App 20100193970 - Damberg; Philip ; et al.	2010-08-05
Semiconductor chip packages and assemblies with chip carrier units Grant 7,732,912 - Damberg June 8, 2	2010-06-08
Micro pin grid array with pin motion isolation Grant 7,709,968 - Damberg , et al. May 4, 2	2010-05-04
Packaged systems with MRAM Grant 7,521,785 - Damberg , et al. April 21, 2	2009-04-21
Multilayer substrate with interconnection vias and method of manufacturing the same App 20090071707 - Endo; Kimitaka ; et al.	2009-03-19
Ultra-thin near-hermetic package based on rainier App 20080277775 - Honer; Kenneth Allen ; et al.	2008-11-13
Semiconductor chip packages and assemblies with chip carrier units App 20080036060 - Damberg; Philip	2008-02-14
Components, methods and assemblies for multi-chip packages App 20070166876 - Kim; Young-Gon ; et al.	2007-07-19
Stacked microelectronic assemblies Grant 7,149,095 - Warner , et al. December 12, 2	2006-12-12
Components, methods and assemblies for multi-chip packages Grant 7,061,122 - Kim , et al. June 13, 2	2006-06-13
Packaged systems with MRAM App 20050184399 - Damberg, Philip ; et al.	2005-08-25
Micro pin grid array with pin motion isolation App 20050173805 - Damberg, Philip ; et al.	2005-08-11
Microelectronic adaptors, assemblies and methods App 20050167817 - Damberg, Philip	2005-08-04
Stacked microelectronic assemblies and methods of making same Grant 6,885,106 - Damberg , et al. April 26, 2	2005-04-26
Components, methods and assemblies for multi-chip packages App 20040262777 - Kim, Young-Gon ; et al.	2004-12-30
Dense multichip module App 20040245617 - Damberg, Philip ; et al.	2004-12-09
Microelectronic adaptors, assemblies and methods App 20040217461 - Damberg, Philip	2004-11-04
Microelectronic adaptors, assemblies and methods Grant 6,765,288 - Damberg July 20, 2	2004-07-20
Microelectronic adaptors, assemblies and methods App 20040021211 - Damberg, Philip	2004-02-05
Methods of making microelectronic assemblies including folded substrates App 20030168725 - Warner, Michael ; et al.	2003-09-11
Methods Of Making Microelectronic Assemblies Using Bonding Stage And Bonding Stage Therefor App 20030054627 - Behlen, Jim ; et al.	2003-03-20
Low-height multi-component assemblies App 20030048624 - Damberg, Philip ; et al.	2003-03-13