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Handling oversize store to load forwarding in a processor
Grant 11,379,241 - Lloyd , et al. July 5, 2 | 2022-07-05 |
Dynamic translation lookaside buffer (TLB) invalidation using virtually tagged cache for load/store operations
Grant 11,263,151 - Campbell , et al. March 1, 2 | 2022-03-01 |
Area and power efficient mechanism to wakeup store-dependent loads according to store drain merges
Grant 11,243,773 - Lloyd , et al. February 8, 2 | 2022-02-08 |
Dynamic Translation Lookaside Buffer (tlb) Invalidation Using Virtually Tagged Cache For Load/store Operations
App 20220035748 - Campbell; David ; et al. | 2022-02-03 |
Handling Oversize Store To Load Forwarding In A Processor
App 20220035631 - Lloyd; Bryan ; et al. | 2022-02-03 |
Fusion Of Microprocessor Store Instructions
App 20220019436 - Lloyd; Bryan ; et al. | 2022-01-20 |
Handling unaligned load operations in a multi-slice computer processor
Grant 10,884,742 - Chadha , et al. January 5, 2 | 2021-01-05 |
Handling unaligned load operations in a multi-slice computer processor
Grant 10,831,481 - Chadha , et al. November 10, 2 | 2020-11-10 |
Preventing hazard flushes in an instruction sequencing unit of a multi-slice processor
Grant 10,761,854 - Cordes , et al. Sep | 2020-09-01 |
Instruction Age Matrix And Logic For Queues In A Processor
App 20190391815 - McGlone; Elizabeth ; et al. | 2019-12-26 |
Handling Unaligned Load Operations In A Multi-slice Computer Processor
App 20190384602 - CHADHA; SUNDEEP ; et al. | 2019-12-19 |
Handling unaligned load operations in a multi-slice computer processor
Grant 10,496,406 - Chadha , et al. De | 2019-12-03 |
Handling Unaligned Load Operations In A Multi-slice Computer Processor
App 20190286446 - CHADHA; SUNDEEP ; et al. | 2019-09-19 |
Handling unaligned load operations in a multi-slice computer processor
Grant 10,409,598 - Chadha , et al. Sept | 2019-09-10 |
Operation of a multi-slice processor implementing a load/store unit maintaining rejected instructions
Grant 10,268,518 - Chadha , et al. | 2019-04-23 |
Operation of a multi-slice processor implementing a load/store unit maintaining rejected instructions
Grant 10,255,107 - Chadha , et al. | 2019-04-09 |
Extended store forwarding for store misses without cache allocate
Grant 10,223,266 - Cordes , et al. | 2019-03-05 |
Out-of-order processor that avoids deadlock in processing queues by designating a most favored instruction
Grant 10,169,046 - Boersma , et al. J | 2019-01-01 |
Handling Unaligned Load Operations In A Multi-slice Computer Processor
App 20180300135 - CHADHA; SUNDEEP ; et al. | 2018-10-18 |
Handling Unaligned Load Operations In A Multi-slice Computer Processor
App 20180300136 - CHADHA; SUNDEEP ; et al. | 2018-10-18 |
Operation Of A Multi-slice Processor Implementing A Load/store Unit Maintaining Rejected Instructions
App 20180285161 - CHADHA; SUNDEEP ; et al. | 2018-10-04 |
Operation Of A Multi-slice Processor Implementing A Load/store Unit Maintaining Rejected Instructions
App 20180276132 - CHADHA; SUNDEEP ; et al. | 2018-09-27 |
Handling unaligned load operations in a multi-slice computer processor
Grant 10,073,697 - Chadha , et al. September 11, 2 | 2018-09-11 |
Handling unaligned load operations in a multi-slice computer processor
Grant 10,067,763 - Chadha , et al. September 4, 2 | 2018-09-04 |
Operation of a multi-slice processor implementing a load/store unit maintaining rejected instructions
Grant 10,042,770 - Chadha , et al. August 7, 2 | 2018-08-07 |
Operation of a multi-slice processor implementing a load/store unit maintaining rejected instructions
Grant 10,037,229 - Chadha , et al. July 31, 2 | 2018-07-31 |
Extended Store Forwarding For Store Misses Without Cache Allocate
App 20180150395 - CORDES; ROBERT A. ; et al. | 2018-05-31 |
Out-of-order Processor That Avoids Deadlock In Processing Queues By Designating A Most Favored Instruction
App 20180121205 - Boersma; Maarten J. ; et al. | 2018-05-03 |
Operation of a multi-slice processor implementing simultaneous two-target loads and stores
Grant 9,940,133 - Cordes , et al. April 10, 2 | 2018-04-10 |
Operation of a multi-slice processor implementing simultaneous two-target loads and stores
Grant 9,934,033 - Cordes , et al. April 3, 2 | 2018-04-03 |
Operation Of A Multi-slice Processor Implementing Simultaneous Two-target Loads And Stores
App 20170357507 - CORDES; ROBERT A. ; et al. | 2017-12-14 |
Operation Of A Multi-slice Processor Implementing Simultaneous Two-target Loads And Stores
App 20170357508 - CORDES; ROBERT A. ; et al. | 2017-12-14 |
Operation Of A Multi-slice Processor Implementing A Load/store Unit Maintaining Rejected Instructions
App 20170329641 - CHADHA; SUNDEEP ; et al. | 2017-11-16 |
Operation Of A Multi-slice Processor Implementing A Load/store Unit Maintaining Rejected Instructions
App 20170329713 - CHADHA; SUNDEEP ; et al. | 2017-11-16 |
Out-of-order processor that avoids deadlock in processing queues by designating a most favored instruction
Grant 9,798,549 - Boersma , et al. October 24, 2 | 2017-10-24 |
Preventing Hazard Flushes In An Instruction Sequencing Unit Of A Multi-slice Processor
App 20170300328 - CORDES; ROBERT A. ; et al. | 2017-10-19 |
Handling Unaligned Load Operations In A Multi-slice Computer Processor
App 20170168823 - CHADHA; SUNDEEP ; et al. | 2017-06-15 |
Handling Unaligned Load Operations In A Multi-slice Computer Processor
App 20170168945 - CHADHA; SUNDEEP ; et al. | 2017-06-15 |
Dependency matrix with reduced area and power consumption
Grant 8,127,116 - Islam , et al. February 28, 2 | 2012-02-28 |
Dependency Matrix with Reduced Area and Power Consumption
App 20100257336 - Islam; Saiful ; et al. | 2010-10-07 |
Method And Apparatus To Control Audio Switch During Call Handoff
App 20090141682 - ZOU; WEI ; et al. | 2009-06-04 |
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