| Patent | Date |
|---|
Single-mask alternating line deposition
Grant 11,437,317 - Anderson , et al. September 6, 2 | 2022-09-06 |
Nanosheet transistors with sharp junctions
Grant 11,430,651 - Cheng , et al. August 30, 2 | 2022-08-30 |
Barrier removal for conductor in top via integration scheme
Grant 11,430,735 - Anderson , et al. August 30, 2 | 2022-08-30 |
Top Via On Subtractively Etched Conductive Line
App 20220223473 - Anderson; Brent ; et al. | 2022-07-14 |
Forming self-aligned vias and air-gaps in semiconductor fabrication
Grant 11,380,583 - Clevenger , et al. July 5, 2 | 2022-07-05 |
High Aspect Ratio Vias For Integrated Circuits
App 20220199521 - Lanzillo; Nicholas Anthony ; et al. | 2022-06-23 |
Conductive Lines With Subtractive Cuts
App 20220181255 - Anderson; Brent ; et al. | 2022-06-09 |
Horizontal Rram Device And Architecture Fore Variability Reduction
App 20220173313 - Philip; Timothy Mathew ; et al. | 2022-06-02 |
Integrated Diode Memory Device
App 20220173310 - Philip; Timothy Mathew ; et al. | 2022-06-02 |
Increasing cost benefit and energy efficiency with modular delivery drones in inclement weather
Grant 11,348,060 - Briggs , et al. May 31, 2 | 2022-05-31 |
Hybrid dielectric scheme for varying liner thickness and manganese concentration
Grant 11,348,872 - Briggs , et al. May 31, 2 | 2022-05-31 |
Integrated Non Volatile Memory Electrode Thin Film Resistor Cap And Etch Stop
App 20220165790 - Brew; Kevin W. ; et al. | 2022-05-26 |
Interconnects Having Spacers For Improved Top Via Critical Dimension And Overlay Tolerance
App 20220157652 - Anderson; Brent A. ; et al. | 2022-05-19 |
Back-side Wafer Modification
App 20220148927 - Wolpert; David ; et al. | 2022-05-12 |
Stepped Top Via For Via Resistance Reduction
App 20220130718 - Anderson; Brent Alan ; et al. | 2022-04-28 |
Skip via connection between metallization levels
Grant 11,315,827 - Huang , et al. April 26, 2 | 2022-04-26 |
Cut integration for subtractive first metal line with bottom up second metal line
Grant 11,302,571 - Ghosh , et al. April 12, 2 | 2022-04-12 |
Language learning and speech enhancement through natural language processing
Grant 11,302,205 - Amin , et al. April 12, 2 | 2022-04-12 |
Subtractive line with damascene second line type
Grant 11,302,575 - Anderson , et al. April 12, 2 | 2022-04-12 |
Fully Aligned Top Vias
App 20220108922 - Lanzillo; Nicholas Anthony ; et al. | 2022-04-07 |
Forming a backside ground or power plane in a stacked vertical transport field effect transistor
Grant 11,295,985 - Zhang , et al. April 5, 2 | 2022-04-05 |
Interconnects having spacers for improved top via critical dimension and overlay tolerance
Grant 11,295,978 - Anderson , et al. April 5, 2 | 2022-04-05 |
Top vias with selectively retained etch stops
Grant 11,289,371 - Anderson , et al. March 29, 2 | 2022-03-29 |
Projected phase change memory devices
Grant 11,283,015 - Philip , et al. March 22, 2 | 2022-03-22 |
Adjustable via dimension and chamfer angle
Grant 11,276,636 - Clevenger , et al. March 15, 2 | 2022-03-15 |
Conductive lines with subtractive cuts
Grant 11,276,639 - Anderson , et al. March 15, 2 | 2022-03-15 |
Proximity correction in three-dimensional manufacturing
Grant 11,263,068 - Briggs , et al. March 1, 2 | 2022-03-01 |
Interconnects having a via-to-line spacer for preventing short circuit events between a conductive via and an adjacent line
Grant 11,244,859 - Motoyama , et al. February 8, 2 | 2022-02-08 |
Internet Of Things (iot) Real-time Response To Defined Symptoms
App 20220032000 - Amin; Mahmoud ; et al. | 2022-02-03 |
Subtractive Line with Damascene Second Line Type
App 20220037205 - Anderson; Brent ; et al. | 2022-02-03 |
Top Via Interconnect Having A Line With A Reduced Bottom Dimension
App 20220028785 - Anderson; Brent ; et al. | 2022-01-27 |
Top Via Stack
App 20220028783 - Anderson; Brent Alan ; et al. | 2022-01-27 |
Stepped top via for via resistance reduction
Grant 11,232,977 - Anderson , et al. January 25, 2 | 2022-01-25 |
Fully Aligned Via for Interconnect
App 20220020688 - Xie; Ruilong ; et al. | 2022-01-20 |
Enhancement of iso-via reliability
Grant 11,227,796 - Clevenger , et al. January 18, 2 | 2022-01-18 |
Self-aligned pattern formation for a semiconductor device
Grant 11,227,793 - Burns , et al. January 18, 2 | 2022-01-18 |
Trapezoidal Interconnect at Tight BEOL Pitch
App 20220013406 - Lanzillo; Nicholas Anthony ; et al. | 2022-01-13 |
Etch Stop Layer Removal For Capacitance Reduction In Damascene Top Via Integration
App 20220005731 - Penny; Christopher J. ; et al. | 2022-01-06 |
Top Via With Damascene Line And Via
App 20220005732 - Clevenger; Lawrence A. ; et al. | 2022-01-06 |
Top Via With Next Level Line Selective Growth
App 20220005761 - Anderson; Brent ; et al. | 2022-01-06 |
Fully aligned top vias
Grant 11,217,481 - Lanzillo , et al. January 4, 2 | 2022-01-04 |
Behavior-based interactive educational sessions
Grant 11,210,968 - Clevenger , et al. December 28, 2 | 2021-12-28 |
Machine learning enhanced optical-based screening for in-line wafer testing
Grant 11,199,505 - Chao , et al. December 14, 2 | 2021-12-14 |
Well-controlled Edge-to-edge Spacing Between Adjacent Interconnects
App 20210384123 - Anderson; Brent ; et al. | 2021-12-09 |
Top via stack
Grant 11,195,792 - Anderson , et al. December 7, 2 | 2021-12-07 |
Well-controlled edge-to-edge spacing between adjacent interconnects
Grant 11,195,795 - Anderson , et al. December 7, 2 | 2021-12-07 |
Encapsulation topography-assisted self-aligned MRAM top contact
Grant 11,195,993 - Rizzolo , et al. December 7, 2 | 2021-12-07 |
Internet of things (IOT) real-time response to defined symptoms
Grant 11,185,658 - Amin , et al. November 30, 2 | 2021-11-30 |
Tight pitch via structures enabled by orthogonal and non-orthogonal merged vias
Grant 11,189,566 - Shao , et al. November 30, 2 | 2021-11-30 |
Top via interconnect having a line with a reduced bottom dimension
Grant 11,189,568 - Anderson , et al. November 30, 2 | 2021-11-30 |
Cognitive system for automatic risk assessment, solution identification, and action enablement
Grant 11,182,722 - Hubbard , et al. November 23, 2 | 2021-11-23 |
Etch stop layer removal for capacitance reduction in damascene top via integration
Grant 11,177,166 - Penny , et al. November 16, 2 | 2021-11-16 |
Direct bonded heterogeneous integration packaging structures
Grant 11,177,217 - Sikka , et al. November 16, 2 | 2021-11-16 |
Trapezoidal interconnect at tight BEOL pitch
Grant 11,177,162 - Lanzillo , et al. November 16, 2 | 2021-11-16 |
Multiple patterning scheme integration with planarized cut patterning
Grant 11,171,001 - Chen , et al. November 9, 2 | 2021-11-09 |
Top via with next level line selective growth
Grant 11,171,084 - Anderson , et al. November 9, 2 | 2021-11-09 |
Metalization repair in semiconductor wafers
Grant 11,171,064 - Clevenger , et al. November 9, 2 | 2021-11-09 |
Metalization repair in semiconductor wafers
Grant 11,171,063 - Clevenger , et al. November 9, 2 | 2021-11-09 |
Interconnects Having Spacers For Improved Top Via Critical Dimension And Overlay Tolerance
App 20210343585 - Anderson; Brent ; et al. | 2021-11-04 |
Top Via Interconnect Having A Line With A Reduced Bottom Dimension
App 20210343643 - Anderson; Brent ; et al. | 2021-11-04 |
Barrier-less Prefilled Via Formation
App 20210343589 - Lanzillo; Nicholas Anthony ; et al. | 2021-11-04 |
Top via with damascene line and via
Grant 11,164,777 - Clevenger , et al. November 2, 2 | 2021-11-02 |
Multi-chip package structures with discrete redistribution layers
Grant 11,164,817 - Rubin , et al. November 2, 2 | 2021-11-02 |
Motion-controlled portals in virtual reality
Grant 11,164,377 - Sipolins , et al. November 2, 2 | 2021-11-02 |
Semiconductor process modeling to enable skip via in place and route flow
Grant 11,163,932 - Shao , et al. November 2, 2 | 2021-11-02 |
Barrier-free vertical interconnect structure
Grant 11,164,778 - Wang , et al. November 2, 2 | 2021-11-02 |
Semiconductor Device Including A Porous Dielectric Layer, And Method Of Forming The Semiconductor Device
App 20210335706 - Briggs; Benjamin D. ; et al. | 2021-10-28 |
Top vias with subtractive line formation
Grant 11,158,537 - Anderson , et al. October 26, 2 | 2021-10-26 |
Selective CVD alignment-mark topography assist for non-volatile memory
Grant 11,158,584 - Rizzolo , et al. October 26, 2 | 2021-10-26 |
Self-sterilizing sensor
Grant 11,154,628 - Cheng , et al. October 26, 2 | 2021-10-26 |
Etch Stop Layer Removal For Capacitance Reduction In Damascene Top Via Integration
App 20210327751 - Penny; Christopher J. ; et al. | 2021-10-21 |
Analog Computing Architecture For Four Terminal Memory Devices
App 20210327502 - Philip; Timothy Mathew ; et al. | 2021-10-21 |
Barrier-less prefilled via formation
Grant 11,152,257 - Lanzillo , et al. October 19, 2 | 2021-10-19 |
Buried local interconnect
Grant 11,152,307 - Cheng , et al. October 19, 2 | 2021-10-19 |
Hybrid selective dielectric deposition for aligned via integration
Grant 11,152,299 - Lanzillo , et al. October 19, 2 | 2021-10-19 |
Semiconductor via structure with lower electrical resistance
Grant 11,145,543 - Clevenger , et al. October 12, 2 | 2021-10-12 |
Top Via With Next Level Line Selective Growth
App 20210313265 - Anderson; Brent ; et al. | 2021-10-07 |
Secure access for drone package delivery
Grant 11,138,890 - Briggs , et al. October 5, 2 | 2021-10-05 |
Top via with hybrid metallization
Grant 11,139,201 - Motoyama , et al. October 5, 2 | 2021-10-05 |
Multi-terminal Phase Change Memory Device
App 20210305505 - Philip; Timothy Mathew ; et al. | 2021-09-30 |
Projected Phase Change Memory Devices
App 20210305503 - Philip; Timothy Mathew ; et al. | 2021-09-30 |
Inverted, Self-aligned Top-via Structures
App 20210305152 - DECHENE; DANIEL JAMES ; et al. | 2021-09-30 |
Multi-chip package structure having high density chip interconnect bridge with embedded power distribution network
Grant 11,133,259 - Rubin , et al. September 28, 2 | 2021-09-28 |
Analog computing architecture for four terminal memory devices
Grant 11,133,058 - Philip , et al. September 28, 2 | 2021-09-28 |
Method for using 3D positional spatial olfaction for virtual marketing
Grant 11,132,712 - Briggs , et al. September 28, 2 | 2021-09-28 |
Top Via On Subtractively Etched Conductive Line
App 20210296171 - Anderson; Brent ; et al. | 2021-09-23 |
Interconnection Fabric For Buried Power Distribution
App 20210296234 - Dechene; Daniel James ; et al. | 2021-09-23 |
Self Aligned Pattern Formation Post Spacer Etchback In Tight Pitch Configurations
App 20210280422 - Burns; Sean D. ; et al. | 2021-09-09 |
Hybrid Selective Dielectric Deposition For Aligned Via Integration
App 20210280510 - Lanzillo; Nicholas Anthony ; et al. | 2021-09-09 |
Skip Via Connection Between Metallization Levels
App 20210280456 - Huang; Huai ; et al. | 2021-09-09 |
Multi-chip package structures formed by joining chips to pre-positioned chip interconnect bridge devices
Grant 11,114,410 - Rubin , et al. September 7, 2 | 2021-09-07 |
Contacts Having A Geometry To Reduce Resistance
App 20210272902 - Clevenger; Lawrence A. ; et al. | 2021-09-02 |
Protuberant contacts for resistive switching devices
Grant 11,107,984 - Ando , et al. August 31, 2 | 2021-08-31 |
Multi-chip Package Structures Having Embedded Chip Interconnect Bridges And Fan-out Redistribution Layers
App 20210265275 - Rubin; Joshua M. ; et al. | 2021-08-26 |
Via-via Spacing Reduction Without Additional Cut Mask
App 20210265166 - Dechene; Daniel James ; et al. | 2021-08-26 |
Dielectric damage-free dual damascene Cu interconnects without barrier at via bottom
Grant 11,101,172 - Motoyama , et al. August 24, 2 | 2021-08-24 |
Barrier Removal For Conductor In Top Via Integration Scheme
App 20210257308 - Anderson; Brent Alan ; et al. | 2021-08-19 |
Multi-chip package structures having embedded chip interconnect bridges and fan-out redistribution layers
Grant 11,094,637 - Rubin , et al. August 17, 2 | 2021-08-17 |
Stepped Top Via For Via Resistance Reduction
App 20210249302 - Anderson; Brent Alan ; et al. | 2021-08-12 |
Single-mask Alternating Line Deposition
App 20210249351 - Anderson; Brent Alan ; et al. | 2021-08-12 |
Optimizating Semiconductor Binning By Feed-forward Process Adjustment
App 20210249288 - Briggs; Benjamin D. ; et al. | 2021-08-12 |
Secure medication delivery
Grant 11,083,837 - Allen , et al. August 10, 2 | 2021-08-10 |
Top Vias With Selectively Retained Etch Stops
App 20210233807 - Anderson; Brent ; et al. | 2021-07-29 |
Top Vias With Subtractive Line Formation
App 20210233808 - Anderson; Brent ; et al. | 2021-07-29 |
Barrier-less Prefilled Via Formation
App 20210225700 - Lanzillo; Nicholas Anthony ; et al. | 2021-07-22 |
Conductive Lines With Subtractive Cuts
App 20210225761 - Anderson; Brent ; et al. | 2021-07-22 |
Double metal patterning
Grant 11,069,564 - Chen , et al. July 20, 2 | 2021-07-20 |
Granting requests for authorization using data of devices associated with requestors
Grant 11,068,896 - Skordas , et al. July 20, 2 | 2021-07-20 |
Top Via Stack
App 20210217696 - Anderson; Brent Alan ; et al. | 2021-07-15 |
Selective Ild Deposition For Fully Aligned Via With Airgap
App 20210217653 - Penny; Christopher J. ; et al. | 2021-07-15 |
Top Via With Damascene Line And Via
App 20210217661 - Clevenger; Lawrence A. ; et al. | 2021-07-15 |
Top via interconnects with wrap around liner
Grant 11,062,943 - Motoyama , et al. July 13, 2 | 2021-07-13 |
Resistive memory device with meshed electrodes
Grant 11,063,089 - Ando , et al. July 13, 2 | 2021-07-13 |
Contacts having a geometry to reduce resistance
Grant 11,062,993 - Clevenger , et al. July 13, 2 | 2021-07-13 |
Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device
Grant 11,056,429 - Briggs , et al. July 6, 2 | 2021-07-06 |
Forming Self-aligned Vias And Air-gaps In Semiconductor Fabrication
App 20210202313 - Clevenger; Lawrence A. ; et al. | 2021-07-01 |
Interleaved structure for molecular manipulation
Grant 11,049,727 - Clevenger , et al. June 29, 2 | 2021-06-29 |
Optimizing semiconductor binning by feed-forward process adjustment
Grant 11,049,744 - Briggs , et al. June 29, 2 | 2021-06-29 |
Structure and method for equal substrate to channel height between N and P fin-FETs
Grant 11,043,494 - Clevenger , et al. June 22, 2 | 2021-06-22 |
Multi-chip Package Structure Having High Density Chip Interconnect Bridge With Embedded Power Distribution Network
App 20210183773 - Rubin; Joshua M. ; et al. | 2021-06-17 |
3D Nanochannel Interleaved Devices
App 20210170399 - Clevenger; Lawrence A. ; et al. | 2021-06-10 |
Metal replacement vertical interconnections for buried capacitance
Grant 11,024,551 - Chen , et al. June 1, 2 | 2021-06-01 |
Multi-chip Package Structures Formed By Joining Chips To Pre-positioned Chip Interconnect Bridge Devices
App 20210159211 - Rubin; Joshua M. ; et al. | 2021-05-27 |
Barrier-free Vertical Interconnect Structure
App 20210159117 - Wang; Junli ; et al. | 2021-05-27 |
Self aligned pattern formation post spacer etchback in tight pitch configurations
Grant 11,018,007 - Burns , et al. May 25, 2 | 2021-05-25 |
Selective CVD alignment-mark topography assist for non-volatile memory
Grant 11,018,090 - Rizzolo , et al. May 25, 2 | 2021-05-25 |
Fully Aligned Top Vias
App 20210143062 - Lanzillo; Nicholas Anthony ; et al. | 2021-05-13 |
Integrated circuit having a single damascene wiring network
Grant 11,004,736 - Chen , et al. May 11, 2 | 2021-05-11 |
Method of manufacturing an interconnect without dielectric exclusion zones by thermal decomposition of a sacrificial filler material
Grant 11,004,790 - Briggs , et al. May 11, 2 | 2021-05-11 |
Multi-chip Package Structures Having Embedded Chip Interconnect Bridges And Fan-out Redistribution Layers
App 20210134728 - Rubin; Joshua M. ; et al. | 2021-05-06 |
Top Via With Hybrid Metallization
App 20210134664 - Motoyama; Koichi ; et al. | 2021-05-06 |
Multi-chip Package Structures Formed With Interconnect Bridge Devices And Chip Packages With Discrete Redistribution Layers
App 20210134724 - Rubin; Joshua M. ; et al. | 2021-05-06 |
Spacer-assisted lithographic double patterning
Grant 10,998,193 - Philip , et al. May 4, 2 | 2021-05-04 |
Top via process accounting for misalignment by increasing reliability
Grant 10,991,619 - Zhang , et al. April 27, 2 | 2021-04-27 |
Semiconductor device with local connection
Grant 10,985,063 - Cheng , et al. April 20, 2 | 2021-04-20 |
Interconnects Having A Via-to-line Spacer For Preventing Short Circuit Events Between A Conductive Via And An Adjacent Line
App 20210111069 - Motoyama; Koichi ; et al. | 2021-04-15 |
Cut Integration For Subtractive First Metal Line With Bottom Up Second Metal Line
App 20210111066 - Ghosh; Somnath ; et al. | 2021-04-15 |
Language Learning And Speech Enhancement Through Natural Language Processing
App 20210110727 - Amin; Mahmoud ; et al. | 2021-04-15 |
Interconnect structure having fully aligned vias
Grant 10,978,343 - Park , et al. April 13, 2 | 2021-04-13 |
Hybrid dielectric scheme for varying liner thickness and manganese concentration
Grant 10,978,393 - Briggs , et al. April 13, 2 | 2021-04-13 |
Remote physical training
Grant 10,971,030 - Briggs , et al. April 6, 2 | 2021-04-06 |
Selective ILD deposition for fully aligned via with airgap
Grant 10,964,588 - Penny , et al. March 30, 2 | 2021-03-30 |
Self aligned via and pillar cut for at least a self aligned double pitch
Grant 10,957,582 - Briggs , et al. March 23, 2 | 2021-03-23 |
Hybrid BEOL metallization utilizing selective reflection mask
Grant 10,957,646 - Briggs , et al. March 23, 2 | 2021-03-23 |
Self-aligned quadruple patterning (SAQP) for routing layouts including multi-track jogs
Grant 10,957,583 - Burns , et al. March 23, 2 | 2021-03-23 |
Self aligned via and pillar cut for at least a self aligned double pitch
Grant 10,957,581 - Briggs , et al. March 23, 2 | 2021-03-23 |
Trapezoidal Interconnect at Tight BEOL Pitch
App 20210082744 - Lanzillo; Nicholas Anthony ; et al. | 2021-03-18 |
Encapsulation Topography-Assisted Self-Aligned MRAM Top Contact
App 20210083179 - Rizzolo; Michael ; et al. | 2021-03-18 |
Resistive memory device with meshed electrodes
Grant 10,950,662 - Ando , et al. March 16, 2 | 2021-03-16 |
Vertical gate all-around transistor
Grant 10,950,722 - Zhang , et al. March 16, 2 | 2021-03-16 |
Method having resistive memory crossbar array employing selective barrier layer growth
Grant 10,950,787 - Ando , et al. March 16, 2 | 2021-03-16 |
Method and structure to construct cylindrical interconnects to reduce resistance
Grant 10,943,866 - Briggs , et al. March 9, 2 | 2021-03-09 |
Precision BEOL resistors
Grant 10,943,972 - Li , et al. March 9, 2 | 2021-03-09 |
Semiconductor process modeling to enable skip via in place and route flow
Grant 10,936,782 - Shao , et al. March 2, 2 | 2021-03-02 |
Multiple patterning scheme integration with planarized cut patterning
Grant 10,937,653 - Chen , et al. March 2, 2 | 2021-03-02 |
Forming self-aligned vias and air-gaps in semiconductor fabrication
Grant 10,930,553 - Clevenger , et al. February 23, 2 | 2021-02-23 |
Interconnect Structure Having Fully Aligned Vias
App 20210050260 - Park; Chanro ; et al. | 2021-02-18 |
Low resistance contact for transistors
Grant 10,923,575 - Clevenger , et al. February 16, 2 | 2021-02-16 |
Top Via Interconnects With Wrap Around Liner
App 20210043507 - Motoyama; Koichi ; et al. | 2021-02-11 |
Dynamic rigidity mechanism
Grant 10,912,986 - Briggs , et al. February 9, 2 | 2021-02-09 |
Language learning and speech enhancement through natural language processing
Grant 10,916,154 - Amin , et al. February 9, 2 | 2021-02-09 |
Paint on micro chip touch screens
Grant 10,915,620 - Ashoori , et al. February 9, 2 | 2021-02-09 |
Back end of line electrical fuse structure and method of fabrication
Grant 10,916,501 - Briggs , et al. February 9, 2 | 2021-02-09 |
Resistive memory crossbar array employing selective barrier layer growth
Grant 10,916,699 - Ando , et al. February 9, 2 | 2021-02-09 |
Adjustable Via Dimension and Chamfer Angle
App 20210035904 - Clevenger; Lawrence A. ; et al. | 2021-02-04 |
Extreme ultraviolet (EUV) lithography patterning methods utilizing EUV resist hardening
Grant 10,901,317 - Briggs , et al. January 26, 2 | 2021-01-26 |
Integrated Circuit Having A Single Damascene Wiring Network
App 20210020507 - Chen; Hsueh-Chung ; et al. | 2021-01-21 |
Manipulation Of A Molecule Using Dipole Moments
App 20200399122 - Clevenger; Lawrence A. ; et al. | 2020-12-24 |
Selective Ild Deposition For Fully Aligned Via With Airgap
App 20200388525 - Penny; Christopher J. ; et al. | 2020-12-10 |
Semiconductor Device Including A Porous Dielectric Layer, And Method Of Forming The Semiconductor Device
App 20200388568 - Briggs; Benjamin David ; et al. | 2020-12-10 |
Interleaved Structure For Molecular Manipulation
App 20200381259 - Clevenger; Lawrence A. ; et al. | 2020-12-03 |
Semiconductor process modeling to enable skip via in place and route flow
Grant 10,831,973 - Shao , et al. November 10, 2 | 2020-11-10 |
Three-dimensional and planar memory device co-integration
Grant 10,833,127 - Ando , et al. November 10, 2 | 2020-11-10 |
Magnetic tunnel junction performance monitoring based on magnetic field coupling
Grant 10,830,841 - Lanzillo , et al. November 10, 2 | 2020-11-10 |
Techniques to improve critical dimension width and depth uniformity between features with different layout densities
Grant 10,832,945 - Saulnier , et al. November 10, 2 | 2020-11-10 |
Integration of artificial intelligence devices
Grant 10,833,010 - Chen , et al. November 10, 2 | 2020-11-10 |
Resistive memory crossbar array with ruthenium protection layer
Grant 10,833,266 - Ando , et al. November 10, 2 | 2020-11-10 |
Multiple width nanosheet devices
Grant 10,833,204 - Cheng , et al. November 10, 2 | 2020-11-10 |
Stacked Transistors With Different Channel Widths
App 20200350211 - CHENG; Kangguo ; et al. | 2020-11-05 |
Metal spacer self aligned multi-patterning integration
Grant 10,825,726 - Chen , et al. November 3, 2 | 2020-11-03 |
Nanosheet transistor barrier for electrically isolating the substrate from the source or drain regions
Grant 10,818,751 - Ebrish , et al. October 27, 2 | 2020-10-27 |
Top Via Process Accounting For Misalignment By Increasing Reliability
App 20200335393 - Zhang; Chen ; et al. | 2020-10-22 |
Co-fabrication of magnetic device structures with electrical interconnects having reduced resistance through increased conductor grain size
Grant 10,811,599 - Clevenger , et al. October 20, 2 | 2020-10-20 |
Metal spacer self aligned double patterning with airgap integration
Grant 10,811,310 - Chen , et al. October 20, 2 | 2020-10-20 |
Auto-incorrect in chatbot human-machine interfaces
Grant 10,812,417 - Briggs , et al. October 20, 2 | 2020-10-20 |
Double Metal Patterning
App 20200328111 - CHEN; HSUEH-CHUNG ; et al. | 2020-10-15 |
Multi-chip package structure having chip interconnection bridge which provides power connections between chip and package substrate
Grant 10,804,204 - Rubin , et al. October 13, 2 | 2020-10-13 |
Magnetic tunnel junction with low series resistance
Grant 10,796,833 - Lanzillo , et al. October 6, 2 | 2020-10-06 |
Protuberant contacts for resistive switching devices
Grant 10,790,445 - Ando , et al. September 29, 2 | 2020-09-29 |
Cognitive System For Automatic Risk Assessment, Solution Identification, And Action Enablement
App 20200302352 - Hubbard; Alex Richard ; et al. | 2020-09-24 |
Semiconductor Device With Selective Insulator For Improved Capacitance
App 20200303239 - Penny; Christopher J. ; et al. | 2020-09-24 |
Self-aligned airgaps with conductive lines and vias
Grant 10,784,156 - Briggs , et al. Sept | 2020-09-22 |
Method and structure to construct cylindrical interconnects to reduce resistance
Grant 10,784,197 - Briggs , et al. Sept | 2020-09-22 |
Semiconductor device and method of forming the semiconductor device
Grant 10,784,159 - Clevenger , et al. Sept | 2020-09-22 |
Binaural audio calibration
Grant 10,785,590 - Briggs , et al. Sept | 2020-09-22 |
Three-dimensional And Planar Memory Device Co-integration
App 20200286956 - Ando; Takashi ; et al. | 2020-09-10 |
Forming A Backside Ground Or Power Plane In A Stacked Vertical Transport Field Effect Transistor
App 20200286793 - Zhang; Chen ; et al. | 2020-09-10 |
Structures and methods for embedded magnetic random access memory (MRAM) fabrication
Grant 10,770,511 - Clevenger , et al. Sep | 2020-09-08 |
Location-specific laser annealing to improve interconnect microstructure
Grant 10,770,348 - Briggs , et al. Sep | 2020-09-08 |
Nanosheet Transistor Barrier For Electrically Isolating The Substrate From The Source Or Drain Regions
App 20200279913 - Ebrish; Mona A. ; et al. | 2020-09-03 |
Semiconductor device with selective insulator for improved capacitance
Grant 10,763,160 - Penny , et al. Sep | 2020-09-01 |
Multi-patterning techniques for fabricating an array of metal lines with different widths
Grant 10,755,969 - Chu , et al. A | 2020-08-25 |
Co-fabrication of magnetic device structures with electrical interconnects having reduced resistance through increased conductor grain size
Grant 10,756,260 - Clevenger , et al. A | 2020-08-25 |
Structure of implementing a directed self-assembled security pattern
Grant 10,752,039 - Briggs , et al. A | 2020-08-25 |
Techniques to Improve Critical Dimension Width and Depth Uniformity Between Features with Different Layout Densities
App 20200266100 - Saulnier; Nicole ; et al. | 2020-08-20 |
Accelerated wafer testing using non-destructive and localized stress
Grant 10,746,782 - Briggs , et al. A | 2020-08-18 |
Medication scheduling and alerts
Grant 10,747,850 - Ashoori , et al. A | 2020-08-18 |
Stacked transistors with different channel widths
Grant 10,741,449 - Cheng , et al. A | 2020-08-11 |
Fully aligned semiconductor device with a skip-level via
Grant 10,741,751 - Lanzillo , et al. A | 2020-08-11 |
Accelerated wafer testing using non-destructive and localized stress
Grant 10,739,397 - Briggs , et al. A | 2020-08-11 |
Cognitive situation-aware vision deficiency remediation
Grant 10,740,938 - Chan , et al. A | 2020-08-11 |
Rework For Metal Interconnects Using Etch And Thermal Anneal
App 20200251386 - Kind Code | 2020-08-06 |
Method for forming strained fin channel devices
Grant 10,734,289 - Cheng , et al. | 2020-08-04 |
Protuberant contacts for resistive switching devices
Grant 10,734,579 - Ando , et al. | 2020-08-04 |
Top via back end of the line interconnect integration
Grant 10,734,277 - Yang , et al. | 2020-08-04 |
Stacked MIM capacitors with self-aligned contact to reduce via enclosure
Grant 10,734,475 - Ando , et al. | 2020-08-04 |
Nanosheet substrate to source/drain isolation
Grant 10,734,523 - Lie , et al. | 2020-08-04 |
Dielectric Damage-Free Dual Damascene Cu Interconnects Without Barrier at Via Bottom
App 20200243379 - Motoyama; Koichi ; et al. | 2020-07-30 |
Structure and method for forming fully-aligned trench with an up-via integration scheme
Grant 10,727,124 - Clevenger , et al. | 2020-07-28 |
Prevention of switching of spins in magnetic tunnel junctions by on-chip parasitic magnetic shield
Grant 10,720,567 - Briggs , et al. | 2020-07-21 |
Structure and method using metal spacer for insertion of variable wide line implantation in SADP/SAQP integration
Grant 10,714,389 - Chen , et al. | 2020-07-14 |
Front-end-of-line shape merging cell placement and optimization
Grant 10,699,050 - Wolpert , et al. | 2020-06-30 |
Method of optimizing wire RC for device performance and reliability
Grant 10,699,950 - Clevenger , et al. | 2020-06-30 |
Overturned thin film device with self-aligned gate and source/drain (S/D) contacts
Grant 10,700,214 - Clevenger , et al. | 2020-06-30 |
Contacts Having A Geometry To Reduce Resistance
App 20200194371 - Clevenger; Lawrence A. ; et al. | 2020-06-18 |
Buried Local Interconnect
App 20200194372 - CHENG; Kangguo ; et al. | 2020-06-18 |
Capacitance reduction in sea of lines BEOL metallization
Grant 10,679,934 - Briggs , et al. | 2020-06-09 |
Caller identity verification based on unique multi-device signatures
Grant 10,681,207 - Johnson , et al. | 2020-06-09 |
Non-intrusive unmanned entity inspection
Grant 10,676,216 - Chan , et al. | 2020-06-09 |
Authentication Of Medication Delivery Vehicle To Facilitate Medication Release
App 20200176108 - Allen; Ira L. ; et al. | 2020-06-04 |
Hybrid Beol Metallization Utilizing Selective Reflection Mask
App 20200176388 - BRIGGS; Benjamin D. ; et al. | 2020-06-04 |
Resistive memory crossbar array compatible with Cu metallization
Grant 10,672,984 - Ando , et al. | 2020-06-02 |
Back End Of Line Electrical Fuse Structure And Method Of Fabrication
App 20200161239 - Briggs; Benjamin D. ; et al. | 2020-05-21 |
Top Via Back End Of The Line Interconnect Integration
App 20200161175 - Yang; Chih-Chao ; et al. | 2020-05-21 |
Cognitive Computing Device For Predicting An Optimal Strategy In Competitive Circumstances
App 20200160228 - Amin; Mahmoud ; et al. | 2020-05-21 |
Rework for metal interconnects using etch and thermal anneal
Grant 10,658,235 - Bhosale , et al. | 2020-05-19 |
Cognitive situation-aware vision deficiency remediation
Grant 10,657,677 - Chan , et al. | 2020-05-19 |
Dedicated contacts for controlled electroforming of memory cells in resistive random-access memory array
Grant 10,658,585 - Ando , et al. | 2020-05-19 |
Dielectric damage-free dual damascene Cu interconnects without barrier at via bottom
Grant 10,658,233 - Motoyama , et al. | 2020-05-19 |
Selective ILD deposition for fully aligned via with airgap
Grant 10,651,078 - Penny , et al. | 2020-05-12 |
Direct Bonded Heterogeneous Integration Packaging Structures
App 20200144187 - Sikka; Kamal K. ; et al. | 2020-05-07 |
Metal Spacer Self Aligned Double Patterning With Airgap Integration
App 20200135537 - Chen; Hsueh-Chung ; et al. | 2020-04-30 |
Integration Of Artificial Intelligence Devices
App 20200135635 - Chen; Hsueh-Chung ; et al. | 2020-04-30 |
Fully Aligned Semiconductor Device With A Skip-level Via
App 20200136028 - Lanzillo; Nicholas A. ; et al. | 2020-04-30 |
Structure And Method For Forming Fully-aligned Trench With An Up-via Integration Scheme
App 20200135560 - Clevenger; Lawrence A. ; et al. | 2020-04-30 |
Contacts having a geometry to reduce resistance
Grant 10,636,738 - Clevenger , et al. | 2020-04-28 |
Dielectric Damage-Free Dual Damascene Cu Interconnects Without Barrier at Via Bottom
App 20200126854 - Motoyama; Koichi ; et al. | 2020-04-23 |
Cognitive System For Localized Lidar Pollution Detection Using Autonomous Vehicles
App 20200125969 - Briggs; Benjamin D. ; et al. | 2020-04-23 |
Dual-damascene formation with dielectric spacer and thin liner
Grant 10,629,478 - Briggs , et al. | 2020-04-21 |
Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device
Grant 10,629,529 - Briggs , et al. | 2020-04-21 |
Non-intrusive unmanned entity inspection
Grant 10,629,009 - Chan , et al. | 2020-04-21 |
Metal Spacer Self Aligned Multi-patterning Integration
App 20200118872 - CHEN; HSUEH-CHUNG ; et al. | 2020-04-16 |
Dielectric gap fill evaluation for integrated circuits
Grant 10,622,250 - Chu , et al. | 2020-04-14 |
Resistive Memory Crossbar Array With Ruthenium Protection Layer
App 20200111958 - Ando; Takashi ; et al. | 2020-04-09 |
Resistive Memory Device With Meshed Electrodes
App 20200111838 - Ando; Takashi ; et al. | 2020-04-09 |
Resistive Memory Device With Meshed Electrodes
App 20200111837 - Ando; Takashi ; et al. | 2020-04-09 |
Back end of line electrical fuse structure and method of fabrication
Grant 10,615,119 - Briggs , et al. | 2020-04-07 |
Authentication of medication delivery vehicle to facilitate medication release
Grant 10,614,918 - Allen , et al. | 2020-04-07 |
Surface nitridation in metal interconnects
Grant 10,615,116 - Clevenger , et al. | 2020-04-07 |
Computer-mediated reality including physical damping feedback
Grant 10,606,231 - Briggs , et al. | 2020-03-31 |
Magnetic Tunnel Junction With Low Series Resistance
App 20200098499 - Lanzillo; Nicholas A. ; et al. | 2020-03-26 |
Nanosheet transistors with sharp junctions
Grant 10,600,638 - Cheng , et al. | 2020-03-24 |
Behavior-based Interactive Educational Sessions
App 20200090542 - Clevenger; Lawrence A. ; et al. | 2020-03-19 |
Self-aligned Pattern Formation For A Semiconductor Device
App 20200090985 - Burns; Sean D. ; et al. | 2020-03-19 |
Hybrid Dielectric Scheme For Varying Liner Thickness And Manganese Concentration
App 20200091079 - Briggs; Benjamin D. ; et al. | 2020-03-19 |
Protuberant Contacts For Resistive Switching Devices
App 20200091427 - Ando; Takashi ; et al. | 2020-03-19 |
Fold over emitter and collector field emission transistor
Grant 10,593,506 - Briggs , et al. | 2020-03-17 |
Proximity Correction In Three-dimensional Manufacturing
App 20200081761 - Briggs; Benjamin D. ; et al. | 2020-03-12 |
Semiconductor Process Modeling To Enable Skip Via In Place And Route Flow
App 20200082047 - Shao; Dongbing ; et al. | 2020-03-12 |
Semiconductor Process Modeling To Enable Skip Via In Place And Route Flow
App 20200082049 - Shao; Dongbing ; et al. | 2020-03-12 |
Semiconductor Process Modeling To Enable Skip Via In Place And Route Flow
App 20200082048 - Shao; Dongbing ; et al. | 2020-03-12 |
Hybrid BEOL metallization utilizing selective reflection mask
Grant 10,586,767 - Briggs , et al. | 2020-03-10 |
Semiconductor process modeling to enable skip via in place and route flow
Grant 10,586,012 - Shao , et al. | 2020-03-10 |
Gate height and spacer uniformity
Grant 10,586,741 - Cheng , et al. | 2020-03-10 |
Self Aligned Pattern Formation Post Spacer Etchback In Tight Pitch Configurations
App 20200075336 - Burns; Sean D. ; et al. | 2020-03-05 |
Location-specific Laser Annealing To Improve Interconnect Microstructure
App 20200075406 - Briggs; Benjamin David ; et al. | 2020-03-05 |
Low-temperature diffusion doping of copper interconnects independent of seed layer composition
Grant 10,580,740 - Briggs , et al. | 2020-03-03 |
Direct bonded heterogeneous integration packaging structures
Grant 10,580,738 - Sikka , et al. | 2020-03-03 |
Sentiment analysis of mental health disorder symptoms
Grant 10,580,435 - Ashoori , et al. | 2020-03-03 |
Machine Learning Enhanced Optical-based Screening For In-line Wafer Testing
App 20200064275 - Chao; Robin Hsin Kuo ; et al. | 2020-02-27 |
Multiple Patterning Scheme Integration With Planarized Cut Patterning
App 20200066526 - Chen; Hsueh-Chung ; et al. | 2020-02-27 |
Resistive Memory Crossbar Array Employing Selective Barrier Layer Growth
App 20200066982 - Ando; Takashi ; et al. | 2020-02-27 |
Resistive Memory Crossbar Array Employing Selective Barrier Layer Growth
App 20200066983 - Ando; Takashi ; et al. | 2020-02-27 |
Multiple Patterning Scheme Integration With Planarized Cut Patterning
App 20200066525 - Chen; Hsueh-Chung ; et al. | 2020-02-27 |
Selective Ion Filtering In A Multipurpose Chamber
App 20200066491 - Clevenger; Lawrence A. ; et al. | 2020-02-27 |
Self-sterilizing Sensor
App 20200061221 - Cheng; Kangguo ; et al. | 2020-02-27 |
Increasing Cost Benefit And Energy Efficiency With Modular Delivery Drones In Inclement Weather
App 20200065762 - Briggs; Benjamin D. ; et al. | 2020-02-27 |
Internet Of Things (iot) Real-time Response To Defined Symptoms
App 20200066127 - Amin; Mahmoud ; et al. | 2020-02-27 |
Multiple patterning scheme integration with planarized cut patterning
Grant 10,573,520 - Chen , et al. Feb | 2020-02-25 |
Method And Structure To Construct Cylindrical Interconnects To Reduce Resistance
App 20200058591 - Briggs; Benjamin D. ; et al. | 2020-02-20 |
Method And Structure To Construct Cylindrical Interconnects To Reduce Resistance
App 20200058590 - Briggs; Benjamin D. ; et al. | 2020-02-20 |
Selective Cvd Alignment-mark Topography Assist For Non-volatile Memory
App 20200058594 - Rizzolo; Michael ; et al. | 2020-02-20 |
Multiple Width Nanosheet Devices
App 20200058801 - Cheng; Kangguo ; et al. | 2020-02-20 |
Cognitive situation-aware vision deficiency remediation
Grant 10,565,872 - Chan , et al. Feb | 2020-02-18 |
Nanosheet Substrate To Source/drain Isolation
App 20200052107 - Lie; Fee Li ; et al. | 2020-02-13 |
Cognitive Tool For Teaching Generlization Of Objects To A Person
App 20200051447 - Tunga; Krishna R. ; et al. | 2020-02-13 |
Selective Cvd Alignment-mark Topography Assist For Non-volatile Memory
App 20200051924 - Rizzolo; Michael ; et al. | 2020-02-13 |
Location-specific laser annealing to improve interconnect microstructure
Grant 10,559,498 - Briggs , et al. Feb | 2020-02-11 |
Fully aligned semiconductor device with a skip-level via
Grant 10,553,789 - Lanzillo , et al. Fe | 2020-02-04 |
Multi-chip Package Structure Having Chip Interconnection Bridge Which Provides Power Connections Between Chip And Package Substrate
App 20200035603 - Rubin; Joshua ; et al. | 2020-01-30 |
Multi-chip Package Structure Having Chip Interconnection Bridge Which Provides Power Connections Between Chip And Package Substr
App 20200035604 - Rubin; Joshua ; et al. | 2020-01-30 |
Proximity correction in three-dimensional manufacturing
Grant 10,545,806 - Briggs , et al. Ja | 2020-01-28 |
Advanced interconnect with air gap
Grant 10,546,743 - Zhang , et al. Ja | 2020-01-28 |
Self-aligned quadruple patterning (SAQP) for routing layouts including multi-track jogs
Grant 10,546,774 - Burns , et al. Ja | 2020-01-28 |
Resistive memory device with meshed electrodes
Grant 10,546,892 - Ando , et al. Ja | 2020-01-28 |
Hybrid Beol Metallization Utilizing Selective Reflection Mask
App 20200027840 - BRIGGS; Benjamin D. ; et al. | 2020-01-23 |
Resistive Memory Crossbar Array Compatible With Cu Metallization
App 20200028080 - Ando; Takashi ; et al. | 2020-01-23 |
Semiconductor Device With Local Connection
App 20200027787 - Cheng; Kangguo ; et al. | 2020-01-23 |
Interconnect structure including air gaps enclosed between conductive lines and a permeable dielectric layer
Grant 10,541,206 - Briggs , et al. Ja | 2020-01-21 |
Multi-chip package structure having chip interconnection bridge which provides power connections between chip and package substrate
Grant 10,535,608 - Rubin , et al. Ja | 2020-01-14 |
Enhancement Of Iso-via Reliability
App 20200013671 - Clevenger; Lawrence A. ; et al. | 2020-01-09 |
Structure And Method For Maximizing Air Gap In Back End Of The Line Interconnect Through Via Landing Modification
App 20200013718 - Briggs; Benjamin D. ; et al. | 2020-01-09 |
Low Resistance Contact For Transistors
App 20200013868 - CLEVENGER; LAWRENCE A. ; et al. | 2020-01-09 |
Self aligned pattern formation post spacer etchback in tight pitch configurations
Grant 10,529,569 - Burns , et al. J | 2020-01-07 |
Method and structure to construct cylindrical interconnects to reduce resistance
Grant 10,529,662 - Briggs , et al. J | 2020-01-07 |
Strained Fin Channel Devices
App 20200006561 - Cheng; Kangguo ; et al. | 2020-01-02 |
Rework For Metal Interconnects Using Etch And Thermal Anneal
App 20190393085 - Bhosale; Prasad ; et al. | 2019-12-26 |
Self-aligned Quadruple Patterning (saqp) For Routing Layouts Including Multi-track Jogs
App 20190393082 - Burns; Sean D. ; et al. | 2019-12-26 |
Selective CVD alignment-mark topography assist for non-volatile memory
Grant 10,515,903 - Rizzolo , et al. Dec | 2019-12-24 |
Multiple width nanosheet devices
Grant 10,516,064 - Cheng , et al. Dec | 2019-12-24 |
Enhanced self-alignment of vias for a semiconductor device
Grant 10,515,894 - Briggs , et al. Dec | 2019-12-24 |
Extreme Ultraviolet (euv) Lithography Patterning Methods Utilizing Euv Resist Hardening
App 20190384180 - Briggs; Benjamin D. ; et al. | 2019-12-19 |
Binaural Audio Calibration
App 20190379996 - Briggs; Benjamin David ; et al. | 2019-12-12 |
Multiple Patterning Scheme Integration With Planarized Cut Patterning
App 20190378718 - Chen; Hsueh-Chung ; et al. | 2019-12-12 |
Semiconductor Via Structure With Lower Electrical Resistance
App 20190371663 - Clevenger; Lawrence A. ; et al. | 2019-12-05 |
Optimized Individual Sleep Patterns
App 20190357843 - AMIN; MAHMOUD ; et al. | 2019-11-28 |
Semiconductor Device And Method Of Forming The Semiconductor Device
App 20190363013 - CLEVENGER; Lawrence A. ; et al. | 2019-11-28 |
Binaural audio calibration
Grant 10,492,019 - Briggs , et al. Nov | 2019-11-26 |
Selective Cvd Alignment-mark Topography Assist For Non-volatile Memory
App 20190355668 - Rizzolo; Michael ; et al. | 2019-11-21 |
Selective Ion Filtering In A Multipurpose Chamber
App 20190355555 - Clevenger; Lawrence A. ; et al. | 2019-11-21 |
Motion-controlled Portals In Virtual Reality
App 20190355175 - Sipolins; Aldis ; et al. | 2019-11-21 |
Selective ion filtering in a multipurpose chamber
Grant 10,483,091 - Clevenger , et al. Nov | 2019-11-19 |
Forming resistive memory crossbar array employing selective barrier layer growth
Grant 10,475,997 - Ando , et al. Nov | 2019-11-12 |
Front-end-of-line Shape Merging Cell Placement And Optimization
App 20190340324 - WOLPERT; David ; et al. | 2019-11-07 |
Low resistance contact for transistors
Grant 10,468,491 - Clevenger , et al. No | 2019-11-05 |
Non-intrusive Unmanned Entity Inspection
App 20190329909 - Chan; Yuk L. ; et al. | 2019-10-31 |
Semiconductor Process Modeling To Enable Skip Via In Place And Route Flow
App 20190332738 - Shao; Dongbing ; et al. | 2019-10-31 |
Non-intrusive Unmanned Entity Inspection
App 20190333292 - Chan; Yuk L. ; et al. | 2019-10-31 |
Enhancement of iso-via reliability
Grant 10,460,985 - Clevenger , et al. Oc | 2019-10-29 |
Semiconductor via structure with lower electrical resistance
Grant 10,460,990 - Clevenger , et al. Oc | 2019-10-29 |
Paint On Micro Chip Touch Screens
App 20190325126 - Ashoori; Maryam ; et al. | 2019-10-24 |
Structure And Method For Equal Substrate To Channel Height Between N And P Fin-fets
App 20190326289 - CLEVENGER; Lawrence A. ; et al. | 2019-10-24 |
Paint On Micro Chip Touch Screens
App 20190325127 - Ashoori; Maryam ; et al. | 2019-10-24 |
Self Aligned Via And Pillar Cut For At Least A Self Aligned Double Pitch
App 20190318960 - Briggs; Benjamin D. ; et al. | 2019-10-17 |
Tight Pitch Via Structures Enabled By Orthogonal And Non-orthogonal Merged Vias
App 20190318989 - Shao; Dongbing ; et al. | 2019-10-17 |
Self-forming barrier for cobalt interconnects
Grant 10,446,496 - Briggs , et al. Oc | 2019-10-15 |
Crystal oscillator and the use thereof in semiconductor fabrication
Grant 10,446,421 - Cabral, Jr. , et al. Oc | 2019-10-15 |
Self Aligned Via And Pillar Cut For At Least A Self Aligned Double Pitch
App 20190311946 - Briggs; Benjamin D. ; et al. | 2019-10-10 |
Self-orientation And Self-placement Of Computing Devices In A Fluid
App 20190313533 - Skordas; Spyridon ; et al. | 2019-10-10 |
Semiconductor device with local connection
Grant 10,438,850 - Cheng , et al. O | 2019-10-08 |
Stacked Mim Capacitors With Self-aligned Contact To Reduce Via Enclosure
App 20190305076 - Ando; Takashi ; et al. | 2019-10-03 |
Fold Over Emitter And Collector Field Emission Transistor
App 20190304733 - Briggs; Benjamin D. ; et al. | 2019-10-03 |
BEOL self-aligned interconnect structure
Grant 10,431,494 - Yang , et al. O | 2019-10-01 |
Semiconductor device with local connection
Grant 10,431,495 - Cheng , et al. O | 2019-10-01 |
Orator effectiveness through real-time feedback system with automatic detection of human behavioral and emotional states of orator and audience
Grant 10,431,116 - Briggs , et al. O | 2019-10-01 |
Self-forming barrier for cobalt interconnects
Grant 10,431,544 - Briggs , et al. O | 2019-10-01 |
Optimized individual sleep patterns
Grant 10,426,400 - Amin , et al. October 1, 2 | 2019-10-01 |
Direct Bonded Heterogeneous Integration Packaging Structures
App 20190295952 - Sikka; Kamal K. ; et al. | 2019-09-26 |
Fold over emitter and collector field emission transistor
Grant 10,424,456 - Briggs , et al. Sept | 2019-09-24 |
Optimized individual sleep patterns
Grant 10,420,502 - Amin , et al. Sept | 2019-09-24 |
Co-fabrication Of Magnetic Device Structures With Electrical Interconnects Having Reduced Resistance Through Increased Conductor
App 20190280196 - Clevenger; Lawrence A. ; et al. | 2019-09-12 |
Semiconductor Device Including a Porous Dielectric Layer, and Method of Forming the Semiconductor Device
App 20190279931 - Briggs; Benjamin David ; et al. | 2019-09-12 |
Precision Beol Resistors
App 20190280080 - Li; Baozhen ; et al. | 2019-09-12 |
Strained fin channel devices
Grant 10,411,128 - Cheng , et al. Sept | 2019-09-10 |
Co-fabrication Of Magnetic Device Structures With Electrical Interconnects Having Reduced Resistance Through Increased Conductor
App 20190273204 - Clevenger; Lawrence A. ; et al. | 2019-09-05 |
Location-specific Laser Annealing To Improve Interconnect Microstructure
App 20190262941 - BRIGGS; Benjamin David ; et al. | 2019-08-29 |
Selective Ild Deposition For Fully Aligned Via With Airgap
App 20190267278 - Penny; Christopher J. ; et al. | 2019-08-29 |
Dedicated Contacts For Controlled Electroforming Of Memory Cells In Resistive Random-access Memory Array
App 20190259943 - Ando; Takashi ; et al. | 2019-08-22 |
Method And Structure To Construct Cylindrical Interconnects To Reduce Resistance
App 20190237402 - Briggs; Benjamin D. ; et al. | 2019-08-01 |
Beol Self-aligned Interconnect Structure
App 20190237366 - Yang; Chih-Chao ; et al. | 2019-08-01 |
Dedicated Contacts For Controlled Electroforming Of Memory Cells In Resistive Random-access Memory Array
App 20190214558 - Ando; Takashi ; et al. | 2019-07-11 |
Auto-incorrect In Chatbot Human-machine Interfaces
App 20190215282 - BRIGGS; Benjamin D. ; et al. | 2019-07-11 |
Structure And Method Using Metal Spacer For Insertion Of Variable Wide Line Implantation In Sadp/saqp Integration
App 20190206719 - Chen; Hsueh-Chung ; et al. | 2019-07-04 |
Multi-patterning Techniques For Fabricating An Array Of Metal Lines With Different Widths
App 20190206725 - Chu; Albert ; et al. | 2019-07-04 |
Protuberant Contacts For Resistive Switching Devices
App 20190207109 - Ando; Takashi ; et al. | 2019-07-04 |
Protuberant Contacts For Resistive Switching Device
App 20190207110 - ANDO; TAKASHI ; et al. | 2019-07-04 |
Structure, System, Method, And Recording Medium Of Implementing A Directed Self-assembled Security Pattern
App 20190193452 - Briggs; Benjamin David ; et al. | 2019-06-27 |
Extreme Ultraviolet (euv) Lithography Patterning Methods Utilizing Euv Resist Hardening
App 20190198325 - Briggs; Benjamin D. ; et al. | 2019-06-27 |
Dielectric Gap Fill Evaluation For Integrated Circuits
App 20190189504 - Chu; Isabel Cristina ; et al. | 2019-06-20 |
Dielectric Gap Fill Evaluation For Integrated Circuits
App 20190189503 - Chu; Isabel Cristina ; et al. | 2019-06-20 |
Back End Of Line Electrical Fuse Structure And Method Of Fabrication
App 20190181091 - Briggs; Benjamin D. ; et al. | 2019-06-13 |
Selective Ild Deposition For Fully Aligned Via With Airgap
App 20190181033 - Penny; Christopher J. ; et al. | 2019-06-13 |
Forming Self-aligned Vias And Air-gaps In Semiconductor Fabrication
App 20190172748 - Clevenger; Lawrence A. ; et al. | 2019-06-06 |
Cognitive Situation-aware Vision Deficiency Remediation
App 20190168668 - Chan; Yuk L. ; et al. | 2019-06-06 |
Cognitive Situation-aware Vision Deficiency Remediation
App 20190172234 - Chan; Yuk L. ; et al. | 2019-06-06 |
Capacitance Reduction In Sea Of Lines Beol Metallization
App 20190172783 - Briggs; Benjamin D. ; et al. | 2019-06-06 |
Cognitive Situation-aware Vision Deficiency Remediation
App 20190172229 - Chan; Yuk L. ; et al. | 2019-06-06 |
Cognitive Situation-aware Vision Deficiency Remediation
App 20190172347 - Chan; Yuk L. ; et al. | 2019-06-06 |
Granting Requests For Authorization Using Data Of Devices Associated With Requestors
App 20190164163 - SKORDAS; Spyridon ; et al. | 2019-05-30 |
Structures And Methods For Embedded Magnetic Random Access Memory (mram) Fabrication
App 20190165042 - Clevenger; Lawrence A. ; et al. | 2019-05-30 |
Secure Access For Drone Package Delivery
App 20190164441 - Briggs; Benjamin D. ; et al. | 2019-05-30 |
Computer-mediated Reality Including Physical Damping Feedback
App 20190155236 - Briggs; Benjamin D. ; et al. | 2019-05-23 |
Low-Temperature Diffusion Doping of Copper Interconnects Independent of Seed Layer Composition
App 20190148303 - Briggs; Benjamin D. ; et al. | 2019-05-16 |
Wraparound Top Electrode Line For Crossbar Array Resistive Switching Device
App 20190148637 - Ando; Takashi ; et al. | 2019-05-16 |
Drone Delivery Routing And Communication
App 20190122177 - BRIGGS; BENJAMIN D. ; et al. | 2019-04-25 |
Language Learning And Speech Enhancement Through Natural Language Processing
App 20190122574 - Amin; Mahmoud ; et al. | 2019-04-25 |
Optimizating Semiconductor Binning By Feed-forward Process Adjustment
App 20190122911 - Briggs; Benjamin D. ; et al. | 2019-04-25 |
Precision Beol Resistors
App 20190115421 - Li; Baozhen ; et al. | 2019-04-18 |
Precision Beol Resistors
App 20190115420 - Li; Baozhen ; et al. | 2019-04-18 |
Precision Beol Resistors
App 20190115419 - Li; Baozhen ; et al. | 2019-04-18 |
| 