Clementi; Cesare

Patent Applications and Registrations

Patent applications and USPTO patent grants for Clementi; Cesare.The latest application filed is for "method for manufacturing electronic non-volatile memory devices integrated in a semiconductor substrate".

Company Profile

0.12.10

Clementi; Cesare - Busto Arsizio IT
Clementi; Cesare - Busto Arisizio IT
Clementi; Cesare - Busto Arsizio VA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method for manufacturing electronic non-volatile memory devices integrated in a semiconductor substrate Grant 7,326,615 - Pavan , et al. February 5, 2	2008-02-05
Method for manufacturing non-volatile memory cells on a semiconductor substrate Grant 7,125,808 - Clementi , et al. October 24, 2	2006-10-24
Method for manufacturing non-volatile memory cells on a semiconductor substrate Grant 7,125,807 - Clementi , et al. October 24, 2	2006-10-24
Method for manufacturing electronic non-volatile memory devices integrated in a semiconductor substrate App 20060166439 - Pavan; Alessia ; et al.	2006-07-27
Method for manufacturing non-volatile memory cells on a semiconductive substrate App 20040209472 - Clementi, Cesare ; et al.	2004-10-21
Method for manufacturing non-volatile memory cells on a semiconductor substrate App 20040203250 - Clementi, Cesare ; et al.	2004-10-14
Process for the selective formation of salicide on active areas of MOS devices Grant 6,800,901 - Moroni , et al. October 5, 2	2004-10-05
Method for forming structures self-aligned with each other on a semiconductor substrate App 20040188757 - Baldi, Livio ; et al.	2004-09-30
Non-volatile memory cell comprising dielectriclayers having a low dielectric constant and corresponding manufacturing process App 20040179392 - Pavan, Alessia ; et al.	2004-09-16
Electronic devices with nonvolatile memory cells of reduced dimensions Grant 6,603,171 - Grossi , et al. August 5, 2	2003-08-05
Process for the selective formation of salicide on active areas of MOS devices App 20030111689 - Moroni, Maurizio ; et al.	2003-06-19
Process for manufacturing electronic devices comprising nonvolatile memory cells of reduced dimensions App 20030064558 - Grossi, Alessandro ; et al.	2003-04-03
Process for forming an integrated circuit comprising non-volatile memory cells and side transistors of at least two different types, and corresponding IC App 20030015753 - Clementi, Cesare ; et al.	2003-01-23
Process for manufacturing electronic devices comprising nonvolatile memory cells of reduced dimensions Grant 6,509,222 - Grossi , et al. January 21, 2	2003-01-21
Process for the selective formation of salicide on active areas of MOS devices Grant 6,492,234 - Moroni , et al. December 10, 2	2002-12-10
Nonvolatile floating-gate memory devices, and process of fabrication App 20020158285 - Clementi, Cesare ; et al.	2002-10-31
Process For Forming An Integrated Circuit Comprising Non-volatile Memory Cells And Side Transistors Of At Least Two Different Types, And Corresponding Ic App 20020000636 - CLEMENTI, CESARE ; et al.	2002-01-03
Method of manufacturing a MOS integrated circuit having components with different dielectrics Grant 6,114,203 - Ghidini , et al. September 5, 2	2000-09-05
Non-volatile integrated low-doped drain device with partially overlapping gate regions Grant 5,977,586 - Crisenza , et al. November 2, 1	1999-11-02
Process for forming an integrated circuit comprising non-volatile memory cells and side transistors of at least two different types, and corresponding IC Grant 5,856,221 - Clementi , et al. January 5, 1	1999-01-05
EPROM cell with a readily scalable interpoly dielectric Grant 5,600,166 - Clementi , et al. February 4, 1	1997-02-04
Method of making an EPROM cell with a readily scalable interpoly dielectric Grant 5,422,291 - Clementi , et al. June 6, 1	1995-06-06

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