loadpatents
Patent applications and USPTO patent grants for Chiu; Yi-Te.The latest application filed is for "time-interleaving sensing scheme for pseudo dual-port memory".
Patent | Date |
---|---|
Time-interleaving Sensing Scheme For Pseudo Dual-port Memory App 20210327500 - Kuo; Yi-Ping ;   et al. | 2021-10-21 |
Sense amplifier Grant 10,770,161 - Wang , et al. Sep | 2020-09-08 |
Data line control circuit using write-assist data line coupling and associated data line control method Grant 10,541,023 - Wang , et al. Ja | 2020-01-21 |
Sense Amplifier App 20190108890 - Wang; Chia-Wei ;   et al. | 2019-04-11 |
Data Line Control Circuit Using Write-assist Data Line Coupling And Associated Data Line Control Method App 20190074054 - Wang; Chia-Wei ;   et al. | 2019-03-07 |
Sense amplifier Grant 10,181,358 - Wang , et al. Ja | 2019-01-15 |
Sense Amplifier App 20180114583 - Wang; Chia-Wei ;   et al. | 2018-04-26 |
Dual-rail power equalizer Grant 9,690,365 - Mair , et al. June 27, 2 | 2017-06-27 |
Dual-Rail Power Equalizer App 20160320821 - Mair; Hugh Thomas ;   et al. | 2016-11-03 |
Dual-port subthreshold SRAM cell Grant 8,498,174 - Chiu , et al. July 30, 2 | 2013-07-30 |
Static random access memory cell and method of operating the same Grant 8,437,178 - Chiu , et al. May 7, 2 | 2013-05-07 |
Dual-port Subthreshold Sram Cell App 20120307548 - Chiu; Yi-Te ;   et al. | 2012-12-06 |
Static Random Access Memory Cell And Method Of Operating The Same App 20120230086 - Chiu; Yi-Te ;   et al. | 2012-09-13 |
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