loadpatents
name:-0.38159894943237
name:-0.48852491378784
name:-0.069796800613403
Chiou; Wen-Chih Patent Filings

Chiou; Wen-Chih

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chiou; Wen-Chih.The latest application filed is for "singulation and bonding methods and structures formed thereby".

Company Profile
69.200.200
  • Chiou; Wen-Chih - Zhunan Township TW
  • Chiou; Wen-Chih - Miaoli County TW
  • Chiou; Wen-Chih - Hsinchu TW
  • CHIOU; Wen-Chih - Toufen TW
  • Chiou; Wen-Chih - Hsin-Chu TW
  • Chiou; Wen-Chih - Zhunan TW
  • Chiou; Wen-Chih - Miaoli TW
  • Chiou; Wen-Chih - Zhunan City TW
  • Chiou; Wen-Chih - Maoli N/A TW
  • CHIOU; Wen-Chih - Toufen Township TW
  • - Miaoli TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Singulation and Bonding Methods and Structures Formed Thereby
App 20220310565 - Yu; Chen-Hua ;   et al.
2022-09-29
Semiconductor Device With Nanostructures Aligned With Grating Coupler And Manufacturing Method Thereof
App 20220308284 - Liao; Yu-Kuang ;   et al.
2022-09-29
Via for semiconductor device connection and methods of forming the same
Grant 11,444,020 - Yu , et al. September 13, 2
2022-09-13
Wafer bonding method
Grant 11,437,344 - Lin , et al. September 6, 2
2022-09-06
Chiplet Interposer
App 20220262742 - Hou; Shang-Yun ;   et al.
2022-08-18
Passivation Structure with Planar Top Surfaces
App 20220262698 - Chen; Yi-Hsiu ;   et al.
2022-08-18
Bonding Structures of Integrated Circuit Devices and Method Forming the Same
App 20220238466 - Tsai; Chen-Yu ;   et al.
2022-07-28
Apparatus And Method For Wafer Pre-wetting
App 20220220624 - Tsai; Chen-Yu ;   et al.
2022-07-14
Method Of Manufacturing Semiconductor Structure
App 20220208725 - CHEN; MING-FA ;   et al.
2022-06-30
Plating Apparatus For Plating Semiconductor Wafer And Plating Method
App 20220205126 - Tsai; Chen-Yu ;   et al.
2022-06-30
Singulation and bonding methods and structures formed thereby
Grant 11,355,475 - Yu , et al. June 7, 2
2022-06-07
3d Integrated Circuit (3dic) Structure
App 20220157785 - Yu; Chen-Hua ;   et al.
2022-05-19
Semiconductor structures and methods
Grant 11,304,290 - Yu , et al. April 12, 2
2022-04-12
Semiconductor structure and manufacturing method thereof
Grant 11,289,450 - Chen , et al. March 29, 2
2022-03-29
TSV Structure and Method Forming Same
App 20220093461 - Chung; Ming-Tsu ;   et al.
2022-03-24
Integrated Circuit Package and Method
App 20220068856 - Chiou; Wen-Chih ;   et al.
2022-03-03
Wafer debonding and cleaning apparatus
Grant 11,264,262 - Chiou , et al. March 1, 2
2022-03-01
3D integrated circuit (3DIC) structure
Grant 11,239,201 - Yu , et al. February 1, 2
2022-02-01
Methods Of Forming Integrated Circuit Packages
App 20210391306 - Hsu; Chia-Hao ;   et al.
2021-12-16
Isolation Bonding Film for Semiconductor Packages and Methods of Forming the Same
App 20210384158 - Chung; Ming-Tsu ;   et al.
2021-12-09
Giga Interposer Integration through Chip-On-Wafer-On-Substrate
App 20210366814 - Hou; Shang-Yun ;   et al.
2021-11-25
Method of Forming Semiconductor Device Having Backside Interconnect Structure on Through Substrate Via
App 20210335694 - Lin; Yung-Chi ;   et al.
2021-10-28
Semiconductor Structure And Manufacturing Method Thereof
App 20210327836 - Lin; Yung-Chi ;   et al.
2021-10-21
Integrated Circuit Package And Method
App 20210327866 - Yu; Chen-Hua ;   et al.
2021-10-21
Integrated circuit packages and methods of forming the same
Grant 11,145,623 - Hsu , et al. October 12, 2
2021-10-12
Method Of Manufacturing Semiconductor Package Structure
App 20210313309 - Chen; Yi-Hsiu ;   et al.
2021-10-07
Wafer Bonding Method
App 20210305200 - Lin; Yung-Chi ;   et al.
2021-09-30
Stacked Image Sensor Device And Method Of Forming Same
App 20210273013 - Chiou; Wen-Chih ;   et al.
2021-09-02
Isolation bonding film for semiconductor packages and methods of forming the same
Grant 11,101,240 - Chung , et al. August 24, 2
2021-08-24
Semiconductor Device And Manufacturing Method Thereof
App 20210257339 - Yu; Chen-Hua ;   et al.
2021-08-19
Semiconductor structure and manufacturing method thereof
Grant 11,063,008 - Lin , et al. July 13, 2
2021-07-13
Semiconductor device having backside interconnect structure on through substrate via and method of forming the same
Grant 11,056,419 - Lin , et al. July 6, 2
2021-07-06
Method of manufacturing semiconductor package structure
Grant 11,043,481 - Chen , et al. June 22, 2
2021-06-22
Singulation and bonding methods and structures formed thereby
Grant 11,037,904 - Yu , et al. June 15, 2
2021-06-15
Profile of through via protrusion in 3DIC interconnect
Grant 11,004,741 - Wu , et al. May 11, 2
2021-05-11
System, structure, and method of manufacturing a semiconductor substrate stack
Grant 11,004,832 - Chang , et al. May 11, 2
2021-05-11
Semiconductor device and manufacturing method thereof
Grant 10,978,424 - Yu , et al. April 13, 2
2021-04-13
3D stacked-chip package
Grant 10,971,417 - Yu , et al. April 6, 2
2021-04-06
Semiconductor Device and Method
App 20210090906 - Tsai; Chen-Yu ;   et al.
2021-03-25
Semiconductor Devices and Methods of Manufacture
App 20210091084 - Yu; Chen-Hua ;   et al.
2021-03-25
Semiconductor Structure And Manufacturing Method Thereof
App 20210082846 - Lin; Yung-Chi ;   et al.
2021-03-18
Interconnect Structure and Method of Forming Same
App 20210050316 - Lo; Hsiao Yun ;   et al.
2021-02-18
Package structure and manufacturing method thereof
Grant 10,914,895 - Liao , et al. February 9, 2
2021-02-09
Alignment marks in substrate having through-substrate via (TSV)
Grant 10,910,267 - Chang , et al. February 2, 2
2021-02-02
Semiconductor Package
App 20210005591 - Liao; Yu-Kuang ;   et al.
2021-01-07
Semiconductor Component Having Through-silicon Vias
App 20210005515 - YU; Chen-Hua ;   et al.
2021-01-07
Isolation Bonding Film for Semiconductor Packages and Methods of Forming the Same
App 20200411472 - Chung; Ming-Tsu ;   et al.
2020-12-31
Die stack structure and method of fabricating the same
Grant 10,879,214 - Chen , et al. December 29, 2
2020-12-29
Bonding apparatus and method of bonding substrates
Grant 10,872,874 - Yu , et al. December 22, 2
2020-12-22
Integrated Circuit Packages And Methods Of Forming The Same
App 20200395338 - Hsu; Chia-Hao ;   et al.
2020-12-17
Die structure, die stack structure and method of fabricating the same
Grant 10,867,943 - Chen , et al. December 15, 2
2020-12-15
Method and apparatus for bonding semiconductor devices
Grant 10,867,831 - Tsai , et al. December 15, 2
2020-12-15
Method and structure of three-dimensional chip stacking
Grant 10,867,985 - Yu , et al. December 15, 2
2020-12-15
Die stack structure and method of fabricating the same
Grant 10,867,963 - Hsu , et al. December 15, 2
2020-12-15
3D packages and methods for forming the same
Grant 10,854,567 - Hou , et al. December 1, 2
2020-12-01
Forming metal bonds with recesses
Grant 10,854,574 - Chen , et al. December 1, 2
2020-12-01
Method and Apparatus for Bonding Semiconductor Devices
App 20200373185 - Tsai; Yan-Zuo ;   et al.
2020-11-26
Embedded 3D interposer structure
Grant 10,847,414 - Shih , et al. November 24, 2
2020-11-24
Through Via Structure and Method
App 20200343176 - Lin; Yung-Chi ;   et al.
2020-10-29
Interconnect structure and method of forming same
Grant 10,811,374 - Lo , et al. October 20, 2
2020-10-20
Alignment Marks in Substrate Having Through-Substrate Via (TSV)
App 20200321249 - Chang; Hsin ;   et al.
2020-10-08
Semiconductor package
Grant 10,797,031 - Liao , et al. October 6, 2
2020-10-06
Method of making a semiconductor component having through-silicon vias
Grant 10,784,162 - Yu , et al. Sept
2020-09-22
Package Structure And Method Of Forming The Same
App 20200294966 - Chen; Yi-Hsiu ;   et al.
2020-09-17
Die Stack Structure And Method Of Fabricating The Same
App 20200294965 - Hsu; Chia-Hao ;   et al.
2020-09-17
Method Of Manufacturing Semiconductor Package Structure
App 20200286879 - Chen; Yi-Hsiu ;   et al.
2020-09-10
Method and apparatus for bonding semiconductor devices
Grant 10,748,803 - Tsai , et al. A
2020-08-18
Via for Semiconductor Device Connection and Methods of Forming the Same
App 20200243442 - Yu; Chen-Hua ;   et al.
2020-07-30
Semiconductor devices, methods of manufacture thereof, and capacitors
Grant 10,727,294 - Chiou , et al.
2020-07-28
Through via structure and method
Grant 10,714,423 - Lin , et al.
2020-07-14
Alignment marks in substrate having through-substrate via (TSV)
Grant 10,692,764 - Chang , et al.
2020-06-23
Forming metal bonds with recesses
Grant 10,685,935 - Chen , et al.
2020-06-16
Three-dimensional integrated circuit structure and method of manufacturing the same
Grant 10,672,737 - Chen , et al.
2020-06-02
Method of manufacturing semiconductor package structure
Grant 10,665,582 - Chen , et al.
2020-05-26
Profile of Through Via Protrusion in 3DIC Interconnect
App 20200144119 - Wu; Jiung ;   et al.
2020-05-07
3D Packages and Methods for Forming the Same
App 20200126938 - Hou; Shang-Yun ;   et al.
2020-04-23
System, Structure, and Method of Manufacturing a Semiconductor Substrate Stack
App 20200126953 - Chang; Hung-Pin ;   et al.
2020-04-23
Semiconductor Structure And Manufacturing Method Thereof
App 20200118975 - CHEN; MING-FA ;   et al.
2020-04-16
Semiconductor Device and Method
App 20200118879 - Yu; Chen-Hua ;   et al.
2020-04-16
Via for semiconductor device connection and methods of forming the same
Grant 10,622,302 - Yu , et al.
2020-04-14
Semiconductor Device and Method
App 20200111682 - Tsai; Chen-Yu ;   et al.
2020-04-09
Semiconductor Package
App 20200098736 - Liao; Yu-Kuang ;   et al.
2020-03-26
Package Structure And Manufacturing Method Thereof
App 20200091124 - Liao; Yu-Kuang ;   et al.
2020-03-19
Profile of through via protrusion in 3DIC interconnect
Grant 10,566,237 - Wu , et al. Feb
2020-02-18
Method and Structure of Three-Dimensional Chip Stacking
App 20200043909 - Yu; Chen-Hua ;   et al.
2020-02-06
Semiconductor Device And Manifacturing Method Thereof
App 20200043896 - Yu; Chen-Hua ;   et al.
2020-02-06
Embedded 3D Interposer Structure
App 20200035554 - Shih; Ying-Ching ;   et al.
2020-01-30
Robust through-silicon-via structure
Grant 10,535,586 - Lin , et al. Ja
2020-01-14
3D packages and methods for forming the same
Grant 10,529,679 - Hou , et al. J
2020-01-07
Forming Metal Bonds with Recesses
App 20200006288 - Chen; Ming-Fa ;   et al.
2020-01-02
Semiconductor Device Having Backside Interconnect Structure on Through Substrate Via and Method of Forming the Same
App 20200006201 - Lin; Yung-Chi ;   et al.
2020-01-02
System, structure, and method of manufacturing a semiconductor substrate stack
Grant 10,515,933 - Chang , et al. Dec
2019-12-24
Method and structure of three-dimensional chip stacking
Grant 10,515,940 - Yu , et al. Dec
2019-12-24
Die Structure, Die Stack Structure And Method Of Fabricating The Same
App 20190385963 - Chen; Yi-Hsiu ;   et al.
2019-12-19
Semiconductor structure and manufacturing method thereof
Grant 10,510,718 - Chen , et al. Dec
2019-12-17
Semiconductor device having backside interconnect structure on through substrate via and method of forming the same
Grant 10,510,641 - Lin , et al. Dec
2019-12-17
Bond structures and the methods of forming the same
Grant 10,510,699 - Yu , et al. Dec
2019-12-17
Semiconductor device package including conformal metal cap contacting each semiconductor die
Grant 10,510,561 - Tsai , et al. Dec
2019-12-17
Semiconductor device and method
Grant 10,510,604 - Yu , et al. Dec
2019-12-17
Embedded 3D interposer structure
Grant 10,497,616 - Shih , et al. De
2019-12-03
3d Stacked-chip Package
App 20190355640 - Yu; Chen-Hua ;   et al.
2019-11-21
Via For Component Electrode Connection
App 20190341306 - Yu; Chen-Hua ;   et al.
2019-11-07
Wafer Debonding And Cleaning Apparatus
App 20190304828 - Chiou; Wen-Chih ;   et al.
2019-10-03
3d Integrated Circuit (3dic) Structure And Method Of Making Same
App 20190295989 - Yu; Chen-Hua ;   et al.
2019-09-26
Bonding Apparatus And Method Of Bonding Substrates
App 20190267347 - Yu; Chen-Hua ;   et al.
2019-08-29
Robust through-silicon-via structure
Grant 10,396,014 - Lin , et al. A
2019-08-27
Robust Through-Silicon-Via Structure
App 20190259684 - Lin; Yung-Chi ;   et al.
2019-08-22
Via for Semiconductor Device Connection and Methods of Forming the Same
App 20190252312 - Yu; Chen-Hua ;   et al.
2019-08-15
Bond Structures and the Methods of Forming the Same
App 20190252335 - Yu; Chen-Hua ;   et al.
2019-08-15
Wafer debonding and cleaning apparatus and method
Grant 10,381,254 - Chiou , et al. A
2019-08-13
Method and Apparatus for Bonding Semiconductor Devices
App 20190244851 - Tsai; Yan-Zuo ;   et al.
2019-08-08
3D stacked-chip package
Grant 10,373,885 - Yu , et al.
2019-08-06
Optical transceiver
Grant 10,333,623 - Liao , et al.
2019-06-25
Bonded 3D integrated circuit (3DIC) structure
Grant 10,319,701 - Yu , et al.
2019-06-11
Forming Metal Bonds with Recesses
App 20190148336 - Chen; Ming-Fa ;   et al.
2019-05-16
Three-dimensional Integrated Circuit Structure And Method Of Manufacturing The Same
App 20190139935 - Chen; Yi-Hsiu ;   et al.
2019-05-09
Alignment Marks in Substrate Having Through-Substrate Via (TSV)
App 20190131172 - Chang; Hsin ;   et al.
2019-05-02
Die Stack Structure And Method Of Fabricating The Same
App 20190131276 - Chen; Yi-Hsiu ;   et al.
2019-05-02
Method Of Manufacturing Semiconductor Package Structure
App 20190131289 - Chen; Yi-Hsiu ;   et al.
2019-05-02
Profile of Through Via Protrusion in 3DIC Interconnect
App 20190122927 - Wu; Jiung ;   et al.
2019-04-25
Semiconductor Device and Method
App 20190122930 - Yu; Chen-Hua ;   et al.
2019-04-25
Method and apparatus for bonding semiconductor devices
Grant 10,269,611 - Tsai , et al.
2019-04-23
Semiconductor device and method
Grant 10,269,761 - Tsai , et al.
2019-04-23
Bond structures and the methods of forming the same
Grant 10,269,741 - Yu , et al.
2019-04-23
Structure and formation method for chip package
Grant 10,269,717 - Yu , et al.
2019-04-23
Method Of Making A Semiconductor Component Having Through-silicon Vias
App 20190067107 - YU; Chen-Hua ;   et al.
2019-02-28
Semiconductor Structure And Manufacturing Method Thereof
App 20190067244 - CHEN; MING-FA ;   et al.
2019-02-28
Through via structure extending to metallization layer
Grant 10,170,396 - Chen , et al. J
2019-01-01
Profile of through via protrusion in 3DIC interconnect
Grant 10,163,705 - Wu , et al. Dec
2018-12-25
Alignment marks in substrate having through-substrate via (TSV)
Grant 10,163,706 - Chang , et al. Dec
2018-12-25
Isolation structure for stacked dies
Grant 10,163,756 - Chang , et al. Dec
2018-12-25
Semiconductor device and method
Grant 10,163,709 - Yu , et al. Dec
2018-12-25
Interconnect structure and method of forming same
Grant 10,157,866 - Lo , et al. Dec
2018-12-18
Semiconductor packages and methods of forming the same
Grant 10,157,892 - Chen , et al. Dec
2018-12-18
Package with metal-insulator-metal capacitor and method of manufacturing the same
Grant 10,153,205 - Yu , et al. Dec
2018-12-11
Method of manufacturing a capacitor
Grant 10,153,338 - Chang , et al. Dec
2018-12-11
Singulation and Bonding Methods and Structures Formed Thereby
App 20180350778 - Yu; Chen-Hua ;   et al.
2018-12-06
Semiconductor component having through-silicon vias and method of manufacture
Grant 10,115,634 - Yu , et al. October 30, 2
2018-10-30
Embedded 3D Interposer Structure
App 20180301376 - Shih; Ying-Ching ;   et al.
2018-10-18
Semiconductor Structures And Methods
App 20180295717 - Yu; Chen-Hua ;   et al.
2018-10-11
Self-alignment for redistribution layer
Grant 10,074,595 - Yang , et al. September 11, 2
2018-09-11
Method of using a wafer cassette to charge an electrostatic carrier
Grant 10,068,789 - Chiou , et al. September 4, 2
2018-09-04
Light-emitting device
Grant 10,062,821 - Chen , et al. August 28, 2
2018-08-28
Embedded 3D interposer structure
Grant 10,049,928 - Shih , et al. August 14, 2
2018-08-14
Interconnection structure with confinement layer
Grant 10,032,698 - Lo , et al. July 24, 2
2018-07-24
CIS chips and methods for forming the same
Grant 10,020,344 - Yu , et al. July 10, 2
2018-07-10
Semiconductor Devices, Methods of Manufacture Thereof, and Capacitors
App 20180175137 - Chiou; Wen-Chih ;   et al.
2018-06-21
Bond Structures and the Methods of Forming the Same
App 20180166408 - Yu; Chen-Hua ;   et al.
2018-06-14
Through silicon via structure
Grant 9,997,497 - Yu , et al. June 12, 2
2018-06-12
Protection layer for adhesive material at wafer edge
Grant 9,997,440 - Chiou , et al. June 12, 2
2018-06-12
Interconnect Structure and Method of Forming Same
App 20180145046 - Lo; Hsiao Yun ;   et al.
2018-05-24
Through Via Structure and Method
App 20180145022 - Lin; Yung-Chi ;   et al.
2018-05-24
Robust Through-Silicon-Via Structure
App 20180145012 - Lin; Yung-Chi ;   et al.
2018-05-24
Through via structure and method
Grant 9,978,607 - Lin , et al. May 22, 2
2018-05-22
Wafer backside interconnect structure connected to TSVs
Grant 9,978,708 - Chen , et al. May 22, 2
2018-05-22
Interconnect structure and method
Grant 9,953,920 - Chen , et al. April 24, 2
2018-04-24
Semiconductor manufacturing process and package carrier
Grant 9,922,934 - Wang , et al. March 20, 2
2018-03-20
Semiconductor devices, methods of manufacture thereof, and capacitors
Grant 9,899,467 - Chiou , et al. February 20, 2
2018-02-20
Bond structures and the methods of forming the same
Grant 9,893,028 - Yu , et al. February 13, 2
2018-02-13
Method and Structure of Three-Dimensional Chip Stacking
App 20180019236 - Yu; Chen-Hua ;   et al.
2018-01-18
Self-Alignment for Redistribution Layer
App 20180012825 - Yang; Ku-Feng ;   et al.
2018-01-11
Robust through-silicon-via structure
Grant 9,865,523 - Lin , et al. January 9, 2
2018-01-09
Methods for forming a device having a capped through-substrate via structure
Grant 9,847,256 - Lin , et al. December 19, 2
2017-12-19
Chip-stacking apparatus having a transport device configured to transport a chip onto a substrate
Grant 9,842,823 - Yu , et al. December 12, 2
2017-12-12
Through via structure
Grant 9,831,177 - Lin , et al. November 28, 2
2017-11-28
Semiconductor Manufacturing Process And Package Carrier
App 20170317033 - Wang; Shih-Hui ;   et al.
2017-11-02
Structure and Formation Method for Chip Package
App 20170317030 - Yu; Chen-Hua ;   et al.
2017-11-02
Methods of packaging semiconductor devices and packaged semiconductor devices
Grant 9,806,062 - Jeng , et al. October 31, 2
2017-10-31
Backside through vias in a bonded structure
Grant 9,799,694 - Wu , et al. October 24, 2
2017-10-24
Formation of through via before contact processing
Grant 9,793,192 - Yu , et al. October 17, 2
2017-10-17
Self-alignment for redistribution layer
Grant 9,786,580 - Yang , et al. October 10, 2
2017-10-10
Methods of making integrated circuits including conductive structures through substrates
Grant 9,773,701 - Liu , et al. September 26, 2
2017-09-26
Method and structure of three-dimensional chip stacking
Grant 9,773,768 - Yu , et al. September 26, 2
2017-09-26
Interconnection Structure with Confinement Layer
App 20170271242 - Lo; Hsiao Yun ;   et al.
2017-09-21
Light-emitting Device
App 20170271568 - CHEN; Ding-Yuan ;   et al.
2017-09-21
Interconnect Structure and Method of Forming Same
App 20170271287 - Lo; Hsiao Yun ;   et al.
2017-09-21
3d Stacked-chip Package
App 20170263519 - Yu; Chen-Hua ;   et al.
2017-09-14
Dummy structure for chip-on-wafer-on-substrate
Grant 9,754,831 - Kuo , et al. September 5, 2
2017-09-05
Low cost and ultra-thin chip on wafer on substrate (CoWoS) formation
Grant 9,748,190 - Chen , et al. August 29, 2
2017-08-29
Method Of Manufacturing A Capacitor
App 20170229534 - CHANG; Chun Hua ;   et al.
2017-08-10
System, structure, and method of manufacturing a semiconductor substrate stack
Grant 9,728,457 - Chang , et al. August 8, 2
2017-08-08
Method for Through Silicon via Structure
App 20170221861 - Yu; Chen-Hua ;   et al.
2017-08-03
Wafer backside interconnect structure connected to TSVs
Grant 9,716,074 - Chen , et al. July 25, 2
2017-07-25
Structure and formation method for chip package
Grant 9,711,458 - Yu , et al. July 18, 2
2017-07-18
System, Structure, and Method of Manufacturing a Semiconductor Substrate Stack
App 20170194295 - Chang; Hung-Pin ;   et al.
2017-07-06
Semiconductor Device and Method
App 20170194286 - Tsai; Cheng-Chun ;   et al.
2017-07-06
Conductor structure for three-dimensional semiconductor device
Grant 9,698,080 - Chiou , et al. July 4, 2
2017-07-04
Light-emitting device including reflective layer
Grant 9,698,325 - Chen , et al. July 4, 2
2017-07-04
Bond Structures and the Methods of Forming the Same
App 20170186715 - Yu; Chen-Hua ;   et al.
2017-06-29
Cylindrical embedded capacitors
Grant 9,691,840 - Su , et al. June 27, 2
2017-06-27
Interconnect structure and method of forming same
Grant 9,679,859 - Lo , et al. June 13, 2
2017-06-13
Interconnection structure with confinement layer
Grant 9,673,132 - Lo , et al. June 6, 2
2017-06-06
3D stacked-chip package
Grant 9,666,520 - Yu , et al. May 30, 2
2017-05-30
Singulation and Bonding Methods and Structures Formed Thereby
App 20170148765 - Yu; Chen-Hua ;   et al.
2017-05-25
Method of manufacturing a capacitor
Grant 9,660,016 - Chang , et al. May 23, 2
2017-05-23
Semiconductor Device and Method
App 20170140947 - Tsai; Chen-Yu ;   et al.
2017-05-18
Structure And Formation Method For Chip Package
App 20170141040 - YU; Chen-Hua ;   et al.
2017-05-18
Integrated circuit package with probe pad structure
Grant 9,653,427 - Wu , et al. May 16, 2
2017-05-16
Method for through silicon via structure
Grant 9,633,900 - Yu , et al. April 25, 2
2017-04-25
TSV formation
Grant 9,633,929 - Yang , et al. April 25, 2
2017-04-25
Method and Structure of Three-Dimensional Chip Stacking
App 20170103973 - Yu; Chen-Hua ;   et al.
2017-04-13
Method Of Using A Wafer Cassette To Charge An Electrostatic Carrier
App 20170103910 - Chiou; Wen-Chih ;   et al.
2017-04-13
Device with Through-Substrate Via Structure and Method for Forming the Same
App 20170084489 - Lin; Yung-Chi ;   et al.
2017-03-23
Semiconductor device and method
Grant 9,601,410 - Tsai , et al. March 21, 2
2017-03-21
Three Dimensional Integrated Circuit Structure And Manufacturing Method Of The Same
App 20170062392 - Cheng; Kuang-Wei ;   et al.
2017-03-02
Three dimensional integrated circuit structure and manufacturing method of the same
Grant 9,583,465 - Cheng , et al. February 28, 2
2017-02-28
Wafer cassette with electrostatic carrier charging scheme
Grant 9,570,331 - Chiou , et al. February 14, 2
2017-02-14
Semiconductor Device Having Backside Interconnect Structure on Through Substrate Via and Method of Forming the Same
App 20170011988 - Lin; Yung-Chi ;   et al.
2017-01-12
Wafer Backside Interconnect Structure Connected to TSVs
App 20170005069 - Chen; Ming-Fa ;   et al.
2017-01-05
Dummy Structure for Chip-on-Wafer-on-Substrate
App 20160358818 - Kuo; Pei-Ching ;   et al.
2016-12-08
Device with capped through-substrate via structure
Grant 9,514,986 - Lin , et al. December 6, 2
2016-12-06
Methods of Packaging Semiconductor Devices and Packaged Semiconductor Devices
App 20160329302 - Jeng; Shin-Puu ;   et al.
2016-11-10
Semiconductor Component Having Through-silicon Vias And Method Of Manufacture
App 20160329245 - YU; Chen-Hua ;   et al.
2016-11-10
Alignment mark and method of formation
Grant 9,478,480 - Tsai , et al. October 25, 2
2016-10-25
Wafer backside interconnect structure connected to TSVs
Grant 9,449,875 - Chen , et al. September 20, 2
2016-09-20
Semiconductor device having backside interconnect structure through substrate via and method of forming the same
Grant 9,449,898 - Lin , et al. September 20, 2
2016-09-20
Dummy structure for chip-on-wafer-on-substrate
Grant 9,425,126 - Kuo , et al. August 23, 2
2016-08-23
Semiconductor Device and Method
App 20160240439 - Yu; Chen-Hua ;   et al.
2016-08-18
CIS Chips and Methods for Forming the Same
App 20160240583 - Yu; Chen-Hua ;   et al.
2016-08-18
Through-substrate via formation with improved topography control
Grant 9,418,933 - Lin , et al. August 16, 2
2016-08-16
Semiconductor component having through-silicon vias and method of manufacture
Grant 9,418,923 - Yu , et al. August 16, 2
2016-08-16
Apparatus and method of substrate to substrate bonding for three dimensional (3D) IC interconnects
Grant 9,418,961 - Yu , et al. August 16, 2
2016-08-16
Methods of packaging semiconductor devices and packaged semiconductor devices
Grant 9,406,650 - Jeng , et al. August 2, 2
2016-08-02
Wafer debonding and cleaning apparatus and method of use
Grant 9,390,949 - Chiou , et al. July 12, 2
2016-07-12
3d Integrated Circuit (3dic) Structure And Method Of Making Same
App 20160197055 - Yu; Chen-Hua ;   et al.
2016-07-07
Semiconductor Device and Method
App 20160197029 - Tsai; Cheng-Chun ;   et al.
2016-07-07
Chip-stacking Apparatus
App 20160190087 - YU; Chen-Hua ;   et al.
2016-06-30
Through Silicon Via Structure and Method
App 20160181157 - Yu; Chen-Hua ;   et al.
2016-06-23
Light-emitting diodes on concave texture substrate
Grant 9,373,755 - Yu , et al. June 21, 2
2016-06-21
TSV structures and methods for forming the same
Grant 9,373,575 - Lin , et al. June 21, 2
2016-06-21
Backside Through Vias in a Bonded Structure
App 20160172403 - Wu; Weng-Jin ;   et al.
2016-06-16
Integrated Circuit Package and Methods of Forming Same
App 20160172333 - Wu; Chi-Hsi ;   et al.
2016-06-16
Interconnect Structure and Method of Forming Same
App 20160118356 - Lo; Hsiao Yun ;   et al.
2016-04-28
Package With Metal-insulator-metal Capacitor And Method Of Manufacturing The Same
App 20160118301 - Yu; Chen-Hua ;   et al.
2016-04-28
CIS chips and methods for forming the same
Grant 9,324,756 - Yu , et al. April 26, 2
2016-04-26
Bump structure for stacked dies
Grant 9,312,225 - Chang , et al. April 12, 2
2016-04-12
Formation of Through Via Before Contact Processing
App 20160099196 - Yu; Chen-Hua ;   et al.
2016-04-07
Thin wafer handling method
Grant 9,305,769 - Yu , et al. April 5, 2
2016-04-05
Through silicon via structure
Grant 9,299,676 - Yu , et al. March 29, 2
2016-03-29
Stacked structures and methods of forming stacked structures
Grant 9,299,612 - Wu , et al. March 29, 2
2016-03-29
Backside through vias in a bonded structure
Grant 9,293,418 - Wu , et al. March 22, 2
2016-03-22
Barrier for through-silicon via
Grant 9,287,166 - Yu , et al. March 15, 2
2016-03-15
Through Via Structure and Method
App 20160071765 - Lin; Yung-Chi ;   et al.
2016-03-10
Methods of forming integrated circuit package
Grant 9,281,254 - Yu , et al. March 8, 2
2016-03-08
Light-emitting Device
App 20160064632 - CHEN; Ding-Yuan ;   et al.
2016-03-03
TSV Formation
App 20160056090 - Yang; Ku-Feng ;   et al.
2016-02-25
Through substrate via structures and methods of forming the same
Grant 9,263,382 - Yang , et al. February 16, 2
2016-02-16
Package with metal-insulator-metal capacitor and method of manufacturing the same
Grant 9,263,511 - Yu , et al. February 16, 2
2016-02-16
Wafer Cassette with Electrostatic Carrier Charging Scheme
App 20160035609 - Chiou; Wen-Chih ;   et al.
2016-02-04
Interconnect structure and method of forming same
Grant 9,252,110 - Lo , et al. February 2, 2
2016-02-02
Interconnect structures for substrate
Grant 9,240,349 - Yu , et al. January 19, 2
2016-01-19
Three-Dimensional Semiconductor Device
App 20150380341 - Chiou; Wen-Chih ;   et al.
2015-12-31
Method of forming light-generating device including reflective layer
Grant 9,214,613 - Chen , et al. December 15, 2
2015-12-15
Through Via Structure
App 20150357263 - Lin; Yung-Chi ;   et al.
2015-12-10
Formation of through via before contact processing
Grant 9,209,157 - Chiou , et al. December 8, 2
2015-12-08
Dummy Structure for Chip-on-Wafer-on-Substrate
App 20150348872 - Kuo; Pei-Ching ;   et al.
2015-12-03
TSV formation
Grant 9,190,325 - Jeng , et al. November 17, 2
2015-11-17
3d Stacked-chip Package
App 20150318263 - Yu; Chen-Hua ;   et al.
2015-11-05
Profile of Through Via Protrusion in 3DIC Interconnect
App 20150311141 - Wu; Jiung ;   et al.
2015-10-29
Forming interconnect structures using pre-ink-printed sheets
Grant 9,159,673 - Ko , et al. October 13, 2
2015-10-13
Semiconductor Device and Method
App 20150287697 - Tsai; Chen-Yu ;   et al.
2015-10-08
Spin chuck for thin wafer cleaning
Grant 9,153,462 - Lin , et al. October 6, 2
2015-10-06
3D Packages and Methods for Forming the Same
App 20150262958 - Hou; Shang-Yun ;   et al.
2015-09-17
Three-dimensional semiconductor device
Grant 9,130,024 - Chiou , et al. September 8, 2
2015-09-08
Light-emitting diode with textured substrate
Grant 9,130,115 - Yu , et al. September 8, 2
2015-09-08
Through-Substrate via Formation with Improved Topography Control
App 20150249049 - Lin; Yung-Chi ;   et al.
2015-09-03
Method of handling a thin wafer
Grant 9,117,828 - Wu , et al. August 25, 2
2015-08-25
Semiconductor package with through silicon vias
Grant 9,117,943 - Chen , et al. August 25, 2
2015-08-25
Interconnect Structure and Method
App 20150235940 - Chen; Hsin-Yu ;   et al.
2015-08-20
Through Via Structure Extending to Metallization Layer
App 20150235922 - Chen; Yi-Hsiu ;   et al.
2015-08-20
Through via structure and method
Grant 9,112,007 - Lin , et al. August 18, 2
2015-08-18
Methods Of Making Integrated Circuits Including Conductive Structures Through Substrates
App 20150228541 - LIU; Yuan-Hung ;   et al.
2015-08-13
Integrated Circuit Package and Methods of Forming Same
App 20150228550 - Yu; Chen-Hua ;   et al.
2015-08-13
Methods of Packaging Semiconductor Devices and Packaged Semiconductor Devices
App 20150221611 - Jeng; Shin-Puu ;   et al.
2015-08-06
Reconfigurable guide pin design for centering wafers having different sizes
Grant 9,099,515 - Chang , et al. August 4, 2
2015-08-04
Selective curing method of adhesive on substrate
Grant 9,093,489 - Yu , et al. July 28, 2
2015-07-28
Copper bump structures having sidewall protection layers
Grant 9,093,314 - Lin , et al. July 28, 2
2015-07-28
Chip on wafer bonder
Grant 9,093,447 - Yu , et al. July 28, 2
2015-07-28
Interconnect Structures for Substrate
App 20150206799 - Yu; Chen-Hua ;   et al.
2015-07-23
Robust Through-Silicon-Via Structure
App 20150206823 - Lin; Yung-Chi ;   et al.
2015-07-23
Interconnect Structure and Method of Forming Same
App 20150206846 - Lo; Hsiao Yun ;   et al.
2015-07-23
Device with through-silicon via (TSV) and method of forming the same
Grant 9,087,878 - Yu , et al. July 21, 2
2015-07-21
Through-substrate via formation with improved topography control
Grant 9,064,850 - Lin , et al. June 23, 2
2015-06-23
Integrated circuits including conductive structures through a substrate and methods of making the same
Grant 9,059,262 - Liu , et al. June 16, 2
2015-06-16
Semiconductor Devices, Methods of Manufacture Thereof, and Capacitors
App 20150162397 - Chiou; Wen-Chih ;   et al.
2015-06-11
3D packages and methods for forming the same
Grant 9,048,231 - Hou , et al. June 2, 2
2015-06-02
Through Silicon Via Structure and Method
App 20150137361 - Yu; Chen-Hua ;   et al.
2015-05-21
TSV Structures and Methods for Forming the Same
App 20150137360 - Lin; Yung-Chi ;   et al.
2015-05-21
Self-alignment For Redistribution Layer
App 20150137382 - Yang; Ku-Feng ;   et al.
2015-05-21
Low Cost and Ultra-Thin Chip on Wafer on Substrate (CoWoS) Formation
App 20150130058 - Chen; Hsin-Yu ;   et al.
2015-05-14
Semiconductor molding chamber
Grant 9,023,266 - Lin , et al. May 5, 2
2015-05-05
Alignment Marks in Substrate Having Through-Substrate Via (TSV)
App 20150118840 - Chang; Hsin ;   et al.
2015-04-30
Copper Bump Structures Having Sidewall Protection Layers
App 20150111342 - Lin; Jing-Cheng ;   et al.
2015-04-23
Interconnect structure and method
Grant 9,006,101 - Chen , et al. April 14, 2
2015-04-14
Interconnect structures for substrate
Grant 8,994,188 - Yu , et al. March 31, 2
2015-03-31
Through silicon via with embedded barrier pad
Grant 8,980,741 - Lin , et al. March 17, 2
2015-03-17
Alignment Mark and Method of Formation
App 20150069580 - Tsai; Chen-Yu ;   et al.
2015-03-12
Device with Through-Substrate Via Structure and Method for Forming the Same
App 20150061147 - Lin; Yung-Chi ;   et al.
2015-03-05
Light-emitting Diode With Current-spreading Region
App 20150053918 - Chen; Ding-Yuan ;   et al.
2015-02-26
Interconnection Structure with Confinement Layer
App 20150054174 - Lo; Hsiao Yun ;   et al.
2015-02-26
TSV structures and methods for forming the same
Grant 8,956,966 - Lin , et al. February 17, 2
2015-02-17
Low cost and ultra-thin chip on wafer on substrate (CoWoS) formation
Grant 8,951,838 - Chen , et al. February 10, 2
2015-02-10
Surface metal wiring structure for an IC substrate
Grant 8,953,336 - Kao , et al. February 10, 2
2015-02-10
Through silicon via structure
Grant 8,952,506 - Yu , et al. February 10, 2
2015-02-10
Semiconductor Device Having Backside Interconnect Structure On Through Substrate Via And Method Of Forming The Same
App 20150035159 - Lin; Yung-Chi ;   et al.
2015-02-05
Method Of Manufacturing A Capacitor
App 20150037960 - CHANG; Chun Hua ;   et al.
2015-02-05
System, Structure, and Method of Manufacturing a Semiconductor Substrate Stack
App 20150024546 - Chang; Hung-Pin ;   et al.
2015-01-22
Alignment marks in substrate having through-substrate via (TSV)
Grant 8,928,159 - Chang , et al. January 6, 2
2015-01-06
Copper bump structures having sidewall protection layers
Grant 8,922,004 - Lin , et al. December 30, 2
2014-12-30
Wafer Debonding And Cleaning Apparatus And Method
App 20140374031 - CHIOU; Wen-Chih ;   et al.
2014-12-25
Novel Semiconductor Package With Through Silicon Vias
App 20140363910 - Chen; Ding-Yuan ;   et al.
2014-12-11
Method for producing a protective structure
Grant 8,900,994 - Yu , et al. December 2, 2
2014-12-02
Alignment mark and method of formation
Grant 8,896,136 - Tsai , et al. November 25, 2
2014-11-25
Via structure and via etching process of forming the same
Grant 8,896,127 - Chang , et al. November 25, 2
2014-11-25
TSV Structures and Methods for Forming the Same
App 20140342547 - Lin; Yung-Chi ;   et al.
2014-11-20
Through Substrate Via Structures And Methods Of Forming The Same
App 20140327151 - YANG; Ku-Feng ;   et al.
2014-11-06
Capacitor for interposers and methods of manufacture thereof
Grant 8,878,338 - Chang , et al. November 4, 2
2014-11-04
III-V compound semiconductor epitaxy from a non-III-V substrate
Grant 8,878,252 - Yu , et al. November 4, 2
2014-11-04
Wafer Backside Interconnect Structure Connected to TSVs
App 20140322909 - Chen; Ming-Fa ;   et al.
2014-10-30
Wafer Backside Interconnect Structure Connected to TSVs
App 20140312494 - Chen; Ming-Fa ;   et al.
2014-10-23
3D Packages and Methods for Forming the Same
App 20140306341 - Hou; Shang-Yun ;   et al.
2014-10-16
System, structure, and method of manufacturing a semiconductor substrate stack
Grant 8,853,830 - Chang , et al. October 7, 2
2014-10-07
Process of forming through-silicon via structure
Grant 8,846,523 - Wu , et al. September 30, 2
2014-09-30
Bump with protection structure
Grant 8,847,388 - Yu , et al. September 30, 2
2014-09-30
Composite carrier structure
Grant 8,846,499 - Shih , et al. September 30, 2
2014-09-30
Through Silicon Via with Embedded Barrier Pad
App 20140287581 - Lin; Yung-Chi ;   et al.
2014-09-25
Selective Curing Method of Adhesive on Substrate
App 20140261997 - Yu; Tu-Hao ;   et al.
2014-09-18
Low Cost and Ultra-Thin Chip on Wafer on Substrate (CoWoS) Formation
App 20140264834 - Chen; Hsin-Yu ;   et al.
2014-09-18
Interconnect barrier structure and method
Grant 8,835,313 - Yu, I , et al. September 16, 2
2014-09-16
Cost-effective TSV formation
Grant 8,836,085 - Yang , et al. September 16, 2
2014-09-16
Light-emitting diode with current-spreading region
Grant 8,823,049 - Chen , et al. September 2, 2
2014-09-02
Light-emitting diode on a conductive substrate
Grant 8,815,618 - Chen , et al. August 26, 2
2014-08-26
Reflective Layer for Light-Emitting Diodes
App 20140235001 - Chen; Ding-Yuan ;   et al.
2014-08-21
Backside Through Vias in a Bonded Structure
App 20140232013 - Wu; Weng-Jin ;   et al.
2014-08-21
Package With Metal-insulator-metal Capacitor And Method Of Manufacturing The Same
App 20140225222 - YU; Chen-Hua ;   et al.
2014-08-14
Isolation Structure for Stacked Dies
App 20140225277 - Chang; Hung-Pin ;   et al.
2014-08-14
3D packages and methods for forming the same
Grant 8,802,504 - Hou , et al. August 12, 2
2014-08-12
Through substrate via structures and methods of forming the same
Grant 8,803,322 - Yang , et al. August 12, 2
2014-08-12
TSV structures and methods for forming the same
Grant 8,803,316 - Lin , et al. August 12, 2
2014-08-12
III-V compound semiconductor epitaxy using lateral overgrowth
Grant 8,803,189 - Yu , et al. August 12, 2
2014-08-12
Stacked Structures And Methods Of Forming Stacked Structures
App 20140220741 - WU; Weng-Jin ;   et al.
2014-08-07
Through Silicon Via Structure and Method
App 20140203439 - Yu; Chen-Hua ;   et al.
2014-07-24
Forming Interconnect Structures Using Pre-Ink-Printed Sheets
App 20140191395 - Ko; Jung Cheng ;   et al.
2014-07-10
Barrier for Through-Silicon Via
App 20140175652 - Yu; Chen-Hua ;   et al.
2014-06-26
Light-Emitting Diode with Textured Substrate
App 20140166979 - Yu; Chen-Hua ;   et al.
2014-06-19
III-V Compound Semiconductor Epitaxy From a Non-III-V Substrate
App 20140159208 - Yu; Chia-Lin ;   et al.
2014-06-12
Through-Substrate via Formation with Improved Topography Control
App 20140131884 - Lin; Yung-Chi ;   et al.
2014-05-15
Thin Wafer Handling Method
App 20140130962 - YU; Chen-Hua ;   et al.
2014-05-15
Interconnect Structures for Substrate
App 20140117564 - Yu; Chen-Hua ;   et al.
2014-05-01
TSV Formation
App 20140110862 - Jeng; Shin-Puu ;   et al.
2014-04-24
Cylindrical Embedded Capacitors
App 20140106536 - Su; An-Jhih ;   et al.
2014-04-17
Light-Emitting Diodes on Concave Texture Substrate
App 20140087505 - Yu; Chen-Hua ;   et al.
2014-03-27
Through Via Structure and Method
App 20140077374 - Lin; Yung-Chi ;   et al.
2014-03-20
Interconnect Structure and Method
App 20140061924 - Chen; Hsin-Yu ;   et al.
2014-03-06
Omnidirectional Reflector
App 20140054637 - Chen; Ding-Yuan ;   et al.
2014-02-27
CIS Chips and Methods for Forming the Same
App 20140027872 - Yu; Chen-Hua ;   et al.
2014-01-30
Semiconductor Component Having Through-silicon Vias And Method Of Manufacture
App 20140015146 - YU; Chen-Hua ;   et al.
2014-01-16
Cost-Effective TSV Formation
App 20140008802 - Yang; Ku-Feng ;   et al.
2014-01-09
Reconfigurable Guide Pin Design for Centering Wafers Having Different Sizes
App 20130334832 - Chang; Hsin ;   et al.
2013-12-19
Capacitor For Interposers And Methods Of Manufacture Thereof
App 20130320493 - CHANG; Chun Hua ;   et al.
2013-12-05
Semiconductor Molding Chamber
App 20130323886 - Lin; Jing-Cheng ;   et al.
2013-12-05
Apparatus and Method of Substrate to Substrate Bonding for Three Dimensional (3D) IC Interconnects
App 20130320071 - Yu; Chen-Hua ;   et al.
2013-12-05
Device With Through-silicon Via (tsv) And Method Of Forming The Same
App 20130323883 - YU; Chen-Hua ;   et al.
2013-12-05
Interconnect Barrier Structure and Method
App 20130316528 - Yu, I; Chen-Hua ;   et al.
2013-11-28
Embedded 3D Interposer Structure
App 20130309813 - Shih; Ying-Ching ;   et al.
2013-11-21
Bump Structure for Stacked Dies
App 20130299992 - Chang; Hung-Pin ;   et al.
2013-11-14
Capacitor for Interposers and Methods of Manufacture Thereof
App 20130285200 - Chang; Chun Hua ;   et al.
2013-10-31
Through Silicon Via with Embedded Barrier Pad
App 20130285244 - Lin; Yung-Chi ;   et al.
2013-10-31
Through Via Process
App 20130277844 - CHIOU; Wen-Chih ;   et al.
2013-10-24
Light-Emitting Diode with Current-Spreading Region
App 20130264539 - Chen; Ding-Yuan ;   et al.
2013-10-10
Methods Of Forming Semiconductor Structures
App 20130252422 - CHIOU; Wen-Chih ;   et al.
2013-09-26
Methods and Apparatus for Direct Connections to Through Vias
App 20130241057 - Yu; Chen-Hua ;   et al.
2013-09-19
Surface Metal Wiring Structure For An Ic Substrate
App 20130233601 - KAO; Chin-Fu ;   et al.
2013-09-12
Three-Dimensional Integrated Circuits with Protection Layers
App 20100330743A1 -
2010-12-30
Stacked Structures And Methods Of Fabricating Stacked Structures
App 20100327463A1 -
2010-12-30

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed