Chidambaram; P R

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chidambaram; P R.The latest application filed is for "phosphorus activated nmos using sic process".

Company Profile

0.12.18

Chidambaram; P R - San Diego CA
Chidambaram; P R - Richardson TX
Chidambaram; P. R. - Richarson TX
Chidambaram; P.R. - Richardson TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Metal-insulator-metal capacitor over conductive layer Grant 9,818,817 - Zhu , et al. November 14, 2	2017-11-14
High density area efficient thin-oxide decoupling capacitor using conductive gate resistor Grant 9,633,996 - Ge , et al. April 25, 2	2017-04-25
Metal-insulator-metal capacitor under redistribution layer Grant 9,287,347 - Zhu , et al. March 15, 2	2016-03-15
Semiconductor device having high mobility channel Grant 9,245,971 - Yang , et al. January 26, 2	2016-01-26
Complementary back end of line (BEOL) capacitor Grant 8,980,708 - Zhu , et al. March 17, 2	2015-03-17
Nitrogen based implants for defect reduction in strained silicon Grant 8,084,312 - Chakravarthi , et al. December 27, 2	2011-12-27
Phosphorus Activated NMOS Using SiC Process App 20110212584 - Chakravarthi; Srinivasan ; et al.	2011-09-01
Phosphorus activated NMOS using SiC process Grant 7,902,576 - Chakravarthi , et al. March 8, 2	2011-03-08
Methods, systems and structures for forming semiconductor structures incorporating high-temperature processing steps Grant 7,847,401 - Chidambaram , et al. December 7, 2	2010-12-07
Phosphorus Activated NMOS Using SiC Process App 20090142890 - Chakravarthi; Srinivasan ; et al.	2009-06-04
P-doped Region With Improved Abruptness App 20080308904 - Chidambaram; P. R. ; et al.	2008-12-18
Semiconductor Device Manufactured Using Passivation of Crystal Domain Interfaces in Hybrid Orientation Technology App 20080128821 - Pinto; Angelo ; et al.	2008-06-05
Phosphorus Activated NMOS Using SiC Process App 20070072383 - Chakravarthi; Srinivasan ; et al.	2007-03-29
Phosphorus Activated NMOS Using SiC Process App 20070066024 - Chakravarthi; Srinivasan ; et al.	2007-03-22
Highly activated carbon selective epitaxial process for CMOS App 20060199285 - Chidambaram; P.R. ; et al.	2006-09-07
CMOS transistors and methods of forming same App 20060154411 - Bu; Haowen ; et al.	2006-07-13
Phosphorus activated NMOS using SiC process App 20060060893 - Chakravarthi; Srinivasan ; et al.	2006-03-23
Semiconductor device having optimized shallow junction geometries and method for fabrication thereof App 20060001105 - Hornung; Brian E. ; et al.	2006-01-05
Semiconductor device having optimized shallow junction geometries and method for fabrication thereof App 20050245021 - Hornung, Brian E. ; et al.	2005-11-03
CMOS transistors and methods of forming same App 20050059260 - Bu, Haowen ; et al.	2005-03-17
Semiconductor device fabrication methods for inhibiting carbon out-diffusion in wafers having carbon-containing regions Grant 6,830,980 - Mansoori , et al. December 14, 2	2004-12-14
Semiconductor device fabrication methods for inhibiting carbon out-diffusion in wafers having carbon-containing regions App 20040185629 - Mansoori, Majid Movahed ; et al.	2004-09-23
Fabrication of abrupt ultra-shallow junctions App 20040082151 - Chakravarthi, Srinivasan ; et al.	2004-04-29
Fabrication of abrupt ultra-shallow junctions App 20040077157 - Chakravarthi, Srinivasan ; et al.	2004-04-22
Source/drain extension fabrication process with direct implantation Grant 6,709,938 - Miles , et al. March 23, 2	2004-03-23
Fabrication of abrupt ultra-shallow junctions using angled PAI and fluorine implant Grant 6,682,980 - Chidambaram , et al. January 27, 2	2004-01-27
Fabrication Of Abrupt Ultra-shallow Junctions Using Angled Pai And Fluorine Implant App 20030207542 - Chidambaram, P.R. ; et al.	2003-11-06
Fabrication Of Ultra Shallow Junctions From A Solid Source With Fluorine Implantation App 20030109119 - Chakravarthi, Srinivasan ; et al.	2003-06-12
Source/drain extension fabrication process with direct implantation App 20030040169 - Miles, Donald S. ; et al.	2003-02-27
Method for manufacturing an asymmetric I/O transistor Grant 6,465,307 - Chidambaram , et al. October 15, 2	2002-10-15

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