Patent | Date |
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Low temperature sub-nanometer periodic stack dielectrics Grant 11,004,612 - Chen , et al. May 11, 2 | 2021-05-11 |
Low Temperature Sub-nanometer Periodic Stack Dielectrics App 20200294722 - Chen; Yuanning ;   et al. | 2020-09-17 |
Hybrid Energy Harvesting Device App 20160094072 - Chen; Yuanning ;   et al. | 2016-03-31 |
Self-powered integrated circuit with photovoltaic cell Grant 9,048,151 - Chen , et al. June 2, 2 | 2015-06-02 |
Self-powered integrated circuit with multi-junction photovoltaic cell Grant 8,883,541 - Chen , et al. November 11, 2 | 2014-11-11 |
Self-powered Integrated Circuit With Multi-junction Photovoltaic Cell App 20130295711 - Chen; Yuanning ;   et al. | 2013-11-07 |
Self-powered integrated circuit with multi-junction photovoltaic cell Grant 8,552,470 - Chen , et al. October 8, 2 | 2013-10-08 |
Self-powered Integrated Circuit With Multi-junction Photovoltaic Cell App 20120126247 - Chen; Yuanning ;   et al. | 2012-05-24 |
Self-powered Integrated Circuit With Photovoltaic Cell App 20120126298 - Chen; Yuanning ;   et al. | 2012-05-24 |
Integrated circuit with metal silicide regions Grant 7,800,226 - Chen , et al. September 21, 2 | 2010-09-21 |
Annealing to improve edge roughness in semiconductor technology Grant 7,704,883 - Butler , et al. April 27, 2 | 2010-04-27 |
Using oxynitride spacer to reduce parasitic capacitance in CMOS devices Grant 7,667,275 - Chen , et al. February 23, 2 | 2010-02-23 |
Method for manufacturing a semiconductor device having improved across chip implant uniformity Grant 7,569,464 - Kirmse , et al. August 4, 2 | 2009-08-04 |
Stacked Poly Structure To Reduce The Poly Particle Count In Advanced Cmos Technology App 20080251864 - Chen; Yuanning ;   et al. | 2008-10-16 |
Method For Manufacturing A Semiconductor Device Having Improved Across Chip Implant Uniformity App 20080153273 - Kirmse; Karen H.R. ;   et al. | 2008-06-26 |
Annealing To Improve Edge Roughness In Semiconductor Technology App 20080150045 - Butler; Stephanie W. ;   et al. | 2008-06-26 |
Reduction Of Dopant Loss In A Gate Structure App 20070284608 - Chen; Yuanning ;   et al. | 2007-12-13 |
Integrated circuit with metal silicide regions App 20070252220 - Chen; Yuanning ;   et al. | 2007-11-01 |
Reduction of dopant loss in a gate structure Grant 7,276,408 - Chen , et al. October 2, 2 | 2007-10-02 |
Method for forming metal silicide regions in an integrated circuit Grant 7,250,356 - Chen , et al. July 31, 2 | 2007-07-31 |
Process for oxide fabrication using oxidation steps below and above a threshold temperature Grant 7,148,153 - Chen , et al. December 12, 2 | 2006-12-12 |
Using Oxynitride Spacer to Reduce Parasitic Capacitance in CMOS Devices App 20060216882 - Chen; Yuanning ;   et al. | 2006-09-28 |
Encapsulated spacer with low dielectric constant material to reduce the parasitic capacitance between gate and drain in CMOS technology Grant 7,033,897 - Chen , et al. April 25, 2 | 2006-04-25 |
Using oxynitride spacer to reduce parasitic capacitance in CMOS devices App 20060054934 - Chen; Yuanning ;   et al. | 2006-03-16 |
Encapsulated spacer with low dielectric constant material to reduce the parasitic capacitance between gate and drain in CMOS technology App 20050263834 - Chen, Yuanning ;   et al. | 2005-12-01 |
Electronic circuit structure with improved dielectric properties Grant 6,930,006 - Bourdelle , et al. August 16, 2 | 2005-08-16 |
Encapsulated spacer with low dielectric constant material to reduce the parasitic capacitance between gate and drain in CMOS technology App 20050087775 - Chen, Yuanning ;   et al. | 2005-04-28 |
Reduction of dopant loss in a gate structure App 20050079655 - Chen, Yuanning ;   et al. | 2005-04-14 |
Use of hafnium silicon oxynitride as the cap layer of the sidewall spacer App 20040113206 - Chen, Yuanning ;   et al. | 2004-06-17 |
Use of hafnium silicon oxynitride as the cap layer of the sidewall spacer App 20040099964 - Chen, Yuanning ;   et al. | 2004-05-27 |
Use of hafnium silicon oxynitride as the cap layer of the sidewall spacer App 20040094782 - Chen, Yuanning ;   et al. | 2004-05-20 |
Method for forming metal silicide regions in an integrated circuit App 20040053485 - Chen, Yuanning ;   et al. | 2004-03-18 |
Process for oxide fabrication using oxidation steps below and above a threshold temperature App 20030143863 - Chen, Yuanning ;   et al. | 2003-07-31 |
Process for oxide fabrication using oxidation steps below and above a threshold temperature App 20030119337 - Chen, Yuanning ;   et al. | 2003-06-26 |
Method of making a graded grown, high quality oxide layer for a semiconductor device Grant 6,541,394 - Chen , et al. April 1, 2 | 2003-04-01 |
High quality oxide for use in integrated circuits Grant 6,492,712 - Chen , et al. December 10, 2 | 2002-12-10 |
Electronic circuit structure with improved dielectric properties App 20020163050 - Bourdelle, Konstantin K. ;   et al. | 2002-11-07 |