Chantre; Alain

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chantre; Alain.The latest application filed is for "methods of fabricating integrated circuit devices with components on both sides of a semiconductor layer".

Company Profile

5.24.25

Chantre; Alain - Seyssins FR
Chantre; Alain - Saint Egreve FR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Methods of fabricating integrated circuit devices with components on both sides of a semiconductor layer Grant 10,877,211 - Chantre , et al. December 29, 2	2020-12-29
Methods Of Fabricating Integrated Circuit Devices With Components On Both Sides Of A Semiconductor Layer App 20200116927 - Chantre; Alain ; et al.	2020-04-16
Laser device and process for fabricating such a laser device Grant 10,511,147 - Ferrotti , et al. Dec	2019-12-17
Methods of fabricating integrated circuit devices with components on both sides of a semiconductor layer Grant 10,488,587 - Chantre , et al. Nov	2019-11-26
Method for making photonic chip with multi-thickness electro-optic devices and related devices Grant 10,139,563 - Baudot , et al. Nov	2018-11-27
Laser Device And Process For Fabricating Such A Laser Device App 20180278021 - Ferrotti; Thomas ; et al.	2018-09-27
Laser device and process for fabricating such a laser device Grant 10,014,660 - Ferrotti , et al. July 3, 2	2018-07-03
Laser device and process for fabricating such a laser device Grant 9,899,800 - Ferrotti , et al. February 20, 2	2018-02-20
Methods of Fabricating Integrated Circuit Devices With Components on Both Sides of a Semiconductor Layer and the Devices Formed Thereby App 20170371099 - Chantre; Alain ; et al.	2017-12-28
Heterojunction bipolar transistor Grant 9,704,967 - Chevalier , et al. July 11, 2	2017-07-11
Method For Making Photonic Chip With Multi-thickness Electro-optic Devices And Related Devices App 20170192170 - BAUDOT; Charles ; et al.	2017-07-06
Laser Device And Process For Fabricating Such A Laser Device App 20170141541 - FERROTTI; Thomas ; et al.	2017-05-18
Method of manufacturing a photonic integrated circuit optically coupled to a laser of III-V material Grant 9,507,089 - Chantre , et al. November 29, 2	2016-11-29
Integrated hybrid laser source compatible with a silicon technology platform, and fabrication process Grant 9,461,441 - Chantre , et al. October 4, 2	2016-10-04
Integrated Hybrid Laser Source Compatible With A Silicon Technology Platform, And Fabrication Process App 20160233641 - CHANTRE; Alain ; et al.	2016-08-11
Heterojunction bipolar transistor Grant 9,362,380 - Chevalier , et al. June 7, 2	2016-06-07
Bipolar Transistor Manufacturing Method App 20160099334 - Chantre; Alain ; et al.	2016-04-07
Laser Device And Process For Fabricating Such A Laser Device App 20160056612 - Ferrotti; Thomas ; et al.	2016-02-25
Method Of Manufacturing A Photonic Integrated Circuit Optically Coupled To A Laser Of Iii-v Material App 20160047986 - CHANTRE; Alain ; et al.	2016-02-18
Heterojunction Bipolar Transistor App 20160005836 - CHEVALIER; Pascal ; et al.	2016-01-07
Photonic Integrated Circuit And Fabrication Process App 20140376857 - Chantre; Alain ; et al.	2014-12-25
Heterojunction Bipolar Transistor App 20140167116 - Chevalier; Pascal ; et al.	2014-06-19
Bipolar Transistor Manufacturing Method App 20130270649 - Chantre; Alain ; et al.	2013-10-17
Bipolar transistor with high dynamic performances Grant 7,824,978 - Chantre , et al. November 2, 2	2010-11-02
Integrated circuit bipolar transistor Grant 7,615,455 - Chevalier , et al. November 10, 2	2009-11-10
Method of manufacturing a bipolar transistor with a single-crystal base contact Grant 7,226,844 - Chantre , et al. June 5, 2	2007-06-05
Integrated circuit bipolar transistor App 20070063314 - Chevalier; Pascal ; et al.	2007-03-22
Bipolar transistor with high dynamic performances App 20070004161 - Chantre; Alain ; et al.	2007-01-04
Bipolar transistor with high dynamic performances Grant 7,122,879 - Chantre , et al. October 17, 2	2006-10-17
Bipolar transistor with high dynamic performances App 20060054998 - Chantre; Alain ; et al.	2006-03-16
Method of manufacturing a bipolar transistor with a single-crystal base contact App 20050215021 - Chantre, Alain ; et al.	2005-09-29
Integrated circuit including, and fabrication method for producing, bipolar and MOSFET transistors Grant 6,902,970 - Marty , et al. June 7, 2	2005-06-07
Heterojunction bipolar transistor App 20050037587 - Martinet, Bertrand ; et al.	2005-02-17
Method of manufacturing a bipolar transistor of double-polysilicon, heterojunction-base type and corresponding transistor Grant 6,744,080 - Chantre , et al. June 1, 2	2004-06-01
Vertical bipolar transistor including an extrinsic base with reduced roughness, and fabrication process Grant 6,723,610 - Marty , et al. April 20, 2	2004-04-20
Vertical bipolar transistor having little low-frequency noise and high current gain, and corresponding fabrication process Grant 6,656,812 - Marty , et al. December 2, 2	2003-12-02
Bipolar transistor manufacturing Grant 6,642,096 - Dutartre , et al. November 4, 2	2003-11-04
Integrated circuit including, and fabrication method for producing, bipolar and mosfet transistors App 20030186500 - Marty, Michel ; et al.	2003-10-02
Process for fabricating a self-aligned vertical bipolar transistor App 20030155611 - Chantre, Alain ; et al.	2003-08-21
Process for fabricating a self-aligned vertical bipolar transistor Grant 6,551,891 - Chantre , et al. April 22, 2	2003-04-22
Method of manufacturing a bipolar transistor of double-polysilicon, heterojunction-base type and corresponding transistor App 20020185657 - Chantre, Alain ; et al.	2002-12-12
Method for fabricating a bipolar transistor of the self-aligned double-polysilicon type with a heterojunction base and corresponding transistor Grant 6,472,262 - Chantre , et al. October 29, 2	2002-10-29
Bipolar transistor manufacturing App 20020042178 - Dutartre, Didier ; et al.	2002-04-11
Vertical bipolar transistor including an extrinsic base with reduced roughness, and fabrication process App 20020003286 - Marty, Michel ; et al.	2002-01-10
Method for fabricating a bipolar transistor of the self-aligned double-polysilicon type with a heterojunction base and corresponding transistor App 20010053584 - Chantre, Alain ; et al.	2001-12-20
Process for fabricating a self-aligned double-polysilicon bipolar transistor App 20010051413 - Chantre, Alain ; et al.	2001-12-13
Method of selectively doping the intrinsic collector of a vertical bipolar transistor with epitaxial base Grant 6,265,275 - Marty , et al. July 24, 2	2001-07-24
Vertical JFET transistor with optimized bipolar operating mode and corresponding method of fabrication Grant 5,367,184 - Chantre November 22, 1	1994-11-22
Method of manufacturing a vertical field effect transistor Grant 5,340,757 - Chantre , et al. August 23, 1	1994-08-23

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