Chang; Ting

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chang; Ting.The latest application filed is for "self-aligned front-end charge trap flash memory cell and capacitor design for integrated high-density scaled devices".

Company Profile

4.9.21

Chang; Ting - Portland OR
Chang; Ting - Hillsboro OR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Gate-all-around integrated circuit structures having dual nanoribbon channel structures Grant 11,437,483 - Trivedi , et al. September 6, 2	2022-09-06
Self-aligned Front-end Charge Trap Flash Memory Cell And Capacitor Design For Integrated High-density Scaled Devices App 20210399002 - TRIVEDI; Tanuj ; et al.	2021-12-23
Gate-all-around Integrated Circuit Structures Having Dual Nanoribbon Channel Structures App 20210280683 - TRIVEDI; Tanuj ; et al.	2021-09-09
Gate-all-around Integrated Circuit Structures Having Depopulated Channel Structures App 20210257453 - TRIVEDI; Tanuj ; et al.	2021-08-19
Gate-all-around Integrated Circuit Structures Having Depopulated Channel Structures App 20210257452 - TRIVEDI; Tanuj ; et al.	2021-08-19
Gate-all-around integrated circuit structures having depopulated channel structures Grant 11,094,782 - Trivedi , et al. August 17, 2	2021-08-17
Strain Based Performance Enhancement Using Selective Metal Oxidation Inside Gate App 20210193844 - RAMASWAMY; Rahul ; et al.	2021-06-24
High Voltage Extended-drain Mos (edmos) Nanowire Transistors App 20210184032 - NIDHI; Nidhi ; et al.	2021-06-17
High Voltage Ultra-low Power Thick Gate Nanoribbon Transistors For Soc Applications App 20210184045 - RAMASWAMY; Rahul ; et al.	2021-06-17
Co-integrated High Performance Nanoribbon Transistors With High Voltage Thick Gate Finfet Devices App 20210184051 - TRIVEDI; Tanuj ; et al.	2021-06-17
Esd Diode Solution For Nanoribbon Architectures App 20210183850 - NIDHI; Nidhi ; et al.	2021-06-17
Nanoribbon Thick Gate Device With Hybrid Dielectric Tuning For High Breakdown And Vt Modulation App 20210183857 - HAFEZ; Walid M. ; et al.	2021-06-17
Nanoribbon Thick Gate Devices With Differential Ribbon Spacing And Width For Soc Applications App 20210184001 - TRIVEDI; Tanuj ; et al.	2021-06-17
Single Gated 3d Nanowire Inverter For High Density Thick Gate Soc Applications App 20210184000 - RAMASWAMY; Rahul ; et al.	2021-06-17
Antifuse element using spacer breakdown Grant 10,847,456 - Chang , et al. November 24, 2	2020-11-24
MOS antifuse with void-accelerated breakdown Grant 10,763,209 - Olac-Vaw , et al. Sep	2020-09-01
Monolithic integration of high voltage transistors and low voltage non-planar transistors Grant 10,312,367 - Phoa , et al.	2019-06-04
Non-linear Fin-based Devices App 20190097057 - Dias; Neville L. ; et al.	2019-03-28
Transistor gate metal with laterally graduated work function Grant 10,192,969 - Jan , et al. Ja	2019-01-29
Non-linear fin-based devices Grant 10,164,115 - Dias , et al. Dec	2018-12-25
Antifuse Element Using Spacer Breakdown App 20180218977 - CHANG; TING ; et al.	2018-08-02
Antifuse element using spacer breakdown Grant 9,929,090 - Chang , et al. March 27, 2	2018-03-27
Memory cell having isolated charge sites and method of fabricating same Grant 9,799,668 - Chang , et al. October 24, 2	2017-10-24
Transistor Gate Metal With Laterally Graduated Work Function App 20170207312 - Jan; Chia-Hong ; et al.	2017-07-20
Mos Antifuse With Void-accelerated Breakdown App 20170162503 - OLAC-VAW; Roman ; et al.	2017-06-08
Non-linear Fin-based Devices App 20170098709 - DIAS; NEVILLE L. ; et al.	2017-04-06
Monolithic Integration Of High Voltage Transistors & Low Voltage Non-planar Transistors App 20170025533 - Phoa; Kinyip ; et al.	2017-01-26
Antifuse Element Using Spacer Breakdown App 20160351498 - CHANG; TING ; et al.	2016-12-01
Memory Cell Having Isolated Charge Sites And Method Of Fabricating Same App 20160049418 - CHANG; TING ; et al.	2016-02-18

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