| Patent | Date |
|---|
Three-dimensional Memory Cell Structure
App 20220302121 - GUTWIN; Paul ; et al. | 2022-09-22 |
Semiconductor apparatus having stacked devices and method of manufacture thereof
Grant 11,450,671 - Liebmann , et al. September 20, 2 | 2022-09-20 |
Compact 3D stacked-CFET architecture for complex logic cells
Grant 11,437,376 - Liebmann , et al. September 6, 2 | 2022-09-06 |
High Density Logic Formation Using Multi-dimensional Laser Annealing
App 20220277957 - Fulford; H. Jim ; et al. | 2022-09-01 |
Inverted Top-tier Fet For Multi-tier Gate-on-gate 3-dimension Integration (3di)
App 20220271033 - CHANEMOUGAME; Daniel ; et al. | 2022-08-25 |
Integrated High Efficiency Transistor Cooling
App 20220223496 - CHANEMOUGAME; Daniel ; et al. | 2022-07-14 |
Integrated High Efficiency Gate On Gate Cooling
App 20220223497 - CHANEMOUGAME; Daniel ; et al. | 2022-07-14 |
Interdigitated Device Stack
App 20220181318 - LIEBMANN; Lars ; et al. | 2022-06-09 |
Three-dimensional Semiconductor Device
App 20220181441 - Liebmann; Lars ; et al. | 2022-06-09 |
Multi-tier Backside Power Delivery Network For Dense Gate-on-gate 3d Logic
App 20220181300 - LIEBMANN; Lars ; et al. | 2022-06-09 |
Power-tap Pass-through To Connect A Buried Power Rail To Front-side Power Distribution Network
App 20220181258 - LIEBMANN; Lars ; et al. | 2022-06-09 |
Inter-tier Power Delivery Network (pdn) For Dense Gate-on-gate 3d Logic Integration
App 20220181263 - LIEBMANN; Lars ; et al. | 2022-06-09 |
Inter-level Handshake For Dense 3d Logic Integration
App 20220181453 - LIEBMANN; Lars ; et al. | 2022-06-09 |
Double Cross-couple For Two-row Flip-flop Using Cfet
App 20220181322 - LIEBMANN; Lars ; et al. | 2022-06-09 |
3D directed self-assembly for nanostructures
Grant 11,342,427 - deVilliers , et al. May 24, 2 | 2022-05-24 |
Method For Threshold Voltage Tuning Through Selective Deposition Of High-k Metal Gate (hkmg) Film Stacks
App 20220148924 - SMITH; Jeffrey ; et al. | 2022-05-12 |
Reverse contact and silicide process for three-dimensional semiconductor devices
Grant 11,322,401 - Smith , et al. May 3, 2 | 2022-05-03 |
Method Of 3d Logic Fabrication To Sequentially Decrease Processing Temperature And Maintain Material Thermal Thresholds
App 20220122892 - SMITH; Jeffrey ; et al. | 2022-04-21 |
Metallization Lines On Integrated Circuit Products
App 20220108950 - Xie; Ruilong ; et al. | 2022-04-07 |
Connections From Buried Interconnects To Device Terminals In Multiple Stacked Devices Structures
App 20220102380 - CHANEMOUGAME; Daniel ; et al. | 2022-03-31 |
Monolithic Formation Of A Set Of Interconnects Below Active Devices
App 20220102277 - CHANEMOUGAME; Daniel ; et al. | 2022-03-31 |
Cfet Sram Bit Cell With Two Stacked Device Decks
App 20220102362 - CHANEMOUGAME; Daniel ; et al. | 2022-03-31 |
Power Wall Integration For Multiple Stacked Devices
App 20220068921 - Chanemougame; Daniel ; et al. | 2022-03-03 |
Reverse contact and silicide process for three-dimensional logic devices
Grant 11,264,274 - Smith , et al. March 1, 2 | 2022-03-01 |
Method for threshold voltage tuning through selective deposition of high-K metal gate (HKMG) film stacks
Grant 11,264,289 - Smith , et al. March 1, 2 | 2022-03-01 |
Formation Of Low-temperature And High-temperature In-situ Doped Source And Drain Epitaxy Using Selective Heating For Wrap-around Contact And Vertically Stacked Device Architectures
App 20220051905 - SMITH; Jeffrey ; et al. | 2022-02-17 |
Metallization lines on integrated circuit products
Grant 11,233,006 - Xie , et al. January 25, 2 | 2022-01-25 |
Method, apparatus, and system for fin-over-nanosheet complementary field-effect-transistor
Grant 11,201,152 - Xie , et al. December 14, 2 | 2021-12-14 |
Method for fabrication of high density logic and memory for advanced circuit architecture
Grant 11,177,250 - Gardner , et al. November 16, 2 | 2021-11-16 |
High density logic formation using multi-dimensional laser annealing
Grant 11,114,346 - Fulford , et al. September 7, 2 | 2021-09-07 |
Multi-dimensional planes of logic and memory formation using single crystal silicon orientations
Grant 11,107,733 - Gardner , et al. August 31, 2 | 2021-08-31 |
Nanosheet field effect transistor with spacers between sheets
Grant 11,101,348 - Xie , et al. August 24, 2 | 2021-08-24 |
Steep-switch vertical field effect transistor
Grant 11,069,744 - Chanemougame , et al. July 20, 2 | 2021-07-20 |
Cfet Sram Bit Cell With Three Stacked Device Decks
App 20210202500 - CHANEMOUGAME; Daniel ; et al. | 2021-07-01 |
3d Complementary Metal Oxide Semiconductor (cmos) Device And Method Of Forming The Same
App 20210202481 - FULFORD; H. Jim ; et al. | 2021-07-01 |
Middle of the line self-aligned direct pattern contacts
Grant 11,043,418 - Stephens , et al. June 22, 2 | 2021-06-22 |
Steep-switch field effect transistor with integrated bi-stable resistive system
Grant 10,991,808 - Frougier , et al. April 27, 2 | 2021-04-27 |
Power Delivery Network For Cfet With Buried Power Rails
App 20210118798 - LIEBMANN; Lars ; et al. | 2021-04-22 |
Steep-switch Field Effect Transistor With Integrated Bi-stable Resistive System
App 20210111225 - Frougier; Julien ; et al. | 2021-04-15 |
3D Directed Self-Assembly for Nanostructures
App 20210104609 - deVilliers; Anton ; et al. | 2021-04-08 |
Reverse Contact And Silicide Process For Three-dimensional Semiconductor Devices
App 20210098294 - SMITH; Jeffrey ; et al. | 2021-04-01 |
Reverse Contact And Silicide Process For Three-dimensional Logic Devices
App 20210098306 - Smith; Jeffrey ; et al. | 2021-04-01 |
Steep-switch field effect transistor with integrated bi-stable resistive system
Grant 10,964,750 - Frougier , et al. March 30, 2 | 2021-03-30 |
Method For Fabrication Of High Density Logic And Memory For Advanced Circuit Architecture
App 20210082901 - GARDNER; Mark I. ; et al. | 2021-03-18 |
Asymmetric gate cut isolation for SRAM
Grant 10,950,610 - Paul , et al. March 16, 2 | 2021-03-16 |
High Density Logic Formation Using Multi-dimensional Laser Annealing
App 20210043519 - FULFORD; H. Jim ; et al. | 2021-02-11 |
Multi-dimensional Planes Of Logic And Memory Formation Using Single Crystal Silicon Orientations
App 20210043516 - GARDNER; Mark I. ; et al. | 2021-02-11 |
Apparatus And Method For Simultaneous Formation Of Diffusion Break, Gate Cut, And Independent N And P Gates For 3d Transistor Devices
App 20210043522 - CHANEMOUGAME; Daniel ; et al. | 2021-02-11 |
Semiconductor Apparatus Having Stacked Devices And Method Of Manufacture Thereof
App 20210043630 - Liebmann; Lars ; et al. | 2021-02-11 |
Highly Regular Logic Design For Efficient 3d Integration
App 20210035967 - Liebmann; Lars ; et al. | 2021-02-04 |
Asymmetric Gate Cut Isolation For Sram
App 20210020644 - Paul; Bipul C. ; et al. | 2021-01-21 |
Method For Threshold Voltage Tuning Through Selective Deposition Of High-k Metal Gate (hkmg) Film Stacks
App 20210013111 - SMITH; Jeffrey ; et al. | 2021-01-14 |
Steep-switch field effect transistor with integrated bi-stable resistive system
Grant 10,872,962 - Frougier , et al. December 22, 2 | 2020-12-22 |
Compact 3d Stacked-cfet Architecture For Complex Logic Cells
App 20200381430 - Liebmann; Lars ; et al. | 2020-12-03 |
Nanosheet field-effect transistors formed with sacrificial spacers
Grant 10,818,792 - Frougier , et al. October 27, 2 | 2020-10-27 |
Vertical-transport field-effect transistors with self-aligned contacts
Grant 10,797,138 - Bourjot , et al. October 6, 2 | 2020-10-06 |
Self-aligned buried contact for vertical field-effect transistor and method of production thereof
Grant 10,770,585 - Xie , et al. Sep | 2020-09-08 |
Replacement Buried Power Rail In Backside Power Delivery
App 20200266169 - KANG; Hoyoung ; et al. | 2020-08-20 |
Gate contact structure for a transistor
Grant 10,727,308 - Xie , et al. | 2020-07-28 |
Vertical-transport field-effect transistors having gate contacts located over the active region
Grant 10,699,942 - Xie , et al. | 2020-06-30 |
Gate Contact Structures And Cross-coupled Contact Structures For Transistor Devices
App 20200203497 - Xie; Ruilong ; et al. | 2020-06-25 |
Gate-all-around field effect transistors with air-gap inner spacers and methods
Grant 10,692,991 - Chanemougame , et al. | 2020-06-23 |
Self-aligned Cuts In An Interconnect Structure
App 20200194306 - Xie; Ruilong ; et al. | 2020-06-18 |
Self-aligned cuts in an interconnect structure
Grant 10,685,874 - Xie , et al. | 2020-06-16 |
Method for forming replacement metal gate and related structures
Grant 10,658,243 - Xie , et al. | 2020-05-19 |
Methods of forming gate contact structures and cross-coupled contact structures for transistor devices
Grant 10,651,284 - Xie , et al. | 2020-05-12 |
Steep-switch Field Effect Transistor With Integrated Bi-stable Resistive System
App 20200144385 - Frougier; Julien ; et al. | 2020-05-07 |
Hybrid dual damascene structures with enlarged contacts
Grant 10,629,516 - Chanemougame , et al. | 2020-04-21 |
Self-aligned Buried Contact For Vertical Field-effect Transistor And Method Of Production Thereof
App 20200098913 - XIE; Ruilong ; et al. | 2020-03-26 |
Steep-switch Vertical Field Effect Transistor
App 20200091237 - Chanemougame; Daniel ; et al. | 2020-03-19 |
Middle Of The Line Self-aligned Direct Pattern Contacts
App 20200083102 - STEPHENS; Jason E. ; et al. | 2020-03-12 |
Gate-all-around Field Effect Transistors With Air-gap Inner Spacers And Methods
App 20200083352 - Chanemougame; Daniel ; et al. | 2020-03-12 |
Hybrid Dual Damascene Structures With Enlarged Contacts
App 20200075456 - Chanemougame; Daniel ; et al. | 2020-03-05 |
Nanosheet Field-effect Transistors Formed With Sacrificial Spacers
App 20200066894 - Frougier; Julien ; et al. | 2020-02-27 |
Work function metal patterning for N-P spaces between active nanostructures using unitary isolation pillar
Grant 10,566,248 - Chanemougame , et al. Feb | 2020-02-18 |
Steep-switch field effect transistor with integrated bi-stable resistive system
Grant 10,566,436 - Frougier , et al. Feb | 2020-02-18 |
Work Function Metal Patterning For N-p Spaces Between Active Nanostructures Using Unitary Isolation Pillar
App 20200035567 - Chanemougame; Daniel ; et al. | 2020-01-30 |
Nanosheet Field Effect Transistor With Spacers Between Sheets
App 20200035786 - Xie; Ruilong ; et al. | 2020-01-30 |
Steep-switch vertical field effect transistor
Grant 10,541,272 - Chanemougame , et al. Ja | 2020-01-21 |
Middle of the line self-aligned direct pattern contacts
Grant 10,522,403 - Stephens , et al. Dec | 2019-12-31 |
Gate Contact Structure For A Transistor Device
App 20190386107 - Xie; Ruilong ; et al. | 2019-12-19 |
Work function metal patterning for N-P space between active nanostructures
Grant 10,510,620 - Chanemougame , et al. Dec | 2019-12-17 |
Method For Forming Replacement Metal Gate And Related Structures
App 20190378761 - Xie; Ruilong ; et al. | 2019-12-12 |
Gate Contact Structure For A Transistor
App 20190378900 - Xie; Ruilong ; et al. | 2019-12-12 |
Methods of forming conductive spacers for gate contacts and the resulting device
Grant 10,504,790 - Xie , et al. Dec | 2019-12-10 |
Methods of forming a gate contact structure for a transistor
Grant 10,490,641 - Xie , et al. Nov | 2019-11-26 |
Gate contact structures and cross-coupled contact structures for transistor devices
Grant 10,490,455 - Xie , et al. Nov | 2019-11-26 |
Methods of forming a gate contact structure above an active region of a transistor
Grant 10,483,363 - Xie , et al. Nov | 2019-11-19 |
Contacting source and drain of a transistor device
Grant 10,468,300 - Xie , et al. No | 2019-11-05 |
Vertical-transport Field-effect Transistors Having Gate Contacts Located Over The Active Region
App 20190326165 - Xie; Ruilong ; et al. | 2019-10-24 |
Method, Apparatus, And System For Fin-over-nanosheet Complementary Field-effect-transistor
App 20190326286 - Xie; Ruilong ; et al. | 2019-10-24 |
Vertical-transport Field-effect Transistors With Self-aligned Contacts
App 20190312116 - Bourjot; Emilie ; et al. | 2019-10-10 |
Intergrated circuit structure including single diffusion break abutting end isolation region, and methods of forming same
Grant 10,388,652 - Shi , et al. A | 2019-08-20 |
Steep-switch Field Effect Transistor With Integrated Bi-stable Resistive System
App 20190252508 - Frougier; Julien ; et al. | 2019-08-15 |
Steep-switch Field Effect Transistor With Integrated Bi-stable Resistive System
App 20190252465 - Frougier; Julien ; et al. | 2019-08-15 |
Steep-switch Field Effect Transistor With Integrated Bi-stable Resistive System
App 20190252507 - Frougier; Julien ; et al. | 2019-08-15 |
Contact structures and methods of making the contact structures
Grant 10,381,354 - Chanemougame , et al. A | 2019-08-13 |
Method to form low resistance contact
Grant 10,374,040 - Chanemougame , et al. | 2019-08-06 |
Middle Of The Line Self-aligned Direct Pattern Contacts
App 20190214298 - STEPHENS; Jason E. ; et al. | 2019-07-11 |
Methods of forming bottom and top source/drain regions on a vertical transistor device
Grant 10,347,745 - Suvarna , et al. July 9, 2 | 2019-07-09 |
Contact Structures And Methods Of Making The Contact Structures
App 20190206878 - Chanemougame; Daniel ; et al. | 2019-07-04 |
Hybrid gate-all-around (GAA) field effect transistor (FET) structure and method of forming
Grant 10,332,803 - Xie , et al. | 2019-06-25 |
Method of forming complementary nano-sheet/wire transistor devices with same depth contacts
Grant 10,304,833 - Suvarna , et al. | 2019-05-28 |
Integrated circuit structure incorporating stacked field effect transistors and method
Grant 10,304,832 - Chanemougame , et al. | 2019-05-28 |
Integrated Circuit Structure Incorporating Stacked Field Effect Transistors And Method
App 20190148376 - Chanemougame; Daniel ; et al. | 2019-05-16 |
Forming Contacts For Vfets
App 20190148494 - Xie; Ruilong ; et al. | 2019-05-16 |
Integrated Circuit Structure Including Single Diffusion Break Abutting End Isolation Region, And Methods Of Forming Same
App 20190148373 - Shi; Yongiun ; et al. | 2019-05-16 |
Gate Contact Structures And Cross-coupled Contact Structures For Transistor Devices
App 20190148240 - Xie; Ruilong ; et al. | 2019-05-16 |
Integrated circuit structure, gate all-around integrated circuit structure and methods of forming same
Grant 10,290,549 - Xie , et al. | 2019-05-14 |
Methods of forming conductive contact structures to semiconductor devices and the resulting structures
Grant 10,290,544 - Xie , et al. | 2019-05-14 |
Methods Of Forming Gate Contact Structures And Cross-coupled Contact Structures For Transistor Devices
App 20190123162 - Xie; Ruilong ; et al. | 2019-04-25 |
Forming contacts for VFETs
Grant 10,269,812 - Xie , et al. | 2019-04-23 |
Methods Of Forming Conductive Contact Structures To Semiconductor Devices And The Resulting Structures
App 20190109045 - Xie; Ruilong ; et al. | 2019-04-11 |
Steep-switch Vertical Field Effect Transistor
App 20190109177 - Chanemougame; Daniel ; et al. | 2019-04-11 |
Steep-switch field effect transistor with integrated bi-stable resistive system
Grant 10,256,316 - Frougier , et al. | 2019-04-09 |
Air-gap gate sidewall spacer and method
Grant 10,249,728 - Chanemougame , et al. | 2019-04-02 |
Forming TS cut for zero or negative TS extension and resulting device
Grant 10,249,535 - Xie , et al. | 2019-04-02 |
Cross-coupled contact structure on IC products and methods of making such contact structures
Grant 10,236,296 - Chanemougame , et al. | 2019-03-19 |
Methods of forming gate contact structures and cross-coupled contact structures for transistor devices
Grant 10,236,215 - Xie , et al. | 2019-03-19 |
Vertical-transport transistors with self-aligned contacts
Grant 10,230,000 - Bourjot , et al. | 2019-03-12 |
Integrated Circuit Structure, Gate All-around Integrated Circuit Structure And Methods Of Forming Same
App 20190074224 - Xie; Ruilong ; et al. | 2019-03-07 |
Vertical-transport Transistors With Self-aligned Contacts
App 20190051757 - Bourjot; Emilie ; et al. | 2019-02-14 |
Methods Of Forming Conductive Spacers For Gate Contacts And The Resulting Device
App 20190035692 - Xie; Ruilong ; et al. | 2019-01-31 |
Integrated circuit structure incorporating stacked field effect transistors
Grant 10,192,819 - Chanemougame , et al. Ja | 2019-01-29 |
Metallization Lines On Integrated Circuit Products
App 20190006232 - Xie; Ruilong ; et al. | 2019-01-03 |
Negative-capacitance steep-switch field effect transistor with integrated bi-stable resistive system
Grant 10,170,520 - Frougier , et al. J | 2019-01-01 |
Formation of bottom junction in vertical FET devices
Grant 10,141,446 - Niimi , et al. Nov | 2018-11-27 |
Methods Of Forming A Gate Contact Structure For A Transistor
App 20180315821 - Xie; Ruilong ; et al. | 2018-11-01 |
Methods Of Forming A Gate Contact Structure Above An Active Region Of A Transistor
App 20180315822 - Xie; Ruilong ; et al. | 2018-11-01 |
Integrated circuit structure incorporating a stacked pair of field effect transistors and a buried interconnect and method
Grant 10,090,193 - Chanemougame , et al. October 2, 2 | 2018-10-02 |
Methods of forming metallization lines on integrated circuit products and the resulting products
Grant 10,079,173 - Xie , et al. September 18, 2 | 2018-09-18 |
Self-aligned middle of the line (MOL) contacts
Grant 10,074,564 - Chanemougame , et al. September 11, 2 | 2018-09-11 |
Air-gap Gate Sidewall Spacer And Method
App 20180240883 - CHANEMOUGAME; DANIEL ; et al. | 2018-08-23 |
Forming Ts Cut For Zero Or Negative Ts Extension And Resulting Device
App 20180233412 - XIE; Ruilong ; et al. | 2018-08-16 |
Air-gap Gate Sidewall Spacer And Method
App 20180204927 - CHANEMOUGAME; DANIEL ; et al. | 2018-07-19 |
Air-gap gate sidewall spacer and method
Grant 10,026,824 - Chanemougame , et al. July 17, 2 | 2018-07-17 |
Self-aligned Middle Of The Line (mol) Contacts
App 20180166335 - Chanemougame; Daniel ; et al. | 2018-06-14 |
Self-aligned middle of the line (MOL) contacts
Grant 9,941,162 - Chanemougame , et al. April 10, 2 | 2018-04-10 |
Methods Of Forming Metallization Lines On Integrated Circuit Products And The Resulting Products
App 20180096932 - Xie; Ruilong ; et al. | 2018-04-05 |
Methods Of Forming Bottom And Top Source/drain Regions On A Vertical Transistor Device
App 20180083121 - Suvarna; Puneet Harischandra ; et al. | 2018-03-22 |
Formation Of Bottom Junction In Vertical Fet Devices
App 20180061993 - NIIMI; Hiroaki ; et al. | 2018-03-01 |
Formation Of Bottom Junction In Vertical Fet Devices
App 20170358687 - NIIMI; Hiroaki ; et al. | 2017-12-14 |
Formation of bottom junction in vertical FET devices
Grant 9,842,933 - Niimi , et al. December 12, 2 | 2017-12-12 |
Semiconductor device with different fin sets
Grant 9,620,505 - Liu , et al. April 11, 2 | 2017-04-11 |
Semiconductor Device With Different Fin Sets
App 20160197072 - Liu; Qing ; et al. | 2016-07-07 |
Method for making semiconductor device with different fin sets
Grant 9,299,721 - Liu , et al. March 29, 2 | 2016-03-29 |
Method For Making Semiconductor Device With Different Fin Sets
App 20150333086 - LIU; Qing ; et al. | 2015-11-19 |
Strained Channel PMOS Transistor and Corresponding Production Method
App 20090206394 - Chanemougame; Daniel | 2009-08-20 |
Process for producing a field-effect transistor and transistor thus obtained
Grant 7,229,867 - Skotnicki , et al. June 12, 2 | 2007-06-12 |
Process for producing a field-effect transistor and transistor thus obtained
App 20050214993 - Skotnicki, Thomas ; et al. | 2005-09-29 |
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