Chambers; James J.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Chambers; James J..The latest application filed is for "method of setting a work function of a fully silicided semiconductor device, and related device".

Company Profile

0.36.43

Chambers; James J. - Austin TX US
Chambers; James J. - Dallas TX
Chambers; James J - Dallas TX
Chambers; James J. - Plano TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Semiconductor device fabricated using a metal microstructure control process Grant 8,575,014 - Colombo , et al. November 5, 2	2013-11-05
Triple-gate transistor with reverse shallow trench isolation Grant 8,389,391 - Chambers , et al. March 5, 2	2013-03-05
Method of Setting a Work Function of a Fully Silicided Semiconductor Device, and Related Device App 20120231590 - Colombo; Luigi ; et al.	2012-09-13
Semiconductor Device Fabricated Using A Metal Microstructure Control Process App 20120164820 - Colombo; Luigi ; et al.	2012-06-28
Semiconductor device fabricated using a metal microstructure control process Grant 8,124,529 - Colombo , et al. February 28, 2	2012-02-28
Method for integration of replacement gate in CMOS flow Grant 8,062,966 - Mehrad , et al. November 22, 2	2011-11-22
Cross-contamination control for processing of circuits comprising MOS devices that include metal comprising high-K dielectrics Grant 7,968,443 - Kirkpatrick , et al. June 28, 2	2011-06-28
Method of Setting a Work Function of a Fully Silicided Semiconductor Device, and Related Device App 20110111586 - Colombo; Luigi ; et al.	2011-05-12
Formation of uniform silicate gate dielectrics Grant 7,799,668 - Niimi , et al. September 21, 2	2010-09-21
Method of Setting a Work Function of a Fully Silicided Semiconductor Device, and Related Device App 20100187613 - Colombo; Luigi ; et al.	2010-07-29
Method For Integration Of Replacement Gate In Cmos Flow App 20100164008 - Mehrad; Freidoon ; et al.	2010-07-01
Two Step Method To Create A Gate Electrode Using A Physical Vapor Deposited Layer And A Chemical Vapor Deposited Layer App 20100155860 - Colombo; Luigi ; et al.	2010-06-24
Low temperature polysilicon oxide process for high-K dielectric/metal gate stack Grant 7,723,173 - Varghese , et al. May 25, 2	2010-05-25
Methods and systems to mitigate etch stop clipping for shallow trench isolation fabrication Grant 7,625,807 - Quevedo-Lopez , et al. December 1, 2	2009-12-01
Defect control in gate dielectrics Grant 7,601,578 - Colombo , et al. October 13, 2	2009-10-13
Reliable high voltage gate dielectric layers using a dual nitridation process Grant 7,560,792 - Khamankar , et al. July 14, 2	2009-07-14
Low Temperature Polysilicon Oxide Process For High-k Dielectric/metal Gate Stack App 20090170346 - Varghese; Ajith ; et al.	2009-07-02
Dual work function metal gate integration in semiconductor devices Grant 7,528,024 - Colombo , et al. May 5, 2	2009-05-05
Method Of Setting A Work Function Of A Fully Silicided Semiconductor Device, And Related Device App 20090053883 - COLOMBO; Luigi ; et al.	2009-02-26
Low Temperature Poly Oxide Processes For High-k/metal Gate Flow App 20080246099 - Varghese; Ajith ; et al.	2008-10-09
Refractory metal-based electrodes for work function setting in semiconductor devices Grant 7,387,956 - Colombo , et al. June 17, 2	2008-06-17
Method for controlling defects in gate dielectrics Grant 7,351,626 - Colombo , et al. April 1, 2	2008-04-01
Defect Control in Gate Dielectrics App 20080057739 - Colombo; Luigi ; et al.	2008-03-06
Refractory metal-based electrodes for work function setting in semiconductor devices Grant 7,321,154 - Colombo , et al. January 22, 2	2008-01-22
Semiconductor Device Fabricated Using A Metal Microstructure Control Process App 20070278584 - Colombo; Luigi ; et al.	2007-12-06
Methods and systems to mitigate etch stop clipping for shallow trench isolation fabrication App 20070134886 - Quevedo-Lopez; Manuel ; et al.	2007-06-14
Process for manufacturing dual work function metal gates in a microelectronics device Grant 7,229,873 - Colombo , et al. June 12, 2	2007-06-12
Reliable high voltage gate dielectric layers using a dual nitridation process App 20070117331 - Khamankar; Rajesh ; et al.	2007-05-24
Methods and systems to mitigate etch stop clipping for shallow trench isolation fabrication Grant 7,199,021 - Quevedo-Lopez , et al. April 3, 2	2007-04-03
Method for fabricating transistor gate structures and gate dielectrics thereof App 20070072364 - Visokay; Mark R. ; et al.	2007-03-29
Method for fabricating transistor gate structures and gate dielectrics thereof App 20070072363 - Visokay; Mark R. ; et al.	2007-03-29
Reliable high voltage gate dielectric layers using a dual nitridation process Grant 7,183,165 - Khamankar , et al. February 27, 2	2007-02-27
Formation of uniform silicate gate dielectrics App 20070042555 - Niimi; Hiroaki ; et al.	2007-02-22
Process for manufacturing dual work function metal gates in a microelectronics device App 20070037343 - Colombo; Luigi ; et al.	2007-02-15
Refractory Metal-based Electrodes For Work Function Setting In Semiconductor Devices App 20060273414 - Colombo; Luigi ; et al.	2006-12-07
Refractory Metal-based Electrodes For Work Function Setting In Semiconductor Devices App 20060267119 - Colombo; Luigi ; et al.	2006-11-30
Method for fabricating transistor gate structures and gate dielectrics thereof Grant 7,135,361 - Visokay , et al. November 14, 2	2006-11-14
Versatile system for triple-gated transistors with engineered corners Grant 7,119,386 - Visokay , et al. October 10, 2	2006-10-10
Top surface roughness reduction of high-k dielectric materials using plasma based processes Grant 7,115,530 - Quevedo-Lopez , et al. October 3, 2	2006-10-03
Refractory metal-based electrodes for work function setting in semiconductor devices Grant 7,098,516 - Colombo , et al. August 29, 2	2006-08-29
Hydrogen free integration of high-k gate dielectrics Grant 7,067,434 - Colombo , et al. June 27, 2	2006-06-27
Top surface roughness reduction of high-k dielectric materials using plasma based processes App 20060121744 - Quevedo-Lopez; Manuel A. ; et al.	2006-06-08
Use of indium to define work function of p-type doped polysilicon Grant 7,026,218 - Rotondaro , et al. April 11, 2	2006-04-11
High-K gate dielectric defect gettering using dopants Grant 7,015,088 - Colombo , et al. March 21, 2	2006-03-21
Versatile system for triple-gated transistors with engineered corners App 20060043524 - Visokay; Mark R. ; et al.	2006-03-02
Structure and method to fabricate self-aligned transistors with dual work function metal gate electrodes Grant 7,005,365 - Chambers February 28, 2	2006-02-28
Method for fabricating split gate transistor device having high-k dielectrics Grant 6,979,623 - Rotondaro , et al. December 27, 2	2005-12-27
Methods and systems to mitigate etch stop clipping for shallow trench isolation fabrication App 20050282351 - Quevedo-Lopez, Manuel ; et al.	2005-12-22
Versatile system for triple-gated transistors with engineered corners Grant 6,969,644 - Visokay , et al. November 29, 2	2005-11-29
Refractory metal-based electrodes for work function setting in semiconductor devices App 20050258500 - Colombo, Luigi ; et al.	2005-11-24
Dual work function metal gate integration in semiconductor devices App 20050258468 - Colombo, Luigi ; et al.	2005-11-24
Metal gate MOS transistors and methods for making the same Grant 6,936,508 - Visokay , et al. August 30, 2	2005-08-30
Defect control in gate dielectrics App 20050136690 - Colombo, Luigi ; et al.	2005-06-23
Hydrogen Free Integration Of High-k Gate Dielectrics App 20050136679 - Colombo, Luigi ; et al.	2005-06-23
Hydrogen free formation of gate electrodes App 20050136580 - Colombo, Luigi ; et al.	2005-06-23
Implementation of split gate transistor technology with high-k gate dielectrics App 20050136632 - Rotondaro, Antonio L.P. ; et al.	2005-06-23
Method for fabricating transistor gate structures and gate dielectrics thereof App 20050130442 - Visokay, Mark R. ; et al.	2005-06-16
Anneal of high-k dielectric using NH3 and an oxidizer App 20050124121 - Rotondaro, Antonio L.P. ; et al.	2005-06-09
Top surface roughness reduction of high-k dielectric materials using plasma based processes App 20050124109 - Quevedo-Lopez, Manuel A. ; et al.	2005-06-09
Metal gate MOS transistors and methods for making the same App 20050059198 - Visokay, Mark ; et al.	2005-03-17
Structure and method to fabricate self-aligned transistors with dual work function metal gate electrodes App 20050045923 - Chambers, James J.	2005-03-03
High temperature interface layer growth for high-k gate dielectric Grant 6,852,645 - Colombo , et al. February 8, 2	2005-02-08
High temperature interface layer growth for high-k gate dielectric App 20040238904 - Colombo, Luigi ; et al.	2004-12-02
Use of indium to define work function of p-type doped polysilicon App 20040222443 - Rotondaro, Antonio Luis Pacheco ; et al.	2004-11-11
High-k gate dielectric with uniform nitrogen profile and methods for making the same Grant 6,809,370 - Colombo , et al. October 26, 2	2004-10-26
Use of indium to define work function of p-type doped polysilicon Grant 6,803,611 - Rotondaro , et al. October 12, 2	2004-10-12
Method for annealing ultra-thin, high quality gate oxide layers using oxidizer/hydrogen mixtures Grant 6,780,719 - Niimi , et al. August 24, 2	2004-08-24
High temperature interface layer growth for high-k gate dielectric App 20040161883 - Colombo, Luigi ; et al.	2004-08-19
Use of indium to define work function of p-type doped polysilicon of polysilicon germanium App 20040129988 - Rotondaro, Antonio Luis Pacheco ; et al.	2004-07-08
High-K gate dielectric defect gettering using dopants App 20040127000 - Colombo, Luigi ; et al.	2004-07-01
Reliable high voltage gate dielectric layers using a dual nitridation process App 20040102010 - Khamankar, Rajesh ; et al.	2004-05-27
System for creating ultra-shallow dopant profiles App 20030124783 - Rotondaro, Antonio L. P. ; et al.	2003-07-03
High dielectric constant metal silicates formed by controlled metal-surface reactions Grant 6,521,911 - Parsons , et al. February 18, 2	2003-02-18
Temperature spike for uniform nitridization of ultra-thin silicon dioxide layers in transistor gates Grant 6,503,846 - Niimi , et al. January 7, 2	2003-01-07
Temperature Spike For Uniform Nitridization Of Ultra-thin Silicon Dioxide Layers In Transistor Gates App 20020197882 - Niimi, Hiroaki ; et al.	2002-12-26
Method for annealing ultra-thin, high quality gate oxide layers using oxidizer/hydrogen mixtures App 20020197886 - Niimi, Hiroaki ; et al.	2002-12-26
High dielectric constant metal silicates formed by controlled metal-surface reactions App 20020043666 - Parsons, Gregory N. ; et al.	2002-04-18

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