| Patent | Date |
|---|
Microprocessor That Fuses Load And Compare Instructions
App 20220035634 - Lloyd; Bryan ; et al. | 2022-02-03 |
Fusion Of Microprocessor Store Instructions
App 20220019436 - Lloyd; Bryan ; et al. | 2022-01-20 |
Parallel Slice Processor Having A Recirculating Load-store Queue For Fast Deallocation Of Issue Queue Entries
App 20210406023 - Ayub; Salma ; et al. | 2021-12-30 |
Fusion to enhance early address generation of load instructions in a microprocessor
Grant 11,163,571 - Barrick , et al. November 2, 2 | 2021-11-02 |
Energy efficient source operand issue
Grant 11,150,909 - Brownscheidle , et al. October 19, 2 | 2021-10-19 |
Parallel slice processor having a recirculating load-store queue for fast deallocation of issue queue entries
Grant 11,150,907 - Ayub , et al. October 19, 2 | 2021-10-19 |
Operation of a multi-slice processor implementing a hardware level transfer of an execution thread
Grant 11,138,050 - Barrick , et al. October 5, 2 | 2021-10-05 |
Program instruction scheduling
Grant 10,983,797 - Zoellin , et al. April 20, 2 | 2021-04-20 |
Fast multi-width instruction issue in parallel slice processor
Grant 10,942,745 - Ayub , et al. March 9, 2 | 2021-03-09 |
Issue queue snooping for asynchronous flush and restore of distributed history buffer
Grant 10,909,034 - Terry , et al. February 2, 2 | 2021-02-02 |
Handling unaligned load operations in a multi-slice computer processor
Grant 10,884,742 - Chadha , et al. January 5, 2 | 2021-01-05 |
Program Instruction Scheduling
App 20200379766 - Zoellin; Christian ; et al. | 2020-12-03 |
Handling unaligned load operations in a multi-slice computer processor
Grant 10,831,481 - Chadha , et al. November 10, 2 | 2020-11-10 |
Merging status and control data in a reservation station
Grant 10,719,056 - Barrick , et al. | 2020-07-21 |
Low-overhead, low-latency operand dependency tracking for instructions operating on register pairs in a processor core
Grant 10,671,398 - Boersma , et al. | 2020-06-02 |
Low-overhead, low-latency operand dependency tracking for instructions operating on register pairs in a processor core
Grant 10,671,399 - Boersma , et al. | 2020-06-02 |
Variable latency pipe for interleaving instruction tags in a microprocessor
Grant 10,649,779 - Ayub , et al. | 2020-05-12 |
Variable latency pipe for interleaving instruction tags in a microprocessor
Grant 10,613,868 - Ayub , et al. | 2020-04-07 |
Handling Unaligned Load Operations In A Multi-slice Computer Processor
App 20190384602 - CHADHA; SUNDEEP ; et al. | 2019-12-19 |
Handling unaligned load operations in a multi-slice computer processor
Grant 10,496,406 - Chadha , et al. De | 2019-12-03 |
On-demand GPR ECC error detection and scrubbing for a multi-slice microprocessor
Grant 10,489,253 - Battle , et al. Nov | 2019-11-26 |
Broadcasting messages between execution slices for issued instructions indicating when execution results are ready
Grant 10,445,100 - Ayub , et al. Oc | 2019-10-15 |
Handling Unaligned Load Operations In A Multi-slice Computer Processor
App 20190286446 - CHADHA; SUNDEEP ; et al. | 2019-09-19 |
Handling unaligned load operations in a multi-slice computer processor
Grant 10,409,598 - Chadha , et al. Sept | 2019-09-10 |
Asynchronous flush and restore of distributed history buffer
Grant 10,379,867 - Terry , et al. A | 2019-08-13 |
Operation Of A Multi-slice Processor Implementing A Hardware Level Transfer Of An Execution Thread
App 20190213055 - BARRICK; BRIAN D. ; et al. | 2019-07-11 |
Issue Queue Snooping For Asynchronous Flush And Restore Of Distributed History Buffer
App 20190188133 - TERRY; David R. ; et al. | 2019-06-20 |
Asynchronous Flush And Restore Of Distributed History Buffer
App 20190187995 - TERRY; David R. ; et al. | 2019-06-20 |
Operation of a multi-slice processor implementing a hardware level transfer of an execution thread
Grant 10,318,356 - Barrick , et al. | 2019-06-11 |
Flush avoidance in a load store unit
Grant 10,318,419 - Chadha , et al. | 2019-06-11 |
Multi-slice processor issue of a dependent instruction in an issue queue based on issue of a producer instruction
Grant 10,282,207 - Barrick , et al. | 2019-05-07 |
Multi-slice processor issue of a dependent instruction in an issue queue based on issue of a producer instruction
Grant 10,268,482 - Barrick , et al. | 2019-04-23 |
Operation of a multi-slice processor implementing a load/store unit maintaining rejected instructions
Grant 10,268,518 - Chadha , et al. | 2019-04-23 |
Operation of a multi-slice processor implementing a load/store unit maintaining rejected instructions
Grant 10,255,107 - Chadha , et al. | 2019-04-09 |
Operation of a multi-slice processor with reduced flush and restore latency
Grant 10,248,421 - Ayub , et al. | 2019-04-02 |
Operation of a multi-slice processor with reduced flush and restore latency
Grant 10,241,790 - Ayub , et al. | 2019-03-26 |
ECC scrubbing method in a multi-slice microprocessor
Grant 10,223,196 - Barrick , et al. | 2019-03-05 |
Linkable issue queue parallel execution slice processing method
Grant 10,223,125 - Brownscheidle , et al. | 2019-03-05 |
Processor core including pre-issue load-hit-store (LHS) hazard prediction to reduce rejection of load instructions
Grant 10,209,995 - Chadha , et al. Feb | 2019-02-19 |
Low-overhead, Low-latency Operand Dependency Tracking For Instructions Operating On Register Pairs In A Processor Core
App 20190042267 - Boersma; Maarten J. ; et al. | 2019-02-07 |
Low-overhead, Low-latency Operand Dependency Tracking For Instructions Operating On Register Pairs In A Processor Core
App 20190042268 - Boersma; Maarten J. ; et al. | 2019-02-07 |
Fast Multi-width Instruction Issue In Parallel Slice Processor
App 20190026113 - Ayub; Salma ; et al. | 2019-01-24 |
Mechanism for using a reservation station as a scratch register
Grant 10,175,985 - Chadha , et al. J | 2019-01-08 |
Operation of a multi-slice processor with selective producer instruction types
Grant 10,140,127 - Barrick , et al. Nov | 2018-11-27 |
Linkable Issue Queue Parallel Execution Slice Processing Method
App 20180336038 - Brownscheidle; Jeffrey Carl ; et al. | 2018-11-22 |
On-demand Gpr Ecc Error Detection And Scrubbing For A Multi-slice Microprocessor
App 20180336108 - BATTLE; Steven J. ; et al. | 2018-11-22 |
Parallel Slice Processor Having A Recirculating Load-store Queue For Fast Deallocation Of Issue Queue Entries
App 20180336036 - Ayub; Salma ; et al. | 2018-11-22 |
Linkable issue queue parallel execution slice for a processor
Grant 10,133,581 - Brownscheidle , et al. November 20, 2 | 2018-11-20 |
Parallel slice processor having a recirculating load-store queue for fast deallocation of issue queue entries
Grant 10,133,576 - Ayub , et al. November 20, 2 | 2018-11-20 |
Operation of a multi-slice processor with selective producer instruction types
Grant 10,127,047 - Barrick , et al. November 13, 2 | 2018-11-13 |
Fast multi-width instruction issue in parallel slice processor
Grant 10,120,693 - Ayub , et al. November 6, 2 | 2018-11-06 |
Handling Unaligned Load Operations In A Multi-slice Computer Processor
App 20180300135 - CHADHA; SUNDEEP ; et al. | 2018-10-18 |
Handling Unaligned Load Operations In A Multi-slice Computer Processor
App 20180300136 - CHADHA; SUNDEEP ; et al. | 2018-10-18 |
Operation Of A Multi-slice Processor Implementing A Load/store Unit Maintaining Rejected Instructions
App 20180285161 - CHADHA; SUNDEEP ; et al. | 2018-10-04 |
Operation Of A Multi-slice Processor Implementing A Load/store Unit Maintaining Rejected Instructions
App 20180276132 - CHADHA; SUNDEEP ; et al. | 2018-09-27 |
Techniques to wake-up dependent instructions for back-to-back issue in a microprocessor
Grant 10,078,516 - Brownscheidle , et al. September 18, 2 | 2018-09-18 |
Handling unaligned load operations in a multi-slice computer processor
Grant 10,073,697 - Chadha , et al. September 11, 2 | 2018-09-11 |
Handling unaligned load operations in a multi-slice computer processor
Grant 10,067,763 - Chadha , et al. September 4, 2 | 2018-09-04 |
Operation Of A Multi-slice Processor With Selective Producer Instruction Types
App 20180232236 - BARRICK; BRIAN D. ; et al. | 2018-08-16 |
Operation Of A Multi-slice Processor With Selective Producer Instruction Types
App 20180232230 - Barrick; Brian D. ; et al. | 2018-08-16 |
Operation of a multi-slice processor implementing a load/store unit maintaining rejected instructions
Grant 10,042,770 - Chadha , et al. August 7, 2 | 2018-08-07 |
Fast Multi-width Instruction Issue In Parallel Slice Processor
App 20180217843 - Ayub; Salma ; et al. | 2018-08-02 |
Operation of a multi-slice processor implementing a load/store unit maintaining rejected instructions
Grant 10,037,229 - Chadha , et al. July 31, 2 | 2018-07-31 |
Operation of a multi-slice processor implementing a mechanism to overcome a system hang
Grant 10,031,757 - Brownscheidle , et al. July 24, 2 | 2018-07-24 |
Fast multi-width instruction issue in parallel slice processor
Grant 9,996,359 - Ayub , et al. June 12, 2 | 2018-06-12 |
Operation of a multi-slice processor implementing dynamic switching of instruction issuance order
Grant 9,983,879 - Brownscheidle , et al. May 29, 2 | 2018-05-29 |
Operation of a multi-slice processor preventing early dependent instruction wakeup
Grant 9,983,875 - Chadha , et al. May 29, 2 | 2018-05-29 |
Techniques to wake-up dependent instructions for back-to-back issue in a microprocessor
Grant 9,971,600 - Brownscheidle , et al. May 15, 2 | 2018-05-15 |
History buffer for multiple-field registers
Grant 9,971,604 - Chadha , et al. May 15, 2 | 2018-05-15 |
Age based fast instruction issue
Grant 9,965,286 - Brownscheidle , et al. May 8, 2 | 2018-05-08 |
Speculative load data in byte-write capable register file and history buffer for a multi-slice microprocessor
Grant 9,959,123 - Bowman , et al. May 1, 2 | 2018-05-01 |
Bypassing a higher level register file in a processor having a multi-level register file and a set of bypass registers
Grant 9,959,121 - Abernathy , et al. May 1, 2 | 2018-05-01 |
Operation of a multi-slice processor with selective producer instruction types
Grant 9,952,861 - Barrick , et al. April 24, 2 | 2018-04-24 |
Operation of a multi-slice processor with selective producer instruction types
Grant 9,952,874 - Barrick , et al. April 24, 2 | 2018-04-24 |
Ecc Scrubbing Method In A Multi-slice Microprocessor
App 20180095820 - Barrick; Brian D. ; et al. | 2018-04-05 |
In-pipe error scrubbing within a processor core
Grant 9,928,128 - Barrick , et al. March 27, 2 | 2018-03-27 |
Determining of validity of speculative load data after a predetermined period of time in a multi-slice processor
Grant 9,928,073 - Bowman , et al. March 27, 2 | 2018-03-27 |
Determining of validity of speculative load data after a predetermined period of time in a multi-slice processor
Grant 9,921,833 - Bowman , et al. March 20, 2 | 2018-03-20 |
Flush Avoidance In A Load Store Unit
App 20180039577 - CHADHA; SUNDEEP ; et al. | 2018-02-08 |
Age based fast instruction issue
Grant 9,880,850 - Brownscheidle , et al. January 30, 2 | 2018-01-30 |
Age based fast instruction issue
Grant 9,870,231 - Brownscheidle , et al. January 16, 2 | 2018-01-16 |
Speculative load data in byte-write capable register file and history buffer for a multi-slice microprocessor
Grant 9,858,078 - Bowman , et al. January 2, 2 | 2018-01-02 |
Techniques For Implementing Store Instructions In A Multi-slice Processor Architecture
App 20170364356 - AYUB; SALMA ; et al. | 2017-12-21 |
ECC scrubbing in a multi-slice microprocessor
Grant 9,846,614 - Barrick , et al. December 19, 2 | 2017-12-19 |
Transmitting Data Between Execution Slices Of A Multi-slice Processor
App 20170357513 - AYUB; SALMA ; et al. | 2017-12-14 |
Ecc Scrubbing In A Multi-slice Microprocessor
App 20170351568 - BARRICK; Brian D. ; et al. | 2017-12-07 |
Operation Of A Multi-slice Processor Implementing A Load/store Unit Maintaining Rejected Instructions
App 20170329641 - CHADHA; SUNDEEP ; et al. | 2017-11-16 |
Operation Of A Multi-slice Processor Implementing A Load/store Unit Maintaining Rejected Instructions
App 20170329713 - CHADHA; SUNDEEP ; et al. | 2017-11-16 |
Age Based Fast Instruction Issue
App 20170322812 - Brownscheidle; Jeffrey C. ; et al. | 2017-11-09 |
Merging Status And Control Data In A Reservation Station
App 20170315528 - Barrick; Brian ; et al. | 2017-11-02 |
Fast Multi-width Instruction Issue In Parallel Slice Processor
App 20170293489 - Ayub; Salma ; et al. | 2017-10-12 |
Operation Of A Multi-slice Processor Implementing A Hardware Level Transfer Of An Execution Thread
App 20170286183 - BARRICK; BRIAN D. ; et al. | 2017-10-05 |
In-pipe Error Scrubbing Within A Processor Core
App 20170286202 - BARRICK; BRIAN D. ; et al. | 2017-10-05 |
Mechanism For Using A Reservation Station As A Scratch Register
App 20170277541 - CHADHA; SUNDEEP ; et al. | 2017-09-28 |
Age Based Fast Instruction Issue
App 20170269938 - Brownscheidle; Jeffrey C. ; et al. | 2017-09-21 |
Operation Of A Multi-slice Processor Implementing Dynamic Switching Of Instruction Issuance Order
App 20170255463 - BROWNSCHEIDLE; JEFFREY C. ; et al. | 2017-09-07 |
Operation Of A Multi-slice Processor Preventing Early Dependent Instruction Wakeup
App 20170255465 - CHADHA; SUNDEEP ; et al. | 2017-09-07 |
Distributed history buffer flush and restore handling in a parallel slice design
Grant 9,747,217 - Ayub , et al. August 29, 2 | 2017-08-29 |
Distributed history buffer flush and restore handling in a parallel slice design
Grant 9,740,620 - Ayub , et al. August 22, 2 | 2017-08-22 |
Operation Of A Multi-slice Processor Implementing A Mechanism To Overcome A System Hang
App 20170235577 - BROWNSCHEIDLE; JEFFREY C. ; et al. | 2017-08-17 |
Operation Of A Multi-slice Processor With Reduced Flush And Restore Latency
App 20170168818 - AYUB; Salma ; et al. | 2017-06-15 |
Operation Of A Multi-slice Processor With Instruction Queue Processing
App 20170168831 - BARRICK; BRIAN D. ; et al. | 2017-06-15 |
Operation Of A Multi-slice Processor With Reduced Flush And Restore Latency
App 20170168826 - AYUB; SALMA ; et al. | 2017-06-15 |
Operation Of A Multi-slice Processor With Speculative Data Loading
App 20170168821 - BOWMAN; JOSHUA W. ; et al. | 2017-06-15 |
Operation Of A Multi-slice Processor With Selective Producer Instruction Types
App 20170168834 - BARRICK; BRIAN D. ; et al. | 2017-06-15 |
Operation Of A Multi-slice Processor With Instruction Queue Processing
App 20170168835 - BARRICK; BRIAN D. ; et al. | 2017-06-15 |
Operation Of A Multi-slice Processor With Speculative Data Loading
App 20170168836 - BOWMAN; JOSHUA W. ; et al. | 2017-06-15 |
Energy Efficient Source Operand Issue
App 20170168830 - Brownscheidle; Jeffrey C. ; et al. | 2017-06-15 |
Operation Of A Multi-slice Processor With Selective Producer Instruction Types
App 20170168822 - BARRICK; BRIAN D. ; et al. | 2017-06-15 |
Handling Unaligned Load Operations In A Multi-slice Computer Processor
App 20170168945 - CHADHA; SUNDEEP ; et al. | 2017-06-15 |
Handling Unaligned Load Operations In A Multi-slice Computer Processor
App 20170168823 - CHADHA; SUNDEEP ; et al. | 2017-06-15 |
Age Based Fast Instruction Issue
App 20170031686 - Brownscheidle; Jeffrey C. ; et al. | 2017-02-02 |
Variable Latency Pipe For Interleaving Instruction Tags In A Microprocessor
App 20170003969 - AYUB; Salma ; et al. | 2017-01-05 |
Variable Latency Pipe For Interleaving Instruction Tags In A Microprocessor
App 20170003971 - Ayub; Salma ; et al. | 2017-01-05 |
Techniques To Wake-up Dependent Instructions For Back-to-back Issue In A Microprocessor
App 20160378503 - BROWNSCHEIDLE; Jeffrey C. ; et al. | 2016-12-29 |
Techniques To Wake-up Dependent Instructions For Back-to-back Issue In A Microprocessor
App 20160378504 - BROWNSCHEIDLE; Jeffrey C. ; et al. | 2016-12-29 |
Techniques For Improving Issue Of Instructions With Variable Latencies In A Microprocessor
App 20160371090 - Brownscheidle; Jeffrey C. ; et al. | 2016-12-22 |
Techniques For Improving Issue Of Instructions With Variable Latencies In A Microprocessor
App 20160371091 - BROWNSCHEIDLE; Jeffrey C. ; et al. | 2016-12-22 |
Speculative Load Data in Byte-Write Capable Register File and History Buffer for a Multi-Slice Microprocessor
App 20160357566 - Bowman; Joshua W. ; et al. | 2016-12-08 |
Speculative Load Data in Byte-Write Capable Register File and History Buffer for a Multi-Slice Microprocessor
App 20160357567 - Bowman; Joshua W. ; et al. | 2016-12-08 |
Distributed History Buffer Flush and Restore Handling in a Parallel Slice Design
App 20160328329 - Ayub; Salma ; et al. | 2016-11-10 |
Distributed History Buffer Flush and Restore Handling in a Parallel Slice Design
App 20160328330 - Ayub; Salma ; et al. | 2016-11-10 |
History Buffer for Multiple-Field Registers
App 20160253181 - Chadha; Sundeep ; et al. | 2016-09-01 |
Parallel Slice Processing Method Using A Recirculating Load-store Queue For Fast Deallocation Of Issue Queue Entries
App 20160202988 - Ayub; Salma ; et al. | 2016-07-14 |
Linkable Issue Queue Parallel Execution Slice For A Processor
App 20160202990 - Brownscheidle; Jeffrey Carl ; et al. | 2016-07-14 |
Parallel Slice Processor Having A Recirculating Load-store Queue For Fast Deallocation Of Issue Queue Entries
App 20160202986 - Ayub; Salma ; et al. | 2016-07-14 |
Linkable Issue Queue Parallel Execution Slice Processing Method
App 20160202992 - Brownscheidle; Jeffrey Carl ; et al. | 2016-07-14 |
Age based fast instruction issue
Grant 9,389,870 - Brownscheidle , et al. July 12, 2 | 2016-07-12 |
Speculative finish of instruction execution in a processor core
Grant 9,389,867 - Chadha , et al. July 12, 2 | 2016-07-12 |
Speculative finish of instruction execution in a processor core
Grant 9,384,002 - Chadha , et al. July 5, 2 | 2016-07-05 |
Age based fast instruction issue
Grant 9,367,322 - Brownscheidle , et al. June 14, 2 | 2016-06-14 |
Efficient Usage Of A Multi-level Register File Utilizing A Register File Bypass
App 20160154650 - Abernathy; Christopher M. ; et al. | 2016-06-02 |
Processor Core Including Pre-issue Load-hit-store (lhs) Hazard Prediction To Reduce Rejection Of Load Instructions
App 20160117173 - Chadha; Sundeep ; et al. | 2016-04-28 |
Processing Method Including Pre-issue Load-hit-store (lhs) Hazard Prediction To Reduce Rejection Of Load Instructions
App 20160117174 - Chadha; Sundeep ; et al. | 2016-04-28 |
Efficient usage of a multi-level register file utilizing a register file bypass
Grant 9,286,068 - Abernathy , et al. March 15, 2 | 2016-03-15 |
Speculative Finish Of Instruction Execution In A Processor Core
App 20150370573 - CHADHA; SUNDEEP ; et al. | 2015-12-24 |
Efficient support of multiple page size segments
Grant 8,862,859 - Dooley , et al. October 14, 2 | 2014-10-14 |
Multiple page size segment encoding
Grant 8,745,307 - Chadha , et al. June 3, 2 | 2014-06-03 |
Speculative Finish Of Instruction Execution In A Processor Core
App 20140143523 - CHADHA; SUNDEEP ; et al. | 2014-05-22 |
Efficient Usage Of A Register File Mapper Mapping Structure
App 20140122842 - Abernathy; Christopher M. ; et al. | 2014-05-01 |
Efficient Usage Of A Multi-level Register File Utilizing A Register File Bypass
App 20140122840 - Abernathy; Christopher M. ; et al. | 2014-05-01 |
Multiple Page Size Segment Encoding
App 20110283040 - Chadha; Sundeep ; et al. | 2011-11-17 |
Efficient Support Of Multiple Page Size Segments
App 20110276778 - Dooley; Miles R. ; et al. | 2011-11-10 |
Utilizing programmable channels for allocation of buffer space and transaction control in data communications
Grant 7,882,278 - Chadha , et al. February 1, 2 | 2011-02-01 |
Performing temporal checking
Grant 7,853,420 - Birmiwal , et al. December 14, 2 | 2010-12-14 |
Generating testcases based on numbers of testcases previously generated
Grant 7,761,825 - Chadha July 20, 2 | 2010-07-20 |
Utilizing Programmable Channels for Allocation of Buffer Space and Transaction Control in Data Communications
App 20090138629 - Chadha; Sundeep ; et al. | 2009-05-28 |
Generating testcases based on numbers of testcases previously generated
Grant 7,516,430 - Chadha April 7, 2 | 2009-04-07 |
Method, apparatus, and computer program product for optimizing packet flow control through buffer status forwarding
Grant 7,505,405 - Chadha , et al. March 17, 2 | 2009-03-17 |
Testcase generation via a pool of parameter files
Grant 7,502,966 - Buchonina , et al. March 10, 2 | 2009-03-10 |
Data communication method and apparatus utilizing programmable channels for allocation of buffer space and transaction control
Grant 7,493,426 - Chadha , et al. February 17, 2 | 2009-02-17 |
Method and apparatus for performing temporal checking
Grant 7,464,354 - Birmiwal , et al. December 9, 2 | 2008-12-09 |
Generating testcases based on numbers of testcases previously generated
App 20080288903 - Chadha; Sundeep | 2008-11-20 |
Performing Temporal Checking
App 20080195339 - Birmiwal; Parag ; et al. | 2008-08-14 |
Performing temporal checking
App 20080195340 - Birmiwal; Parag ; et al. | 2008-08-14 |
Testcase generation via a pool of parameter files
App 20070220339 - Buchonina; Olga ; et al. | 2007-09-20 |
Method and system for verifying equivalence of two representations of a stimulus pattern for testing a design
App 20070220390 - Bird; Sarah L. ; et al. | 2007-09-20 |
Method, system and program product for facilitating debugging of simulation results obtained for an optimized simulation model of a device design having hierarchically-connected components
App 20070168741 - Chadha; Sundeep ; et al. | 2007-07-19 |
Method and apparatus for performing temporal checking
App 20070136703 - Birmiwal; Parag ; et al. | 2007-06-14 |
Data communication method and apparatus utilizing programmable channels for allocation of buffer space and transaction control
App 20060179182 - Chadha; Sundeep ; et al. | 2006-08-10 |
Internal data bus interconnection mechanism utilizing shared buffers supporting communication among multiple functional components of an integrated circuit chip
App 20060174050 - Chadha; Sundeep ; et al. | 2006-08-03 |
Method and apparatus for implementing power-saving sleep mode in design with multiple clock domains
Grant 7,080,269 - Baumgartner , et al. July 18, 2 | 2006-07-18 |
Generating testcases based on numbers of testcases previously generated
App 20060143582 - Chadha; Sundeep | 2006-06-29 |
Method for generating reusable behavioral code
Grant 7,051,299 - Chadha , et al. May 23, 2 | 2006-05-23 |
Method, apparatus, and computer program product for optimizing packet flow control through buffer status forwarding
App 20060077896 - Chadha; Sundeep ; et al. | 2006-04-13 |
Method for generating reusable behavioral code
App 20050028035 - Chadha, Sundeep ; et al. | 2005-02-03 |
Method and apparatus for implementing power-saving sleep mode in design with multiple clock domains
App 20040230850 - Baumgartner, Yoanna ; et al. | 2004-11-18 |
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