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name:-0.042197942733765
name:-0.04700779914856
name:-0.0032899379730225
Braceras; George M. Patent Filings

Braceras; George M.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Braceras; George M..The latest application filed is for "multi-port high performance memory".

Company Profile
3.50.43
  • Braceras; George M. - Essex Junction VT
  • Braceras; George M. - Essex Juncton VT
  • Braceras; George M - Essex Junction VT
  • Braceras; George M. - Colchester VT
  • Braceras; George M. - South Burlington VT
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Multi-port high performance memory
Grant 10,978,143 - Braceras , et al. April 13, 2
2021-04-13
Multi-port High Performance Memory
App 20210065784 - BRACERAS; George M. ;   et al.
2021-03-04
Column-dependent positive voltage boost for memory cell supply voltage
Grant 10,522,217 - Bringivijayaraghavan , et al. Dec
2019-12-31
Intracycle bitline restore in high performance memory
Grant 10,510,384 - Bringivijayaraghavan , et al. Dec
2019-12-17
Intracycle Bitline Restore In High Performance Memory
App 20190147924 - BRINGIVIJAYARAGHAVAN; Venkatraghavan ;   et al.
2019-05-16
Address based memory data path programming scheme
Grant 9,721,628 - Bringivijayaraghavan , et al. August 1, 2
2017-08-01
Data Aware Write Scheme For Sram
App 20170053694 - Braceras; George M. ;   et al.
2017-02-23
Circuit to improve SRAM stability
Grant 9,570,155 - Braceras , et al. February 14, 2
2017-02-14
Data aware write scheme for SRAM
Grant 9,570,156 - Braceras , et al. February 14, 2
2017-02-14
Boost control to improve SRAM write operation
Grant 9,548,104 - Braceras , et al. January 17, 2
2017-01-17
Boost Control To Improve Sram Write Operation
App 20170004874 - Braceras; George M. ;   et al.
2017-01-05
Circuit To Improve Sram Stability
App 20160365139 - Braceras; George M. ;   et al.
2016-12-15
Read only memory (ROM) with redundancy
Grant 9,460,811 - Braceras , et al. October 4, 2
2016-10-04
High performance sense amplifier
Grant 9,437,282 - Braceras , et al. September 6, 2
2016-09-06
Sense amplifiers and multiplexed latches
Grant 9,390,769 - Bhatsoori , et al. July 12, 2
2016-07-12
Memory cells with read access schemes
Grant 9,236,116 - Braceras , et al. January 12, 2
2016-01-12
Read Only Memory (rom) With Redundancy
App 20140351662 - BRACERAS; George M. ;   et al.
2014-11-27
Read only memory (ROM) with redundancy
Grant 8,839,054 - Braceras , et al. September 16, 2
2014-09-16
Vdiff max limiter in SRAMs for improved yield and power
Grant 8,654,594 - Arsovski , et al. February 18, 2
2014-02-18
Dual power supply memory array having a control circuit that dynamically selects a lower of two supply voltages for bitline pre-charge operations and an associated method
Grant 8,630,139 - Braceras , et al. January 14, 2
2014-01-14
Asymmetric memory cells
Grant 8,593,861 - Braceras , et al. November 26, 2
2013-11-26
Methods and systems for adjusting wordline up-level voltage to improve production yield relative to SRAM-cell stability
Grant 8,582,351 - Arsovski , et al. November 12, 2
2013-11-12
Read Only Memory (rom) With Redundancy
App 20130275821 - BRACERAS; George M. ;   et al.
2013-10-17
Vdiff Max Limiter In Srams For Improved Yield And Power
App 20130223161 - Arsovski; Igor ;   et al.
2013-08-29
Dual Power Supply Memory Array Having A Control Circuit That Dyanmically Selects A Lower Of Two Supply Voltages For Bitline Pre-charge Operations And An Associated Method
App 20130135944 - Braceras; George M. ;   et al.
2013-05-30
Asymmetric Memory Cells
App 20130088931 - BRACERAS; George M. ;   et al.
2013-04-11
Single supply sub VDD bit-line precharge SRAM and method for level shifting
Grant 8,279,687 - Adams , et al. October 2, 2
2012-10-02
Apparatus and method for implementing write assist for static random access memory arrays
Grant 8,233,342 - Adams , et al. July 31, 2
2012-07-31
Methods and Systems for Adjusting Wordline Up-Level Voltage to Improve Production Yield Relative to SRAM-Cell Stability
App 20120075919 - Arsovski; Igor ;   et al.
2012-03-29
Single Supply Sub Vdd Bitline Precharge Sram And Method For Level Shifting
App 20110280088 - ADAMS; CHAD A. ;   et al.
2011-11-17
Structure for power-efficient cache memory
Grant 7,904,658 - Abadeer , et al. March 8, 2
2011-03-08
Circuit and method for controlling a standby voltage level of a memory
Grant 7,894,291 - Braceras , et al. February 22, 2
2011-02-22
Column selectable self-biasing virtual voltages for SRAM write assist
Grant 7,817,481 - Adams , et al. October 19, 2
2010-10-19
Apparatus for improved SRAM device performance through double gate topology
Grant 7,729,159 - Braceras , et al. June 1, 2
2010-06-01
Column Selectable Self-Biasing Virtual Voltages for SRAM Write Assist
App 20100002495 - Adams; Chad Allen ;   et al.
2010-01-07
System and method for integrating dynamic leakage reduction with write-assisted SRAM architecture
Grant 7,643,357 - Braceras , et al. January 5, 2
2010-01-05
Apparatus And Method For Implementing Write Assist For Static Random Access Memory Arrays
App 20090235171 - Adams; Chad A. ;   et al.
2009-09-17
System And Method For Integrating Dynamic Leakage Reduction With Write-assisted Sram Architecture
App 20090207650 - Braceras; George M. ;   et al.
2009-08-20
Current control mechanism for dynamic logic keeper circuits in an integrated circuit and method of regulating same
Grant 7,573,300 - Abadeer , et al. August 11, 2
2009-08-11
Design structure for a current control mechanism for power networks and dynamic logic keeper circuits
Grant 7,471,114 - Abadeer , et al. December 30, 2
2008-12-30
Apparatus For Improved Sram Device Performance Through Double Gate Topology
App 20080273373 - Braceras; George M. ;   et al.
2008-11-06
Design Structure For Improved Sram Device Performance Through Double Gate Topology
App 20080273366 - Braceras; George M. ;   et al.
2008-11-06
Apparatus and method for improved SRAM device performance through double gate topology
Grant 7,408,800 - Braceras , et al. August 5, 2
2008-08-05
Current Control Mechanism For Dynamic Logic Keeper Circuits In An Integrated Circuit And Method Of Regulating Same
App 20080169837 - Abadeer; Wagdi W. ;   et al.
2008-07-17
Structure For A Current Control Mechanism For Dynamic Logic Keeper Circuits
App 20080169839 - Abadeer; Wagdi W. ;   et al.
2008-07-17
Content addressable memory structure
Grant 7,337,268 - Braceras , et al. February 26, 2
2008-02-26
Structure For Power-efficient Cache Memory
App 20080040547 - ABADEER; Wagdi W. ;   et al.
2008-02-14
Apparatus for implementing dynamic data path with interlocked keeper and restore devices
Grant 7,307,457 - Braceras , et al. December 11, 2
2007-12-11
Apparatus For Implementing Dynamic Data Path With Interlocked Keeper And Restore Devices
App 20070229116 - Braceras; George M. ;   et al.
2007-10-04
Power-efficient Cache Memory System And Method Therefor
App 20070124538 - Abadeer; Wagdi W. ;   et al.
2007-05-31
Circuit And Method For Controlling A Standby Voltage Level Of A Memory
App 20070070769 - Braceras; George M. ;   et al.
2007-03-29
Adaptive integrated circuit based on transistor current measurements
Grant 7,180,320 - Braceras , et al. February 20, 2
2007-02-20
Content Addressable Memory Structure
App 20070014138 - BRACERAS; George M. ;   et al.
2007-01-18
Self-test Circuitry To Determine Minimum Operating Voltage
App 20060259840 - Abadeer; Wagdi W. ;   et al.
2006-11-16
Content addressable memory structure
Grant 7,120,732 - Braceras , et al. October 10, 2
2006-10-10
Apparatus and method for small signal sensing in an SRAM cell utilizing PFET access devices
Grant 7,061,793 - Barth, Jr. , et al. June 13, 2
2006-06-13
Apparatus And Method For Small Signal Sensing In An Sram Cell Utilizing Pfet Access Devices
App 20060120144 - Barth; John E. Jr. ;   et al.
2006-06-08
Delay-lock-loop with improved accuracy and range
Grant 6,999,547 - Braceras , et al. February 14, 2
2006-02-14
Method and apparatus for improving cycle time in a quad data rate SRAM device
Grant 6,967,861 - Braceras , et al. November 22, 2
2005-11-22
Apparatus and Method for Small Signal Sensing in an SRAM Cell Utilizing PFET Access Devices
App 20050207210 - Barth, John E. Jr. ;   et al.
2005-09-22
Method And Apparatus For Improving Cycle Time In A Quad Data Rate Sram Device
App 20050190640 - Braceras, George M. ;   et al.
2005-09-01
Content Addressable Memory Structure
App 20050185436 - Braceras, George M. ;   et al.
2005-08-25
Adaptive integrated circuit based on transistor current measurements
App 20050162181 - Braceras, George M. ;   et al.
2005-07-28
Scalable termination
Grant 6,922,076 - Braceras , et al. July 26, 2
2005-07-26
Adaptive integrated circuit based on transistor current measurements
Grant 6,897,674 - Braceras , et al. May 24, 2
2005-05-24
Scalable Termination
App 20050046441 - Braceras, George M. ;   et al.
2005-03-03
Adaptive Integrated Circuit Based On Transistor Current Measurements
App 20040263199 - Braceras, George M. ;   et al.
2004-12-30
Active restore weak write test mode
Grant 6,829,183 - Braceras December 7, 2
2004-12-07
Delay-lock-loop with improved accuracy and range
App 20040101079 - Braceras, George M. ;   et al.
2004-05-27
Active restore weak write test mode
App 20040062105 - Braceras, George M
2004-04-01
Active restore weak write test mode
Grant 6,711,076 - Braceras March 23, 2
2004-03-23
Method for margin testing
Grant 6,650,580 - Braceras November 18, 2
2003-11-18
Dynamic Precharge Decode Scheme For Fast Dram
App 20030026149 - Braceras, George M. ;   et al.
2003-02-06
Method and apparatus for programmable active termination of input/output devices
Grant 6,501,293 - Braceras , et al. December 31, 2
2002-12-31
Redundant Memory Array Having Dual-use Repair Elements
App 20020196677 - Braceras, George M. ;   et al.
2002-12-26
BIST circuit for variable impedance system
App 20020130697 - Braceras, George M. ;   et al.
2002-09-19
High performance memory architecture
App 20020006070 - Braceras, George M. ;   et al.
2002-01-17
Method And Apparatus For Programmable Active Termination Of Input/output Devices
App 20020005734 - BRACERAS, GEORGE M. ;   et al.
2002-01-17
Efficient semiconductor burn-in circuit and method of operation
Grant 6,038,181 - Braceras , et al. March 14, 2
2000-03-14
Dynamic dielectric protection circuit for a receiver
Grant 5,793,592 - Adams , et al. August 11, 1
1998-08-11
Output latching circuit for static memory devices
Grant 5,715,198 - Braceras , et al. February 3, 1
1998-02-03
Content addressable memory for a data processing system
Grant 5,638,315 - Braceras , et al. June 10, 1
1997-06-10
Functional pipelined virtual multiport cache memory with plural access during a single cycle
Grant 5,557,768 - Braceras , et al. September 17, 1
1996-09-17
Off-chip driver circuits
Grant 4,709,162 - Braceras , et al. November 24, 1
1987-11-24

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