Borland; John O.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Borland; John O..The latest application filed is for "method of introducing material into a substrate by gas-cluster ion beam irradiation".

Company Profile

0.6.5

Borland; John O. - South Hamilton MA
Borland; John O. - S. Hamilton MA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Trademarks

Patent Activity

Patent	Date
Method Of Introducing Material Into A Substrate By Gas-cluster Ion Beam Irradiation App 20080245974 - Kirkpatrick; Allen R. ; et al.	2008-10-09
Formation of doped regions and/or ultra-shallow junctions in semiconductor materials by gas-cluster ion irradiation Grant 7,410,890 - Kirkpatrick , et al. August 12, 2	2008-08-12
Formation of ultra-shallow junctions by gas-cluster ion irradiation Grant 7,396,745 - Borland , et al. July 8, 2	2008-07-08
Methods of forming doped and un-doped strained semiconductor materials and semiconductor films by gas-cluster-ion-beam irradiation and materials and film products Grant 7,259,036 - Borland , et al. August 21, 2	2007-08-21
Replacement gate field effect transistor with germanium or SiGe channel and manufacturing method for same using gas-cluster ion irradiation App 20060292762 - Borland; John O. ; et al.	2006-12-28
Formation of doped regions and/or ultra-shallow junctions in semiconductor materials by gas-cluster ion irradiation App 20050277246 - Kirkpatrick, Allen R. ; et al.	2005-12-15
Formation of ultra-shallow junctions by gas-cluster ion irradiation App 20050202657 - Borland, John O. ; et al.	2005-09-15
Methods of forming doped and un-doped strained semiconductor and semiconductor films by gas-cluster ion irradiation App 20050181621 - Borland, John O. ; et al.	2005-08-18
Simplified semiconductor device manufacturing using low energy high tilt angle and high energy post-gate ion implantation (PoGI) Grant 6,187,643 - Borland February 13, 2	2001-02-13
Semiconductor device having at least one field oxide area and CMOS vertically modulated wells (VMW) with a buried implanted layer for lateral isolation having a first portion below a well, a second portion forming another, adjacent well, and a vertical po Grant 5,814,866 - Borland September 29, 1	1998-09-29
Method of constructing CMOS vertically modulated wells (VMW) by clustered MeV BILLI (buried implanted layer for lateral isolation) implantation Grant 5,501,993 - Borland March 26, 1	1996-03-26

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