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name:-0.013740062713623
name:-0.013674020767212
name:-0.0012028217315674
Bol; Igor Patent Filings

Bol; Igor

Patent Applications and Registrations

Patent applications and USPTO patent grants for Bol; Igor.The latest application filed is for "method for fabricating a shallow and narrow trench fet".

Company Profile
0.13.11
  • Bol; Igor - Topanga CA
  • Bol; Igor - Sherman Oaks CA US
  • Bol; Igor - US
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method for Fabricating a Shallow and Narrow Trench FET
App 20170213909 - Henson; Timothy D. ;   et al.
2017-07-27
Method for fabricating a shallow and narrow trench FET and related structures
Grant 9,653,597 - Henson , et al. May 16, 2
2017-05-16
Method for fabricating a vertical LDMOS device
Grant 8,735,294 - Bol May 27, 2
2014-05-27
Method for Fabricating a Vertical LDMOS Device
App 20130115746 - Bol; Igor
2013-05-09
Process for manufacture of thin wafer
Grant 8,420,505 - Bol April 16, 2
2013-04-16
Vertical LDMOS device and method for fabricating same
Grant 8,299,527 - Bol October 30, 2
2012-10-30
Vertical LDMOS device and method for fabricating same
App 20110272759 - Bol; Igor
2011-11-10
Double sided semiconduction device with edge contact and package therefor
Grant 7,944,035 - Bol May 17, 2
2011-05-17
Self-aligned vertical group III-V transistor and method for fabricated same
App 20100314695 - Bol; Igor
2010-12-16
Dynamic deep depletion field effect transistor
Grant 7,462,908 - Bol , et al. December 9, 2
2008-12-09
Process For Manufacture Of Thin Wafer
App 20080014439 - Bol; Igor
2008-01-17
High density FET with self-aligned source atop the trench
Grant 7,319,059 - Bol January 15, 2
2008-01-15
Double sided semiconduction device with edge contact and package therefor
App 20070273016 - Bol; Igor
2007-11-29
High density fet with self-aligned source atop the trench
App 20060172487 - Bol; Igor
2006-08-03
Dynamic deep depletion field effect transistor
App 20060017100 - Bol; Igor ;   et al.
2006-01-26
Method for fabrication of MOSFET with buried gate
Grant 6,858,499 - Bol February 22, 2
2005-02-22
Method for fabrication of MOSFET with buried gate
App 20040191971 - Bol, Igor
2004-09-30
Manufacturing process for fast recovery diode
Grant 6,699,775 - Bol , et al. March 2, 2
2004-03-02
Single mask trench fred with enlarged Schottky area
Grant 6,656,843 - Bol December 2, 2
2003-12-02
Single Mask Trench Fred With Enlarged Schottky Area
App 20030203533 - Bol, Igor
2003-10-30
Manufacturing process and termination structure for fast recovery diode
App 20030006425 - Bol, Igor ;   et al.
2003-01-09
Single mask process for manufacture of fast recovery diode
Grant 6,294,445 - Bol , et al. September 25, 2
2001-09-25

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