Benistant; Francis

Patent Applications and Registrations

Patent applications and USPTO patent grants for Benistant; Francis.The latest application filed is for "multiple-step epitaxial growth s/d regions for nmos finfet".

Company Profile

0.27.28

Benistant; Francis - Singapore SG
BENISTANT; Francis - SG SG
Benistant; Francis - San Jose CA
Benistant; Francis - Boise ID

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
System and method for modular simulation of spin transfer torque magnetic random access memory devices Grant 9,997,225 - Datta , et al. June 12, 2	2018-06-12
Multiple-step epitaxial growth S/D regions for NMOS FinFET Grant 9,966,433 - Li , et al. May 8, 2	2018-05-08
Multiple-step Epitaxial Growth S/d Regions For Nmos Finfet App 20180040696 - LI; Zhiqing ; et al.	2018-02-08
Method For Forming A Doped Region In A Fin Using A Variable Thickness Spacer And The Resulting Device App 20170288041 - Pandey; Shesh Mani ; et al.	2017-10-05
Isolation scheme for high voltage device Grant 9,673,084 - Liu , et al. June 6, 2	2017-06-06
FinFET conformal junction and high epi surface dopant concentration method and device Grant 9,577,040 - Feng , et al. February 21, 2	2017-02-21
FinFET conformal junction and abrupt junction with reduced damage method and device Grant 9,559,176 - Feng , et al. January 31, 2	2017-01-31
Finfet Conformal Junction And High Epi Surface Dopant Concentration Method And Device App 20160308005 - FENG; Peijie ; et al.	2016-10-20
Finfet Conformal Junction And Abrupt Junction With Reduced Damage Method And Device App 20160293718 - FENG; Peijie ; et al.	2016-10-06
FinFET conformal junction and high EPI surface dopant concentration method and device Grant 9,406,752 - Feng , et al. August 2, 2	2016-08-02
FinFET conformal junction and abrupt junction with reduced damage method and device Grant 9,397,162 - Feng , et al. July 19, 2	2016-07-19
Finfet Conformal Junction And High Epi Surface Dopant Concentration Method And Device App 20160190251 - FENG; Peijie ; et al.	2016-06-30
Finfet Conformal Junction And Abrupt Junction With Reduced Damage Method And Device App 20160190252 - FENG; Peijie ; et al.	2016-06-30
System And Method For Modular Simulation Of Spin Transfer Torque Magnetic Random Access Memory Devices App 20160171135 - DATTA; Deepanjan ; et al.	2016-06-16
Isolation Scheme For High Voltage Device App 20160163583 - LIU; Kun ; et al.	2016-06-09
Integrated circuit system with double doped drain transistor Grant 9,269,770 - Li , et al. February 23, 2	2016-02-23
Semiconductor devices and methods of forming the semiconductor devices including a retrograde well Grant 8,994,107 - Bazizi , et al. March 31, 2	2015-03-31
Method and apparatus to reduce thermal variations within an integrated circuit die using thermal proximity correction Grant 8,860,142 - Poon , et al. October 14, 2	2014-10-14
Semiconductor Devices And Methods Of Forming The Semiconductor Devices Including A Retrograde Well App 20140054649 - Bazizi; El Mehdi ; et al.	2014-02-27
Method And Apparatus To Reduce Thermal Variations Within An Integrated Circuit Die Using Thermal Proximity Correction App 20130099321 - Poon; Debora Chyiu Hyia ; et al.	2013-04-25
Method for fabricating semiconductor devices with reduced junction diffusion Grant 8,354,321 - Colombeau , et al. January 15, 2	2013-01-15
Method and apparatus to reduce thermal variations within an integrated circuit die using thermal proximity correction Grant 8,293,544 - Poon , et al. October 23, 2	2012-10-23
Method For Fabricating Semiconductor Devices With Reduced Junction Diffusion App 20120034745 - COLOMBEAU; Benjamin ; et al.	2012-02-09
Method for fabricating semiconductor devices with reduced junction diffusion Grant 8,053,340 - Colombeau , et al. November 8, 2	2011-11-08
Structure and method to form source and drain regions over doped depletion regions Grant 7,888,752 - Chui , et al. February 15, 2	2011-02-15
Method and apparatus to reduce thermal variations within an integrated circuit die using thermal proximity correction App 20100019329 - Poon; Debora Chyiu Hyia ; et al.	2010-01-28
Semiconductor device layout and channeling implant process Grant 7,573,099 - Li , et al. August 11, 2	2009-08-11
Method For Fabricating Semiconductor Devices With Reduced Junction Diffusion App 20090087971 - COLOMBEAU; Benjamin ; et al.	2009-04-02
Modified source/drain re-oxidation method and system Grant 7,271,435 - Rudeck , et al. September 18, 2	2007-09-18
Integrated Circuit System With Double Doped Drain Transistor App 20070210376 - Li; Yisuo ; et al.	2007-09-13
Shallow low energy ion implantation into pad oxide for improving threshold voltage stability Grant 7,259,072 - Li , et al. August 21, 2	2007-08-21
Semiconductor device layout and channeling implant process Grant 7,253,483 - Li , et al. August 7, 2	2007-08-07
Structure and method to form source and drain regions over doped depletion regions App 20070178652 - Chui; King Jien ; et al.	2007-08-02
Structure and method to form source and drain regions over doped depletion regions Grant 7,202,133 - Chui , et al. April 10, 2	2007-04-10
Low cost source drain elevation through poly amorphizing implant technology Grant 7,101,743 - Li , et al. September 5, 2	2006-09-05
Modified source/drain re-oxidation method and system Grant 7,037,860 - Rudeck , et al. May 2, 2	2006-05-02
Semiconductor device layout and channeling implant process App 20050280082 - Li, Yisuo ; et al.	2005-12-22
Modified source/drain re-oxidation method and system App 20050272203 - Rudeck, Paul J. ; et al.	2005-12-08
Semiconductor device layout and channeling implant process Grant 6,972,236 - Li , et al. December 6, 2	2005-12-06
Method of activating polysilicon gate structure dopants after offset spacer deposition Grant 6,969,646 - Quek , et al. November 29, 2	2005-11-29
Shallow low energy ion implantation into pad oxide for improving threshold voltage stability App 20050239256 - Li, Yisuo ; et al.	2005-10-27
Semiconductor device layout and channeling implant process App 20050236677 - Li, Yisuo ; et al.	2005-10-27
Semiconductor Device Layout And Channeling Implant Process App 20050170595 - Li, Yisuo ; et al.	2005-08-04
Structure and method to form source and drain regions over doped depletion regions App 20050156253 - Chui, King Jien ; et al.	2005-07-21
Low Cost Source Drain Elevation Through Poly Amorphizing Implant Technology App 20050148125 - Li, Yisuo ; et al.	2005-07-07
Modified source/drain re-oxidation method and system App 20040185620 - Rudeck, Paul J. ; et al.	2004-09-23
Method of activating polysilicon gate structure dopants after offset spacer deposition App 20040164320 - Quek, Elgin ; et al.	2004-08-26
Modified source/drain re-oxidation method and system Grant 6,756,268 - Rudeck , et al. June 29, 2	2004-06-29
Modified source/drain re-oxidation method and system App 20020132427 - Rudeck, Paul J. ; et al.	2002-09-19
Modified source/drain re-oxidation method and system App 20020096707 - Rudeck, Paul J. ; et al.	2002-07-25
Modified source/drain re-oxidation method and system App 20020096706 - Rudeck, Paul J. ; et al.	2002-07-25

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