| Patent | Date |
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Systems And Methods For Multiplexing Data Of An Underlying Index
App 20220222234 - Andreev; Alexander ; et al. | 2022-07-14 |
Systems and methods for improving indexer performance by multiplexing data of an underlying index
Grant 11,321,295 - Andreev , et al. May 3, 2 | 2022-05-03 |
Systems And Methods For Generating Placements For Circuit Designs Using Pyramidal Flows
App 20220114321 - Andreev; Alexander ; et al. | 2022-04-14 |
Circuits And Methods For Routing Crossbars With Programmable Vias
App 20220014197 - Maheshwari; Atul ; et al. | 2022-01-13 |
Configurable Clock Macro Circuits And Methods
App 20220004221 - Rusakov; Alexander ; et al. | 2022-01-06 |
Systems And Methods For Improving Indexer Performance By Multiplexing Data Of An Underlying Index
App 20210149863 - Andreev; Alexander ; et al. | 2021-05-20 |
Structured Integrated Circuit Device With Multiple Configurable Via Layers
App 20160293541 - ANDREEV; Alexander ; et al. | 2016-10-06 |
Variable node processing unit
Grant 9,239,704 - Andreev , et al. January 19, 2 | 2016-01-19 |
Architectural floorplan for a structured ASIC manufactured on a 28 NM CMOS process lithographic node or smaller
Grant 9,024,657 - Andreev , et al. May 5, 2 | 2015-05-05 |
Via-configurable high-performance logic block involving transistor chains
Grant 8,957,398 - Andreev , et al. February 17, 2 | 2015-02-17 |
Via-configurable high-performance logic block architecture
Grant 8,735,857 - Andreev , et al. May 27, 2 | 2014-05-27 |
Temperature Controlled Structured ASIC Manufactured on a 28 NM CMOS Process Lithographic Node
App 20140105246 - Andreev; Alexander ; et al. | 2014-04-17 |
Digitally Controlled Delay Line for a Structured ASIC Having a Via Configurable Fabric for High-Speed Interface
App 20140103985 - Andreev; Alexander ; et al. | 2014-04-17 |
Architectural Floorplan for a Structured ASIC Manufactured on a 28 NM CMOS Process Lithographic Node or Smaller
App 20140103959 - Andreev; Alexander ; et al. | 2014-04-17 |
Microcontroller controlled or direct mode controlled network-fabric on a structured ASIC
Grant 8,677,306 - Andreev , et al. March 18, 2 | 2014-03-18 |
Via-Configurable High-Performance Logic Block Involving Transistor Chains
App 20140028348 - Andreev; Alexander ; et al. | 2014-01-30 |
Clock network fishbone architecture for a structured ASIC manufactured on a 28 NM CMOS process lithographic node
Grant 8,629,548 - Andreev , et al. January 14, 2 | 2014-01-14 |
Variable Node Processing Unit
App 20130254252 - Andreev; Alexander ; et al. | 2013-09-26 |
Variable node processing unit
Grant 8,443,033 - Andreev , et al. May 14, 2 | 2013-05-14 |
Circuits for implementing parity computation in a parallel architecture LDPC decoder
Grant 8,347,167 - Andreev , et al. January 1, 2 | 2013-01-01 |
Cryptographic Random Number Generator Using Finite Field Operations
App 20120278372 - Gribok; Sergey ; et al. | 2012-11-01 |
Scheme for erasure locator polynomial calculation in error-and-erasure decoder
Grant 8,286,060 - Panteleev , et al. October 9, 2 | 2012-10-09 |
Cryptographic random number generator using finite field operations
Grant 8,250,129 - Gribok , et al. August 21, 2 | 2012-08-21 |
Via-Configurable High-Performance Logic Block Architecture
App 20120161093 - Andreev; Alexander ; et al. | 2012-06-28 |
Configurable Reed-Solomon decoder based on modified Forney syndromes
Grant 8,181,096 - Andreev , et al. May 15, 2 | 2012-05-15 |
Methods and apparatus for programmable decoding of a plurality of code types
Grant 8,035,537 - Andreev , et al. October 11, 2 | 2011-10-11 |
Parallel LDPC Decoder
App 20110173510 - Andreev; Alexander ; et al. | 2011-07-14 |
Low Complexity LDPC Encoding Algorithm
App 20110099454 - Gribok; Sergey ; et al. | 2011-04-28 |
Parallel LDPC decoder
Grant 7,934,139 - Andreev , et al. April 26, 2 | 2011-04-26 |
Low complexity LDPC encoding algorithm
Grant 7,913,149 - Gribok , et al. March 22, 2 | 2011-03-22 |
Decision tree representation of a function
Grant 7,877,724 - Andreev , et al. January 25, 2 | 2011-01-25 |
Low area architecture in BCH decoder
Grant 7,823,050 - Gasanov , et al. October 26, 2 | 2010-10-26 |
Density driven layout for RRAM configuration module
Grant 7,818,703 - Andreev , et al. October 19, 2 | 2010-10-19 |
Circuits For Implementing Parity Computation In A Parallel Architecture Ldpc Decoder
App 20100162071 - Andreev; Alexander ; et al. | 2010-06-24 |
Pipelined LDPC arithmetic unit
Grant 7,739,575 - Andreev , et al. June 15, 2 | 2010-06-15 |
High performance tiling for RRAM memory
Grant 7,739,471 - Andreev , et al. June 15, 2 | 2010-06-15 |
Methods and apparatus for fast unbalanced pipeline architecture
Grant 7,667,494 - Andreev , et al. February 23, 2 | 2010-02-23 |
Variable Node Processing Unit
App 20100030835 - Andreev; Alexander ; et al. | 2010-02-04 |
Scheme For Erasure Locator Polynomial Calculation In Error-and-erasure Decoder
App 20100031127 - Panteleev; Pavel A. ; et al. | 2010-02-04 |
Methods And Apparatus For Programmable Decoding Of A Plurality Of Code Types
App 20090309770 - Andreev; Alexander ; et al. | 2009-12-17 |
Computational Architecture for Soft Decoding
App 20090287980 - Gribok; Sergey ; et al. | 2009-11-19 |
Decision Tree Representation of a Function
App 20090281969 - Andreev; Alexander ; et al. | 2009-11-12 |
Methods And Apparatus For Fast Unbalanced Pipeline Architecture
App 20090243657 - Andreev; Alexander ; et al. | 2009-10-01 |
Configurable Reed-solomon Decoder Based On Modified Forney Syndromes
App 20090158118 - Andreev; Alexander ; et al. | 2009-06-18 |
Built in self test transport controller architecture
Grant 7,546,505 - Gribok , et al. June 9, 2 | 2009-06-09 |
Multimode delay analysis for simplifying integrated circuit design timing models
Grant 7,512,918 - Andreev , et al. March 31, 2 | 2009-03-31 |
Cryptographic random number generator using finite field operations
App 20080320066 - Gribok; Sergey ; et al. | 2008-12-25 |
Memory timing model with back-annotating
Grant 7,415,686 - Andreev , et al. August 19, 2 | 2008-08-19 |
Pipelined Ldpc Arithmetic Unit
App 20080178057 - Andreev; Alexander ; et al. | 2008-07-24 |
Low Complexity LDPC Encoding Algorithm
App 20080168334 - Gribok; Sergey ; et al. | 2008-07-10 |
Low Area Architecture in BCH Decoder
App 20080155381 - Gasanov; Elyar E. ; et al. | 2008-06-26 |
Parallel LDPC Decoder
App 20080134008 - Andreev; Alexander ; et al. | 2008-06-05 |
Built in self test transport controller architecture
App 20080109688 - Gribok; Sergey ; et al. | 2008-05-08 |
RRAM controller built in self test memory
Grant 7,356,743 - Nikitin , et al. April 8, 2 | 2008-04-08 |
Density Driven Layout For Rram Configuration Module
App 20080016482 - Andreev; Alexander ; et al. | 2008-01-17 |
Density driven layout for RRAM configuration module
Grant 7,246,337 - Andreev , et al. July 17, 2 | 2007-07-17 |
Memory timing model with back-annotating
App 20070143648 - Andreev; Alexander ; et al. | 2007-06-21 |
High performance tiling for RRAM memory
App 20070091105 - Andreev; Alexander ; et al. | 2007-04-26 |
RRAM controller built in self test memory
App 20070091702 - Nikitin; Andrey ; et al. | 2007-04-26 |
RRAM flipflop rcell memory generator
Grant 7,193,905 - Andreev , et al. March 20, 2 | 2007-03-20 |
Multimode delay analyzer
App 20070044053 - Andreev; Alexander ; et al. | 2007-02-22 |
Density driven layout for RRAM configuration module
App 20060123373 - Andreev; Alexander ; et al. | 2006-06-08 |
RRAM backend flow
Grant 7,028,274 - Andreev , et al. April 11, 2 | 2006-04-11 |
Method and apparatus for formula area and delay minimization
Grant 6,587,990 - Andreev , et al. July 1, 2 | 2003-07-01 |
Method and apparatus for minimization of net delay by optimal buffer insertion
Grant 6,519,746 - Andreev , et al. February 11, 2 | 2003-02-11 |
Wire routing optimization
Grant 6,412,102 - Andreev , et al. June 25, 2 | 2002-06-25 |
Modifying Timing Graph To Avoid Given Set Of Paths
App 20010020289 - PAVISIC, IVAN ; et al. | 2001-09-06 |
Metal layer assignment
Grant 6,182,272 - Andreev , et al. January 30, 2 | 2001-01-30 |
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