LED electronic clock

Yu April 6, 2

Patent Grant D915222

U.S. patent number D915,222 [Application Number D/684,207] was granted by the patent office on 2021-04-06 for led electronic clock. This patent grant is currently assigned to FUZHOU ESUN ELECTRONIC CO., LTD. The grantee listed for this patent is FUZHOU ESUN ELECTRONIC CO., LTD. Invention is credited to Guo Yu.


United States Patent D915,222
Yu April 6, 2021

LED electronic clock

Claims

CLAIM The ornamental design for an LED electronic clock, as shown and described.
Inventors: Yu; Guo (Fuzhou, CN)
Applicant:
Name City State Country Type

FUZHOU ESUN ELECTRONIC CO., LTD

Fuzhou

N/A

CN
Assignee: FUZHOU ESUN ELECTRONIC CO., LTD (Fuzhou, CN)
Appl. No.: D/684,207
Filed: March 19, 2019

Foreign Application Priority Data

Feb 18, 2019 [CN] 201930067661.X
Current U.S. Class: D10/15
Current International Class: 1001
Field of Search: ;D10/1-5,14-15,24,26,52-53 ;D14/168,170-171,172,188

References Cited [Referenced By]

U.S. Patent Documents
D237742 November 1975 Miyamoto
D409499 May 1999 Hargrove, III
D449589 October 2001 Ishibashi
D514546 February 2006 Chan
D538680 March 2007 Chan
D634131 March 2011 Utsunomiya
D637822 May 2011 Utsunomiya
D695705 December 2013 Shimizu
D820114 June 2018 Hu
D828184 September 2018 Hu
D853860 July 2019 Bai
D875553 February 2020 Yu
D875554 February 2020 Bai
D881023 April 2020 Hu

Other References

Elegiant Alarm Clocks for Bedrooms with FM Radio | amazon.com date first listed Sep. 2019 [online]. .COPYRGT. 1996-2020, Amazon.com, Inc [retrieved Dec. 3, 2020] from Internet: <https://www.amazon.com/ELEGIANT-Bedrooms-Charging-Brightness-Automati- c/dp/B07YFTHNNZ> (Year: 2019). cited by examiner.

Primary Examiner: Snapp; Sandra
Assistant Examiner: Glennon; Katherine
Attorney, Agent or Firm: Westbridge IP LLC

Description



FIG. 1 is a perspective view of an LED electronic clock showing my new design;

FIG. 2 is a front elevational view thereof;

FIG. 3 is a rear elevational view thereof;

FIG. 4 is a left side elevational view thereof;

FIG. 5 is a right side elevational view thereof;

FIG. 6 is a top plan view thereof; and,

FIG. 7 is a bottom plan view thereof.

The broken lines in the drawings depict portions of the LED electronic clock that form no part of the claimed design.

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References

Patent Diagrams and Documents

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