Electronic device

Sharma , et al. Fe

Patent Grant D874456

U.S. patent number D874,456 [Application Number D/591,964] was granted by the patent office on 2020-02-04 for electronic device. This patent grant is currently assigned to Intel Corporation. The grantee listed for this patent is Intel Corporation. Invention is credited to Gadi Amit, Daniel Clifton, Chadwick Harber, Yoshikazu Hoshino, Philip J. Houdek, II, Nathan Isaiah Jauvtis, Stanislav Moiseyenko, Douglas Satzger, Sameer Sharma.


United States Patent D874,456
Sharma ,   et al. February 4, 2020

Electronic device

Claims

CLAIM The ornamental design for an electronic device, as shown and described.
Inventors: Sharma; Sameer (Santa Clara, CA), Satzger; Douglas (Menlo Park, CA), Amit; Gadi (San Mateo, CA), Hoshino; Yoshikazu (San Francisco, CA), Harber; Chadwick (San Francisco, CA), Clifton; Daniel (San Francisco, CA), Houdek, II; Philip J. (San Jose, CA), Moiseyenko; Stanislav (Mountain View, CA), Jauvtis; Nathan Isaiah (San Francisco, CA)
Applicant:
Name City State Country Type

Intel Corporation

Santa Clara

CA

US
Assignee: Intel Corporation (Santa Clara, CA)
Family ID: 51529068
Appl. No.: D/591,964
Filed: January 25, 2017

Related U.S. Patent Documents

Application Number Filing Date Patent Number Issue Date
15405985 Jan 13, 2017
14930124 Jan 17, 2017 9548576
13839448 Nov 3, 2015 9176537

Current U.S. Class: D14/318
Current CPC Class: H01R24/58 20130101; G06F1/1679 20130101; G06F1/1681 20130101; G06F21/31 20130101; H01R43/16 20130101; G06F1/1637 20130101; G06F1/1656 20130101; G06F1/1662 20130101; G06F1/189 20130101; G06F1/1633 20130101; G06F1/1669 20130101; G06F1/1683 20130101; G06F1/1616 20130101; H01R2107/00 20130101; E05D11/0081 20130101; E05Y2900/606 20130101; E05D7/00 20130101
Current International Class: 1402
Field of Search: ;D14/315-327,389 ;D18/1,2,7,11 ;235/145A,145R ;341/22,23 ;345/104,156,168,169,173 ;361/679.08,679.09,679.11,679.26,679.27

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Primary Examiner: Pratt; Michael A.
Attorney, Agent or Firm: Patent Capital Group

Description



FIG. 1 is an isometric perspective view of an electronic device with the electronic device in a first configuration, according to an embodiment; and,

FIG. 2 is an isometric perspective view of an electronic device with the electronic device in a second configuration, according to the embodiment.

The broken lines and the unshaded regions bounded by broken lines of the preceding FIGURES illustrate boundaries for the FIGURES; however, the broken lines and the unshaded regions bounded by broken lines form no part of the claimed design. Non-oblique line shading is meant to show contour and not surface ornamentation.

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References

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