Electronics enclosure

Krivonak , et al. Ja

Patent Grant D873228

U.S. patent number D873,228 [Application Number D/574,118] was granted by the patent office on 2020-01-21 for electronics enclosure. This patent grant is currently assigned to Transportation Holdings, LLC. The grantee listed for this patent is Transportation IP Holdings, LLC. Invention is credited to Michael Grutkowski, Andrew Louis Krivonak, Shreenath Shekar Perlaguri, Arunpandi Radhakrishnan, Brian Magann Rush, Naveenan Thiagarajan, Rajendra Yammanuru.


United States Patent D873,228
Krivonak ,   et al. January 21, 2020

Electronics enclosure

Claims

CLAIM The ornamental design for an electronics enclosure, as shown and described.
Inventors: Krivonak; Andrew Louis (Erie, PA), Perlaguri; Shreenath Shekar (Bangalore, IN), Rush; Brian Magann (Niskayuna, NY), Yammanuru; Rajendra (Bangalore, IN), Grutkowski; Michael (Erie, PA), Thiagarajan; Naveenan (Latham, NY), Radhakrishnan; Arunpandi (Bangalore, IN)
Applicant:
Name City State Country Type

Transportation IP Holdings, LLC

Norwalk

CT

US
Assignee: Transportation Holdings, LLC (Norwalk, CT)
Appl. No.: D/574,118
Filed: August 12, 2016

Current U.S. Class: D13/184
Current International Class: 1303
Field of Search: ;D13/123,158,162,184,199,110,124,137.1

References Cited [Referenced By]

U.S. Patent Documents
D465465 November 2002 Chapman
D747683 January 2016 Krivonak
D777665 January 2017 Krivonak
D777666 January 2017 Krivonak
D802582 November 2017 Krivonak et al.
D805473 December 2017 Montgomery
D843996 March 2019 Krivonak
D853331 July 2019 Bradley
D854499 July 2019 Lilja
2007/0081306 April 2007 Wong
2017/0112018 April 2017 Krivonak et al.
2017/0112020 April 2017 Krivonak
2018/0049307 February 2018 de Bock

Other References

Design U.S. Appl. No. 29/614,800, filed Aug. 23, 2017 (divisional of U.S. Pat. No. D. 802,582 noted above). cited by applicant.

Primary Examiner: Hallmark; Janice
Assistant Examiner: Blackwell, II; Harold E
Attorney, Agent or Firm: McCoy Russell LLP

Description



FIG. 1 is a perspective view of an electronics enclosure depicting a new design;

FIG. 2 is a front view thereof;

FIG. 3 is a back view thereof;

FIG. 4 is a side view thereof;

FIG. 5 is an opposite side view thereof;

FIG. 6 is a top plan view thereof;

FIG. 7 is a bottom plan view thereof; and,

FIG. 8 is an additional perspective view thereof.

The broken line portion of the figure drawings is included to show unclaimed subject matter only and forms no part of the claimed design.

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Patent Diagrams and Documents

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