Electronics enclosure

Vincent , et al. June 11, 2

Patent Grant D684129

U.S. patent number D684,129 [Application Number D/422,054] was granted by the patent office on 2013-06-11 for electronics enclosure. This patent grant is currently assigned to GE Intelligent Platforms, Inc. The grantee listed for this patent is Kenneth Wayne Crawford, Vinson R. Epperson, Laith Anthony Vincent. Invention is credited to Kenneth Wayne Crawford, Vinson R. Epperson, Laith Anthony Vincent.


United States Patent D684,129
Vincent ,   et al. June 11, 2013

Electronics enclosure

Claims

CLAIM The ornamental design for an electronics enclosure, as shown and described.
Inventors: Vincent; Laith Anthony (Charlottesville, VA), Crawford; Kenneth Wayne (Charlottesville, VA), Epperson; Vinson R. (Ruckersville, VA)
Applicant:
Name City State Country Type

Vincent; Laith Anthony
Crawford; Kenneth Wayne
Epperson; Vinson R.

Charlottesville
Charlottesville
Ruckersville

VA
VA
VA

US
US
US
Assignee: GE Intelligent Platforms, Inc (Charlottesville, VA)
Appl. No.: D/422,054
Filed: May 16, 2012

Current U.S. Class: D13/184
Current International Class: 1303
Field of Search: ;D14/300,301,308,314,348,349-356,358 ;D13/162,184,199 ;312/223.1-223.2 ;360/99.01-99.12 ;369/34.01,36.01 ;361/679.01,679.6,679.22 ;345/173

References Cited [Referenced By]

U.S. Patent Documents
6933928 August 2005 Lilienthal
D512059 November 2005 Zhang et al.
D520519 May 2006 Chin et al.
D563994 March 2008 Liu et al.
D580933 November 2008 Ju et al.
D594876 June 2009 Hwang
D618232 June 2010 O'Neil et al.
D620953 August 2010 Andre et al.
D624912 October 2010 Chen et al.
2008/0062636 March 2008 Liu
Primary Examiner: Nunn; Freda S
Attorney, Agent or Firm: Global Patent Operation Conklin; Mark A.

Description



FIG. 1 is a perspective view of our design;

FIG. 2 is a top plan view of the embodiment of FIG. 1;

FIG. 3 is a side elevational view of the embodiment of FIG. 1, the opposite side being a mirror image thereof;

FIG. 4 is a front elevational view of the embodiment of FIG. 1;

FIG. 5 is a back view of the embodiment of FIG. 1;

FIG. 6 is a perspective view of a second embodiment of our design;

FIG. 7 is a top plan view of the embodiment of FIG. 6;

FIG. 8 is a side elevational view of the embodiment of FIG. 6, the opposite side being a mirror image thereof;

FIG. 9 is a front view of the embodiment of FIG. 6;

FIG. 10 is a back view of the embodiment of FIG. 6;

FIG. 11 is a perspective view of a third embodiment of our design;

FIG. 12 is a top plan view of the embodiment of FIG. 11;

FIG. 13 is a side elevational view of the embodiment of FIG. 11, the opposite side being a mirror image thereof;

FIG. 14 is a front view of the embodiment of FIG. 11;

FIG. 15 is a back view of the embodiment of FIG. 11; and,

FIG. 16 is a bottom view of the embodiment of FIG. 11.

Broken lines shown in the drawings illustrate portions of the electronics enclosure, and form no part of the claimed design.

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