Input/output module

Kaluza September 9, 2

Patent Grant D576562

U.S. patent number D576,562 [Application Number D/274,145] was granted by the patent office on 2008-09-09 for input/output module. This patent grant is currently assigned to IFM Electronic GmbH. Invention is credited to Georg Kaluza.


United States Patent D576,562
Kaluza September 9, 2008

Input/output module

Claims

CLAIM I claim the ornamental design for an input/output module, as shown and described.
Inventors: Kaluza; Georg (Velbert, DE)
Assignee: IFM Electronic GmbH (Essen, DE)
Appl. No.: D/274,145
Filed: March 30, 2007

Current U.S. Class: D13/162
Current International Class: 1303
Field of Search: ;D13/110,123,147,151,158-177,184 ;D14/240,433,434,356-358 ;361/686 ;439/639,271,535,652,715-716,736

References Cited [Referenced By]

U.S. Patent Documents
D425483 May 2000 Bechtold et al.
6123585 September 2000 Hussong et al.
D433998 November 2000 Ishitsuka et al.
D443586 June 2001 Sakasegawa
6475036 November 2002 Morikawa
6527599 March 2003 Bechtold et al.
6634910 October 2003 Lieb et al.
D492292 June 2004 Ogren
6860757 March 2005 Herrnring et al.
6916194 July 2005 Sichner et al.
D517020 March 2006 Cook et al.
D544836 June 2007 Sichner et al.

Other References

US. Appl. No. 29/274,143 to Kaluza., filed Mar. 30, 2007. cited by other .
U.S. Appl. No. 29/274,148 to Kaluza., filed Mar. 30, 2007. cited by other .
U.S. Appl. No. 29/274,147 to Kaluza., filed Mar. 30, 2007. cited by other.

Primary Examiner: Bui; Daniel
Assistant Examiner: Johannes; Thomas J
Attorney, Agent or Firm: Greenblum & Bernstein, P.L.C.

Description



FIG. 1 is a front perspective view of an input/output module, showing my new design:

FIG. 2 is a front elevational view of the input/output module of FIG. 1;

FIG. 3 is a rear elevational view of the input/output module of FIG. 1;

FIG. 4 is a left side elevational view of the input/output module of FIG. 1;

FIG. 5 is a right side elevational view of the input/output module of FIG. 1;

FIG. 6 is a top plan view of the input/output module of FIG. 1; and,

FIG. 7 is a bottom plan view of the input/output module of FIG. 1.

The broken line showing in the figure drawings is included for illustrative purposes only and forms no part of the claimed design.

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