U.S. patent number 8,928,650 [Application Number 13/519,344] was granted by the patent office on 2015-01-06 for display panel and 3d display device.
This patent grant is currently assigned to Optoelectronics Technology Co., Ltd. The grantee listed for this patent is Chih-Wen Chen, Chia-chiang Hsiao, Qiaosheng Liao. Invention is credited to Chih-Wen Chen, Chia-chiang Hsiao, Qiaosheng Liao.
United States Patent |
8,928,650 |
Liao , et al. |
January 6, 2015 |
Display panel and 3D display device
Abstract
The present invention provides a display panel and a 3D display
device. The display panel comprising: a first substrate comprising
multiple data lines, multiple scan lines, and multiple pixel units,
wherein the pixel unit comprising three sub-pixel units, and each
of the sub-pixel units electrically connects to the same data line
sequentially, and each of the sub-pixel units electrically connects
to the corresponding scan line, and the scan line corresponding to
at least one of the sub-pixel unit and the scan line corresponding
to the first sub-pixel unit of the adjacent next pixel unit are
disposed side by side; and a second substrate disposed
correspondingly to the first substrate and comprising a first black
matrix disposed correspondingly to the scan lines. In the present
invention, the scan lines corresponding to the multiple sub-pixels
are disposed side by side such that increasing the width of the
first black matrix between adjacent pixel units and vertical
viewing angle and do not reduce the aperture ratio.
Inventors: |
Liao; Qiaosheng (Guangdong,
CN), Hsiao; Chia-chiang (Guangdong, CN),
Chen; Chih-Wen (Guandong, CN) |
Applicant: |
Name |
City |
State |
Country |
Type |
Liao; Qiaosheng
Hsiao; Chia-chiang
Chen; Chih-Wen |
Guangdong
Guangdong
Guandong |
N/A
N/A
N/A |
CN
CN
CN |
|
|
Assignee: |
Optoelectronics Technology Co.,
Ltd (Shenzhen, Guangdong, CN)
|
Family
ID: |
49379665 |
Appl.
No.: |
13/519,344 |
Filed: |
April 26, 2012 |
PCT
Filed: |
April 26, 2012 |
PCT No.: |
PCT/CN2012/074708 |
371(c)(1),(2),(4) Date: |
June 27, 2012 |
PCT
Pub. No.: |
WO2013/155731 |
PCT
Pub. Date: |
October 24, 2013 |
Prior Publication Data
|
|
|
|
Document
Identifier |
Publication Date |
|
US 20130278582 A1 |
Oct 24, 2013 |
|
Foreign Application Priority Data
|
|
|
|
|
Apr 20, 2012 [CN] |
|
|
2012 1 0118945 |
|
Current U.S.
Class: |
345/212;
345/204 |
Current CPC
Class: |
G02B
30/25 (20200101); G09G 5/02 (20130101); G09G
5/00 (20130101); H04N 13/337 (20180501); G09G
2300/0452 (20130101); G09G 2320/028 (20130101); H04N
13/324 (20180501); G09G 2300/0426 (20130101) |
Current International
Class: |
G06F
3/038 (20130101) |
Field of
Search: |
;345/87-100,204-215 |
References Cited
[Referenced By]
U.S. Patent Documents
Primary Examiner: Shankar; Vijay
Attorney, Agent or Firm: Cheng; Andrew C.
Claims
What is claimed is:
1. A display panel comprising: a first substrate comprising
multiple data lines disposed parallel and alternately, multiple
scan lines disposed perpendicular to the direction of the data
lines, and multiple pixel units disposed as a matrix, wherein the
pixel units comprising a first sub-pixel unit, a second sub-pixel
unit, and a third sub-pixel, wherein the sub-pixel units
electrically connects to the same data line sequentially, and each
of the sub-pixel units electrically connects to the corresponding
scan line, and the scan line corresponding to the second sub-pixel
unit, the scan line corresponding to the third sub-pixel unit, and
the scan line corresponding to the first sub-pixel unit of the next
pixel unit are disposed side by side; and a second substrate
disposed correspondingly to the first substrate and comprising a
first black matrix disposed correspondingly to the scan lines of
the first substrate and a second black matrix disposed
correspondingly above the boundary region between the first
sub-pixel unit and the second sub-pixel unit, wherein the width of
the first black matrix is greater than the width of the scan line,
and the width of the second black matrix is less than the width of
the first black matrix.
2. The display panel according to claim 1, wherein the three scan
lines are disposed side by side by jump line method.
3. A display panel comprising: a first substrate comprising
multiple data lines disposed parallel and alternately, multiple
scan lines disposed perpendicular to the direction of the data
lines, and multiple pixel units disposed as a matrix, wherein the
pixel unit comprising three sub-pixel units, and each of the
sub-pixel units electrically connects to the same data line
sequentially, and each of the sub-pixel units electrically connects
to the corresponding scan line, and the scan line corresponding to
at least one of the sub-pixel unit and the scan line corresponding
to the first sub-pixel unit of the adjacent next pixel unit are
disposed side by side; and a second substrate disposed
correspondingly to the first substrate and comprising a first black
matrix disposed correspondingly to the scan lines.
4. The display panel according to claim 3, wherein the display
panel further comprising: a gate driver connected to the scan lines
for providing a scanning voltage to the multiple sub-pixel units;
and a source driver connected to the data lines for providing a
driving voltage to the multiple sub-pixel units.
5. The display panel according to claim 3, wherein the sub-pixel
unit comprising a pixel electrode and a thin film transistor for
driving the sub-pixel, wherein the gate, the source, and the drain
of the thin film transistor are electrical connected to the scan
line, the data line, and the pixel electrode respectively.
6. The display panel according to claim 3, wherein, the pixel unit
comprising a first sub-pixel, a second sub-pixel unit and a third
sub-pixel unit disposed sequentially along the direction of the
data lines, wherein the scan line corresponding to the third
sub-pixel closest to the next pixel unit and the scan line
corresponding to the first sub-pixel unit of the next pixel unit
are disposed side by side.
7. The display panel according to claim 6, wherein the second
substrate further comprising a second black matrix, wherein the
second black matrix is disposed correspondingly above the boundary
region between the second sub-pixel unit and the third sub-pixel
unit, and the width of the second black matrix is less than the
width of the first black matrix.
8. The display panel according to claim 7, wherein, the scan line
corresponding to the second sub-pixel unit, the scan line
corresponding to the third sub-pixel unit, and the scan line
corresponding to the first sub-pixel unit of the next pixel are
disposed side by side.
9. The display panel according to claim 8, wherein, the second
black matrix is disposed correspondingly above the boundary region
between the second sub-pixel unit and the third sub-pixel unit.
10. The display panel according to claim 8, wherein, the three scan
lines realize side-by-side disposition by jump line method.
11. The display panel according to claim 3, wherein, the width of
the first black matrix is greater than the width of the scan line.
Description
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a three-dimensional (3D) display
area and, more particularly, to a display panel and a
three-dimensional (3D) display device.
2. Description of Related Art
The current arrangement of pixels of the display panel includes a
horizontal type and a vertical (the Tri-gate) type. In the
horizontal type, sub-pixel units (RGB sub-pixel) are horizontally
arranged. In the vertical type, the sub-pixel units are vertically
arranged. FIG. 1 shows the schematic drawing of a display panel of
the vertical type. The following uses one pixel structure as
example for description. As shown in FIG. 1, the display device
includes the relative disposition of the thin film transistor
substrate and a color filter substrate. Multiple scan lines G1, G2,
G3, and G4, and multiple data lines D1 and D2 are disposed on the
thin-film transistor substrate, and the multiple scan lines G1, G2,
G3, and G4, and the multiple data lines D1 and D2 are cross to
define RGB sub-pixel units. The color filter substrate is disposed
above the thin film transistor substrate, and a black matrix (BM)
layer B1, B2, B3, and B4 are disposed on the color filter
substrate. Each black matrix layer B1, B2, B3, and B4 is
correspondingly disposed above the scan lines G1, G2, G3, and G4
for separate the color crosstalk of the sub-pixels.
Comparing to the horizontal type, the vertical type shown in FIG. 1
can reduce the numbers of the source drivers (Source ICs) which are
more expensive component of the display panel, savings cost.
Therefore, the display panels with the vertical type are more
popular in 3D display device application.
The three-dimensional display method of today's mainstream is using
a polarized glasses with phase difference plate technology. FIG. 2
is a schematic diagram of the basic operating principle in existing
technology. The operating principle is attaching a phase difference
plate 202 on the light emitting direction of the display panel 201
and using phase delay of different regions on the phase difference
plate 202 such that lights of different pixels emit by different
polarization directions. Therefore, the viewer wearing a polarized
glasses 204 can observe a 3D image.
However, due to the image crosstalk between the signals of left and
right eye, the 3D display technology using phase difference plate
exist the drawback of smaller vertical viewing angle.
Specifically, as shown in FIG. 2, the distance between the panel
201 and the phase difference plate 202 is h. The following uses
three pixels in the display area of the display panel 201 for
example. The black matrix 214 area is between odd-row pixels
211,213 and even-row pixel 212. Letter a is the height of the pixel
display area and letter b is the width of the black matrix 214 in
the vertical direction, and letter c is the height of the phase
delay fringes of the phase plate 202, wherein, p=a+b, and p is a
fixed value for the pixel size. The non-cross-talk display area 203
in the figure is the vertical viewing angle .theta. and satisfies
the following relationship:
.times..theta..times..times..times..times..times..times..times.
##EQU00001##
From the relationship formula 1, increasing the width b of the
black matrix can increase the vertical viewing angle .theta., but
will reduce the height of a pixel display area, a, thereby reducing
the aperture ratio of the display panel.
In summary, it is necessary to provide a display panel and a 3D
display device for solving the problem of existing technology that
is increasing the width of the shading layer (BM) to increase the
vertical viewing angle, but reducing the aperture ratio.
SUMMARY OF THE INVENTION
The main technical problems solving by the present invention is to
provide a display panel and a 3D display device, in order to solve
the problems with increasing the width of the shading layer (BM) to
increase the vertical viewing angle, but also reducing the aperture
ratio in the prior art.
In order to solve these technical problems, technical solution used
in this invention is: to provide a display panel comprising:
a first substrate comprising multiple data lines disposed parallel
and alternately, multiple scan lines disposed perpendicular to the
direction of the data lines, and multiple pixel units disposed as a
matrix, wherein the pixel units comprising a first sub-pixel unit,
a second sub-pixel unit, and a third sub-pixel, wherein the
sub-pixel units electrically connects to the same data line
sequentially, and each of the sub-pixel units electrically connects
to the corresponding scan line, and the scan line corresponding to
the second sub-pixel unit, the scan line corresponding to the third
sub-pixel unit, and the scan line corresponding to the first
sub-pixel unit of the next pixel unit are disposed side by side;
and
a second substrate disposed correspondingly to the first substrate
and comprising a first black matrix disposed correspondingly to the
scan lines of the first substrate and a second black matrix
disposed correspondingly above the boundary region between the
first sub-pixel unit and the second sub-pixel unit, wherein the
width of the first black matrix is greater than the width of the
scan line, and the width of the second black matrix is less than
the width of the first black matrix.
Wherein, the three scan lines are disposed side by side by jump
line method.
Another technical solution used to solve these technical problems,
the present invention is: to provide a display panel, the display
panel include: a first substrate comprising multiple data lines
disposed parallel and alternately, multiple scan lines disposed
perpendicular to the direction of the data lines, and multiple
pixel units disposed as a matrix,
wherein the pixel units comprising three sub-pixel units, and each
of the sub-pixel units electrically connects to the same data line
sequentially, and each of the sub-pixel units electrically connects
to the corresponding scan line, and the scan line corresponding to
at least one of the sub-pixel unit and the scan line corresponding
to the first sub-pixel unit of the adjacent next pixel unit are
disposed side by side; and
a second substrate disposed correspondingly to the first substrate
and comprising a first black matrix disposed correspondingly to the
scan lines.
Wherein, the display panel further comprising: a gate driver
connected to the scan lines for providing a scanning voltage to the
multiple sub-pixel units; and a source driver connected to the data
lines for providing a driving voltage to the multiple sub-pixel
units.
Wherein, the sub-pixel unit comprising a pixel electrode and a thin
film transistor for driving the sub-pixel, wherein the gate, the
source, and the drain of the thin film transistor are electrical
connected to the scan line, the data line, and the pixel electrode
respectively.
Wherein, the pixel unit comprising a first sub-pixel, a second
sub-pixel unit and a third sub-pixel unit disposed sequentially
along the direction of the data lines, wherein the scan line
corresponding to the third sub-pixel closest to the next pixel unit
and the scan line corresponding to the first sub-pixel unit of the
next pixel unit are disposed side by side.
Wherein, the second substrate further comprising a second black
matrix, wherein the second black matrix is disposed correspondingly
above the boundary region between the second sub-pixel unit and the
third sub-pixel unit, and the width of the second black matrix is
less than the width of the first black matrix.
Wherein, the scan line corresponding to the second sub-pixel unit,
the scan line corresponding to the third sub-pixel unit, and the
scan line corresponding to the first sub-pixel unit of the next
pixel are disposed side by side.
Wherein, the second black matrix is disposed correspondingly above
the boundary region between the second sub-pixel unit and the third
sub-pixel unit.
Wherein, the three scan lines realize side-by-side disposition by
jump line method.
Wherein, the width of the first black matrix is greater than the
width of the scan line.
Another technical solution used to solve these technical problems
is: providing a 3D display device, the 3D display device
comprising: a display panel; and
a phase difference plate disposed at the light emitting direction
of the display panel and disposed parallel and alternately with the
display panel.
Wherein, the display comprising:
a first substrate comprising multiple data lines disposed parallel
and alternately, multiple scan lines disposed perpendicular to the
direction of the data lines, and multiple pixel units disposed as a
matrix,
Wherein, the pixel units comprising three sub-pixel units, and each
of the sub-pixel units electrically connects to the same data line
in order, and each of the sub-pixel units electrically connects to
the corresponding scan line, and the scan line corresponding to at
least one of the sub-pixel unit and the scan line corresponding to
the first sub-pixel unit of the adjacent next pixel unit are
disposed side by side; and
a second substrate disposed correspondingly to the first substrate
and comprising a first black matrix disposed correspondingly to the
scan lines.
Wherein, the display panel further comprising: a gate driver
connected to the scan lines for providing a scanning voltage to the
multiple sub-pixel units; and a source driver connected to the data
lines for providing a driving voltage to the multiple sub-pixel
units.
Wherein, the sub-pixel unit comprising a pixel electrode and a thin
film transistor for driving the sub-pixel, wherein the gate, the
source, and the drain of the thin film transistor are electrical
connected to the scan line, the data line and the pixel electrode
respectively.
Wherein, the pixel unit comprising a first sub-pixel, a second
sub-pixel unit and a third sub-pixel unit disposed sequentially
along the direction of the data line, wherein the scan line
corresponding to the third sub-pixel closest to the next pixel unit
and the scan line corresponding to the first sub-pixel unit of the
next pixel unit are disposed side by side.
Wherein, the second substrate further comprising a second black
matrix, wherein the second black matrix is disposed correspondingly
above the boundary region between the second sub-pixel unit and the
third sub-pixel unit, and the width of the second black matrix is
less than the width of the first black matrix.
Wherein, the scan line corresponding to the second sub-pixel unit,
the scan line corresponding to the third sub-pixel unit, and the
scan line corresponding to the first sub-pixel unit of the next
pixel are disposed side by side.
Wherein, the second black matrix is disposed correspondingly above
the boundary region between the second sub-pixel unit and the third
sub-pixel unit.
Wherein, the three scan lines realize side-by-side disposition by
jump line method.
Wherein, the width of the first black matrix is greater than the
width of the scan line.
The beneficial effects of the present invention are: In the present
invention, the scan lines corresponding to multiple sub-pixels are
disposed side by side such that increasing the width of the first
black matrix between adjacent pixel units and vertical viewing
angle and do not reduce the aperture ratio.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a schematic drawing of display panel with Tri-gate pixel
structure in the prior art;
FIG. 2 is a schematic drawing of the three-dimensional display in
the prior art;
FIG. 3 is a schematic drawing of 3D display device structure of the
present invention;
FIG. 4 is a schematic drawing of the display panel structure of the
first embodiment of the present invention;
FIG. 5 is a part enlargement schematic drawing of the panel in FIG.
4;
FIG. 6 is a schematic drawing of the first substrate of display
panel in FIG. 5;
FIG. 7 is a schematic drawing of BM layer on the second substrate
of the display panel shown in FIG. 5;
FIG. 8 is a schematic drawing of the display panel structure of the
second embodiment of the present invention;
FIG. 9 is a schematic drawing of the first substrate of display
panel in FIG. 8;
FIG. 10 is a schematic drawing of BM layer on the second substrate
of the display panel shown in FIG. 8.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
The following combines drawings and embodiments for detailed
description of the present invention.
FIG. 3 is a schematic drawing of 3D display device structure of the
present invention. As shown in FIG. 3, the 3D display device
includes a display panel 31 and the phase difference plate 32.
In the present invention, the phase difference plate 32 is disposed
at the side of light emitting direction of the display panel 31 and
disposed parallel and alternately with the display panel 31. It
should be noted that the 3D device is suitable for the observer
wearing a glasses 33 with two polarization direction orthogonal
lens.
Wherein, the display panel 31 is preferably having a vertical pixel
structure. FIG. 4 is a schematic drawing of the display panel
having tri-gate pixel structure of the first embodiment of the
present invention.
As shown in FIG. 4, the display panel 31 includes multiple RGB
pixel units distributed as a matrix, and multiple data lines D1,
D2, . . . , and DN disposed parallel and alternately, and multiple
scan lines G1, G2, and GL disposed perpendicular to the direction
of the data lines.
Wherein, each RGB pixel unit includes three R, G, B sub-pixel units
sequentially electrically connected with the same data line.
Multiple scan lines, G1, G2, . . . , and GL, connected to a gate
driver 41. Multiple data lines, D1, D2, . . . , and DN, connected
to a source driver 42. The gate driver 41 provides a scanning
voltage to multiple R, G, B sub-pixel units, and the source driver
42 provides a driving voltage to the multiple R, G and B sub-pixel
units.
In the present invention, the display panel including a first
substrate and a second substrate relative disposed. Because each
RGB pixel unit of the display panel is similar, the following
description uses one RGB pixel unit for example.
FIG. 5 is a part enlargement schematic drawing of the display panel
in FIG. 4, and FIG. 6 is a schematic drawing of the first substrate
of display panel in FIG. 5.
Specifically, as shown in FIG. 5 and FIG. 6, each RGB pixel unit 61
on the first substrate includes: a data line 615; three scan lines,
611, 612, and 613; and a first sub-pixel unit 601, a second
sub-pixel unit 602, and a third pixel unit 603.
In this embodiment, the data line 615 and a data line 616 are
disposed parallel and alternatively, and the scan lines, 611,612,
and 613 are disposed sequentially perpendicular to the data lines
615.
The first sub-pixel unit 601, the second sub-pixel unit 602, and
the third pixel unit 603 sequentially electrically connected to the
same data line 615 to control the display of red, green, and blue,
respectively.
Wherein, each of the sub-pixel units electrically connects to the
corresponding scan line, that is:
The first sub-pixel unit 601 electrically connects to the scan line
611, and the second sub-pixel unit 602 electrically connects to
scan line 612, and the third sub-pixel unit 603 electrically
connects to the scan line 613. The scan line 613 which is
corresponding to the third sub-pixel unit 603 closest to the next
pixel unit and the scan line 614 which is corresponding to the
first sub-pixel unit 604 of the next pixel unit are disposed
parallel and alternatively.
In this embodiment, each sub-pixel unit includes a pixel electrode
and a thin film transistor, that is:
The first sub-pixel unit 601 includes a pixel electrode 601a and a
thin-film transistor Ta; second sub-pixel unit 602 includes a pixel
electrode 602b and a thin film transistor Tb; the third sub-pixel
unit 603 includes a pixel electrode 603c and a thin film transistor
Tc
Wherein, the gate a1 of the thin film transistor Ta is electrical
connected to the scan line 611; the source a2 is electrical
connected data lines 615; the drain a3 is electrical connected to
the pixel electrode 601a.
The gate b1 of thin-film transistor Tb is electrically connected to
the scan line 612; the source b2 is electrically connected to the
data lines 615; the drain b3 is electrically connected to the pixel
electrode 602b.
The gate c1 of thin-film transistor Tc is electrically connected to
the scan line 613; the source c2 is electrically connected to the
data lines 615; the drain c3 is electrically connected to the pixel
electrode 603c.
It should be noted that the thin-film transistors, Ta, Tb, and Tc,
are used to drive the pixel electrodes, 601a, 602b, and 603c.
FIG. 7 is a schematic drawing of BM layer on the second substrate
of the display panel shown in FIG. 5. As shown in FIG. 7, the
second substrate includes a first black matrix 71 and a second
black matrix 72.
In this embodiment, the first black matrix 71 is disposed
correspondingly above the scan lines 611, 612, and 613, and the
width of the first black matrix 71 is greater than the width of the
scan lines 611, 612, and 613. The second black matrix 72 is
disposed correspondingly above the boundary region between the
second sub-pixel unit 602 and the third sub-pixel unit 603. It
should be noted that the width of the second black matrix 72 is
less than the width of the first black matrix 71.
In this embodiment, comparing the first black matrix 71 between two
adjacent pixel units on the second substrate and the black matrix
in the prior art shown in FIG. 1, the width of the first black
matrix 71 is increased to double. Combining the schematic drawing
of the three-dimensional display in the prior art shown in FIG. 2,
the width b of the first black matrix 71 is increased to double in
this embodiment; thus, in combination of the aforementioned
relationship formula 1, the display panel of the present invention
can increase the vertical view angle .theta. of the 3D display
device.
Furthermore, comparing the multiple sub-pixel units and pixel units
in this embodiment to the prior art shown in FIG. 1, the value of
height a of the pixel display area does not change, that is: under
the premise of improving the vertical view angle .theta. does not
reduce the aperture ratio of the display panel.
FIG. 8 is a schematic drawing of the display panel of the second
embodiment of the present invention. In this embodiment, on the
basis of the embodiment shown in FIG. 5, three scan lines are
disposed side by side such that the width the black matrix between
the adjacent pixel units on the color filter substrate increased by
approximately double. Therefore, the display panel of the 3D
display device using the display panel further increases the
vertical view angle .theta..
Specifically, as shown in FIG. 9, FIG. 9 is a schematic drawing of
the first substrate of display panel in FIG. 8. In the way of
implementation, a RGB pixel unit on the first substrate of the
display panel 91 is used for an example. As shown in FIG. 9, a RGB
pixel unit 91 on the first substrate includes: a data line 915;
multiple scan lines, 911, 912, and 913; and a first sub-pixel unit
901, a second sub-pixel unit 902, and a third pixel unit 903.
In this embodiment, the data lines 915 and a data line 916 are
disposed parallel and alternatively, and the scan lines, 911, 912,
and 913 are disposed along the direction perpendicular to the data
line 915.
The first sub-pixel unit 901, the second sub-pixel unit 902, and
the third pixel unit 903 are sequentially electrically connected to
the same data line 915 for controlling the display of red, green,
and blue.
Wherein, each sub-pixel unit is electrically connected to a
corresponding scan line, that is:
The first sub-pixel unit 901 is electrically connected to the scan
lines 911, and the second sub-pixel unit 902 is electrically
connected to the scan line 912, and the third sub-pixel unit 903 is
electrically connected to the scan line 913. And the scan line 912
corresponding to the second sub-pixel unit 902 and the scan line
913 corresponding to the third sub-pixel unit 903 and the scan line
914 corresponding to a first sub-pixel unit 904 of next pixel unit
are disposed side by side, wherein, the scan line 912, the scan
line 913, and the scan line 914 realize side-by-side disposition by
jump line method.
In this embodiment, the first sub-pixel unit 901, the second
sub-pixel unit 902, and the third pixel unit 903 respectively
include a pixel electrode and a thin film transistor. The operation
principle and connection method of each pixel electrode and thin
film transistor connected are the same with the embodiment shown in
FIG. 5, no more repeating.
FIG. 10 is a schematic drawing of BM layer on the second substrate
of the display panel shown in FIG. 8. As shown in FIG. 10, the
second substrate includes a first black matrix 101 and a second
black matrix 102.
In this embodiment, the first black matrix 101 is disposed
correspondingly above the scan lines, 911, 912, and 913. And the
widths of the first black matrix 101 are greater than the widths of
the scan lines 911, 912, and 913. The second black matrix 102 is
disposed correspondingly above the boundary region between the
first sub-pixel unit 901 and the second sub-pixel unit 902 and
above the second sub-pixel unit 902 and the third sub-pixel unit
903. It should be noted that the widths of the second black matrix
102 are less than the widths of the first black matrix 101.
As described above, the difference between this embodiment and the
embodiment shown in FIG. 5 is that the scan line 912 corresponding
to the second sub-pixel unit 902 and the scan line 913
corresponding to the third sub-pixel unit 903 and the scan line 914
corresponding to the sub-pixel unit 904 of the next pixel unit are
disposed side by side.
Because the first black matrix 101 is disposed correspondingly
above the scan line, in this embodiment, the width of the first
black matrix 101 between two adjacent pixel units on the second
substrate (color filter substrate) increase by approximately double
with comparing to the prior art shown in FIG. 1. Combining the 3D
display principle of the prior art shown in FIG. 2, the width b of
the first black matrix 101 increases approximately double in this
embodiment. By combining the aforementioned relationship formula 1,
the display panel of the present invention can make the vertical
viewing angle .theta. of the 3D device becomes larger.
Furthermore, this embodiment, the value of the height a of the
display area of the sub-pixel unit does not change. Therefore, when
increase the vertical viewing angle .theta., it does not sacrifice
the aperture ratio of the display panel or impact aperture ratio of
the display panel.
In summary, in the present invention, the scan lines corresponding
to multiple sub-pixels are disposed side by side such that
increasing the width of the first black matrix between adjacent
pixel units and vertical viewing angle and do not reduce the
aperture ratio.
The above embodiments of the present invention are not used to
limit the claims of this invention. Any use of the content in the
specification or in the figures of the present invention which
produces the equivalent structures or an equivalent process, or
directly or indirectly used in other related technical fields is
still covered by the claims in the present invention.
* * * * *