U.S. patent number 7,072,927 [Application Number 09/925,155] was granted by the patent office on 2006-07-04 for method and apparatus for generating random numbers for use in a field programmable gate array.
Invention is credited to Scott Kimura, Stephen Clark Purcell, Rajeshwaran Selvanesan.
United States Patent |
7,072,927 |
Purcell , et al. |
July 4, 2006 |
**Please see images for:
( Certificate of Correction ) ** |
Method and apparatus for generating random numbers for use in a
field programmable gate array
Abstract
A method and apparatus for generating random number outputs
utilized in generating a noise function at a given location in
space. The method consists of partitioning selected portions of the
random number generation process to achieve outputs in parallel.
The relevant parallel outputs are weighted by effect and then
summed together to give the amplitude of the noise function at the
given location.
Inventors: |
Purcell; Stephen Clark
(Mountain View, CA), Kimura; Scott (San Jose, CA),
Selvanesan; Rajeshwaran (Milpitas, CA) |
Family
ID: |
36613877 |
Appl.
No.: |
09/925,155 |
Filed: |
August 8, 2001 |
Current U.S.
Class: |
708/300;
708/256 |
Current CPC
Class: |
G06F
7/58 (20130101); G06F 7/582 (20130101) |
Current International
Class: |
G06F
17/10 (20060101); G06F 1/02 (20060101) |
Field of
Search: |
;708/300,256,253 |
References Cited
[Referenced By]
U.S. Patent Documents
Primary Examiner: Mai; Tan V.
Attorney, Agent or Firm: Townsend and Townsend and Crew
LLP
Claims
What is claimed is:
1. A method of generating a noise function output at a first
location comprising: generating M random number outputs, each
random number output representing a pulse, using a single first
stage and M parallel second stage circuitries; determining a
measure of relevance of each of the M random number outputs to
identify one or more relevant random number outputs from among the
M random number outputs; and accumulating each of an effective
weighting computed for each relevant random number output.
2. A method according to claim 1 wherein generating includes:
storing said first stage inputs in a first register; selecting a
first set of bits from said first register; storing said first set
of bits in a second register; and selecting a second set of bits
from said second register, said second set of bits representing
said result of said single first stage circuitry.
3. A method according to claim 2 wherein generating, for each
parallel second stage module, further includes: storing said result
of said single stage circuitry in a second stage register; and
selecting a second set of bits from said second stage register,
said second set of bits representing one of said M random number
outputs.
4. A method according to claim 3 wherein said each random number
output can be one of a phase 1 output and a phase 2 output.
5. A method according to claim 4 wherein said phase 2 output is a
full and exact representation of the desired random number
output.
6. A method according to claim 5 wherein said phase 1 output is an
approximation of said phase 2 output.
7. A method according to claim 6 wherein determining the relevance
includes: testing phase 1 outputs to see if the pulses they
represent fall approximately within an area of interest about said
first location; and updating a queue with a positive indication for
each pulse that falls within said area.
8. A method according to claim 7 wherein said area of interest is
determined by a circle swept by a radius about said first
location.
9. A method according to claim 8 wherein testing includes:
determining the distance between the location of a pulse as
approximated by their phase 1 output and said first location;
subtracting an allowable difference from said determined distance;
and comparing the result of said subtraction with said radius.
10. A method according to claim 9 wherein if said result is not
greater than said radius, then said pulse is determined to fall
approximately within said area of interest.
11. A method according to claim 6 wherein accumulating includes:
fetching the full phase 2 output for each pulse determined to be
relevant to said noise function output; determining what effect
each said relevant pulse would have to said noise function;
modifying by said effect the weight of said pulse given by said
phase 2 output, said modification yielding an effective weight; and
summing together effective weights for all pulses deemed to be
relevant to said noise function output, said sum representing the
amplitude of the noise function at said first location.
12. A method according to claim 11 wherein determining what effect
includes: computing a sum of squared differences between said pulse
as represented by its phase 2 output and said location; correlating
said sum of squared differences with a corresponding effect factor;
and obtaining said effect factor from a filter table.
13. A method according to claim 12 wherein modifying includes:
multiplying said effect factor by said weight.
14. A method according to claim 2 wherein selecting said first set
of bits includes: utilizing a group of XORs, each XOR having its
inputs pre-wired to various locations of said first register, to
select among the bits of said inputs.
15. A method according to claim 2 wherein selecting said second set
of bits includes: utilizing a group of XORs, each XOR having its
inputs pre-wired to various locations of said second register, to
select among the bits stored therein.
16. A method according to claim 3 wherein said selecting in each
parallel second stage module includes: utilizing a group of XORS,
each XOR having its inputs wired to a number of bits representing
the module number and to selected locations of said second stage
register.
17. An apparatus for generating a noise function output, said noise
function output being a combination of relevant pulses, the
apparatus comprising: a random number generator configured to
generate M random number outputs in a parallel fashion, each of
said M random number outputs being an approximation of a full
version of each of said random number outputs; a chooser device
coupled to said random number generator, said chooser determining
if the pulse represented by each said random number output is
relevant to the noise function; a queue coupled to said chooser
device, said queue storing which of said M random number outputs
were determined relevant, said apparatus configured to generate the
full version of the relevant random number outputs; an effect
generator coupled to said queue, said effect generator modifying
the weight of each pulse as given by said full version according to
the location of the pulse represented by said full version; and an
accumulation device coupled to said effect generator to accumulate
said effect modified pulses weights, the result of said
accumulation the amplitude of the noise function.
Description
BACKGROUND
1. Field of the Invention
The invention relates generally to programmable devices. More
specifically, the invention relates to generating of random number
sequences in programmable electronic devices.
2. Related Art
One technique utilized in image rendering (i.e. representing a
real-world three-dimensional scene or image onto a two-dimensional
screen or device) is that of random and noise function generation.
Creating realistic textures for surfaces of objects when they are
rendered often involves summing the amplitude of noise functions at
certain locations within the space confined by the scene. These
noise functions, which are usually frequency-limited, are evaluated
at arbitrary locations by considering pulses (amplitudes created by
the noise function) within a particular radius of those arbitrary
locations.
The number of "dimensions", d, may vary depending on the spatial
characteristics of the desired noise function. For instance if a
2-D texture from a noise function is desired, then d is 2 (with
coordinates x and y, for example). If a 3-D texture that is in
motion is desired, then the number of dimensions d, would be 4
(with coordinates x, y, z and t). FIG. 1 shows a arbitrarily chosen
location 110 in a two-dimensional grid 100. The grid 100 is
subdivided into integer multiples of both horizontal (x) and
vertical (y) axes. If a given location A has coordinates (x,y) then
the integer portion is represented by (ix,iy) and the fractional
portion (Fx,Fy). Likewise, in grids with a 3rd dimension z, the
integer portion is represented by iz, and the fractional portion by
Fz. In systems using a fourth dimensional component (motion), t,
has an integer representation "it" and a fractional representation
Ft.
Assume, for purposes of illustration, that only a two-dimensional
texture mapping is contemplated. Referring to FIG. 1, the sum of
pulses at an arbitrary point A 110 is found by computing a series
of (Fx,Fy,w)=Random(iA.sub.x,iA.sub.y,n) where n is variable
tracking which of the pulses are being computed/generated, Fx,Fy
are fractional coordinate components of the pulse being
computed/generated, iAx, iAy are the integer coordinate components
of the location A and w is the weight of the computed pulse.
Likewise, if considering three-dimensional texture mapping, then
(Fx,Fy,Fz,w)=Random(iAx,iAy,iAz,n), and if four-dimensional, then
(Fx,Fy,Fz,Ft,w)=Random(iAx,iAy,iAz,iAt,n). The total number of
pulses considered within a given cell can be fixed to a certain
number. FIG. 1 shows each cell having two pulses, and thus
exemplifies N=2. Each cell is referred to by the coordinates of its
bottom-left vertex. The sum of pulses at an arbitrary location A
110, is found by summing the pulses that lie within a radius 120 of
A 110. Pulses P.sub.9 and P.sub.10 are all of the total of two
pulses within cell (1,1), and these are included within the area
swept by radius 120 about location A 110. Likewise, both of the
pulses P.sub.7 and P.sub.8 in cell (0,1) also lie within the area
swept by radius 120 about location 110. However, in cell (2,1),
only one of the two pulses, namely pulse P.sub.12, lies within the
area swept by radius 112 about location A 110. The other pulse
P.sub.11, lies outside the area of interest and thus, would not
contribute to the sum of pulses. Likewise, pulse P.sub.15 of cell
(1,0) lies within the area swept by radius 112 about location A 110
while pulse P.sub.16 lies outside. Pulses P.sub.13 and P.sub.14 of
cell (0,0), pulses P.sub.3 and P.sub.4 of cell (1,2), pulses
P.sub.17 and P.sub.18 of cell (2,0), pulses P.sub.1 and P.sub.2 of
cell (0,2) and pulses P.sub.5 and P.sub.6 of cell (2,2) lie outside
the area of the circle and do not contribute to the sum of
pulses.
One way of computing the location of these pulses and their weights
is to generate random number sequences representing the coordinates
and the weights of each pulse. If a computed pulse location lie
outside of the circle (of radius 112 about point A 110), then its
weight does not contribute to the sum of pulses.
FIG. 2 is a example of a conventional random number sequence
generator. Assuming an input of three dimensions, the integer
coordinate components, ix, iy, and iz, of a chosen point, are input
to initializer 210 to produce a first state STATE.sub.0.
Initializer 210 may be a hash function or similar mechanism. The
state STATE.sub.0 is input to a randomizer 220 to produce a first
random number Q.sub.0. In a serial fashion, the next state
STATE.sub.1 is produced as an effect of randomizing STATE.sub.0
with randomizer 220. STATE.sub.1 is fed to the randomizer 230
(similar to randomizer 220) to produce a second random number
Q.sub.1 as well as the next state STATE.sub.2. STATE.sub.2 is fed
to the randomizer similar to randomizer 220) to produce a third
random number Q.sub.2 as well as the next state STATE.sub.3.
STATE.sub.3 is fed to the randomizer similar to randomizer 220) to
produce a fourth random number Q.sub.3 as well as the next state.
Likewise, any state STATE.sub.1 needed to produce output Q.sub.i
must be first produced by randomizing a state STATE.sub.i-1. Thus,
such randomizers are essentially serial in nature. Where cycle time
performance is critical and outputs must be produced in parallel,
such techniques cannot be used. For instance, in producing the
fractional coordinate components (Fx,Fy,Fz) and the weight w at the
location given by those fractional coordinate components, each
random number would represent one of those components. Thus,
Q.sub.0 would represent Fx.sub.0, R.sub.1 would represent Fy.sub.0,
Q.sub.2 would represent Fz.sub.0 and finally, Q.sub.3 would
represent w.sub.0. Each of the outputs are available only after the
previous states are produced. The serial nature of generating these
outputs is inconvenient where performance speed is vital. Where
parallel random number generators are used, and these are
implemented in hardware, the cost/space of hardware logic blocks
increases dramatically.
Thus, there is a need for a technique for random number generation
that operates in a parallel fashion and can minimize the number of
hardware blocks involved.
SUMMARY
What is disclosed is a method and apparatus for generating random
number outputs utilized in generating a noise function at a given
location in space. The method consists of partitioning selected
portions of the random number generation process to achieve outputs
in parallel. The parallel outputs approximate the true random
number outputs. The approximate outputs are tested to see if the
pulse that corresponds to the outputs are relevant to the noise
function. If relevant, the exact version of the random number
output is generated. The weight of each pulse (as represented by
the full random number output) is modified by an effect factor,
based upon the distance between the pulse location (represented by
the full random number output) and the given location. The effect
weighted pulses are summed together to give an amplitude of the
noise function at the given location.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 illustrates a two-dimensional grid of pulses.
FIG. 2 is a example of a conventional random number sequence
generator.
FIG. 3 illustrates an overview of the invention according to one or
more embodiments.
FIG. 4 depicts an exemplary embodiment of the first stage of a
partitioned random number generator according to one or more
embodiments of the invention.
FIG. 5 depicts an exemplary embodiment of the second stage of a
partitioned random number generator according to one or more
embodiments of the invention.
FIG. 6 illustrates an architecture for summing computed pulses
according to one or more embodiments of the invention.
FIG. 7 is flowchart illustrating summation of pulses to generate a
noise function output according to one or more embodiments of the
invention.
FIG. 8 is a sample filter table utilized in various embodiments of
the invention.
DETAILED DESCRIPTION OF THE INVENTION
In brief, the invention consists of partitioning selected portions
of the random number generation process to achieve outputs in
parallel. A number of inputs, which may vary based upon the number
of dimensions being considered, are fed to a first stage P which
utilizes a designed multi-level XOR selection circuitry to produce
a first result. The result of P is then fed to a second stage F,
which again utilizes a designed XOR selection circuitry, to produce
the random number output. The random number output consists of the
fractional coordinate component of the pulse location as well as a
weight for the pulse. If M random number outputs are desired, stage
F circuitry is replicated M times, with each parallel "module" F
taking the same result of the single stage P as one of its inputs.
The designed XOR selection circuitry are pre-wired to select
certain registers and will vary their output because the inputs to
the registers will also vary at each module. Because the level of
parallelism does not affect the first stage of the generation
process, the total number of configurable logic blocks can be
reduced. Also, the random number output is divided into two phases,
the first of which represents an approximation of the output of the
other phase, and is used to estimate its relevance of the output to
the summation process. The replicated M stage F modules all produce
phase 1 (approximate) outputs. The phase 1 outputs are tested to
see which probably lie within the circle of interest. Those pulses
that do then have their phase 2 (full resolution) outputs computed
by phase 2-type stage F modules, which can be designed to be fewer
in number than the M phase 1-type stage F modules.
FIG. 3 illustrates an overview of the invention according to one or
more embodiments. The random number generator R 300 splits the
computation of R into two primary stages. The first stage P 310
takes an input j, where j ranges from 0 to N-1 div M where N is the
total number of the pulses being considered and M is the
parallelism of the second stage (stage F) circuitry (each stage F
circuitry is referred to as a "module"). For a given set of M
random number outputs, j does not vary. A second input k, bypasses
the first stage P 310, and is an input to the M stage F modules.
The input k ranges from 0 to M-1 and is input along with selected
output from first primary stage P 310 to a stage F module. A value
of k=0 and the result from stage P (RESULT.sub.P) is input to stage
F module 320. A value of k=1 and the same RESULT.sub.P is input to
stage F module 321. Each random number output, in accordance with
the invention, is given by R.sub.k=F((P(j),k). At each cycle (given
by a particular value of j), the generator 300 produces M resulting
random number outputs representing the pulses being considered
(given by k). The ability to bypass the input k at the first stage
reduces the total number of configurable logic blocks (CLBs) needed
(since the circuitry for P does not need to be duplicated for each
k). Each random number output R.sub.k contains the fractional
coordinate components and the weight of the pulse.
Other logic, discussed below, determines the relevance of the
computed pulse locations and sums the weights of the pulses based
upon their relevance. To reduce the number of logic blocks in the
circuitry, in some embodiments of the invention, the M stage F
modules produce approximations of the full random number output.
The approximate computed locations are measured for their relevance
(i.e. whether the pulses approximately fall within the area of
interest). For those pulses considered relevant, other stage F
modules that produce the exact random number outputs are initiated.
The pulse weights are modified according to their effect upon
(distance from) the location A. The modified sums are then
accumulated to give the amplitude of the noise function at the
location A.
FIG. 4 depicts an exemplary embodiment of the first stage of a
partitioned random number generator according to one or more
embodiments of the invention. The first of two primary stages,
designated as stage P 400, is depicted. The inputs to stage P 400
are predicated upon the number of total dimensions d, in the grid
being considered. The number of dimensions d may range from 1 to 4,
and as depicted in FIG. 4, the d considered here is d=4. Thus,
there are 4 dimensional coordinate inputs, ix, iy, iz and "it", to
the stage 400. If d=3, then the dimensional coordinate inputs would
number 3, namely ix, iy and iz. The number of the cycle, j,
described above, is also input to stage P 400. An input "c" is a
count of which component of the output is being generated, if the
function R is separable component by component.
All of the inputs shown, ix, iy, iz, "it", d, c and j are input in
binary and form a large sequence of individual bits. These input
bits are stored in register A 410. According to the invention,
prior to run-time, the register A 410 is pre-wired to a XOR bank
420. In one embodiment, the wiring provides four of the input bits
as inputs to each XOR in the XOR bank 420. The register can be
wired to the XORs at arbitrarily selected locations. To ensure that
all input bits are well represented, the wiring can be arranged so
that there are no connections to the same two register locations
for a given XOR. The wiring can also be arranged to minimize the
number of register locations being wired more than once. However,
the average rate of registers being wired more than once depend
primarily on three factors: the number of inputs to each XOR, the
total number of register locations and the total number of outputs
(XORs in the XOR bank 420) needed. For instance, if each of the
dimensional coordinate inputs are 10 bits (with four dimensions, a
total contribution of 40 bits), and inputs d and c are 2 bits each
and j is 5 bits, a total of forty-nine bits would be stored in
register A 410. In such an example, assume also that each XOR
accepts 4 inputs and that a total of 32 outputs, and therefore, 32
XORs, need to be wired from the forty-nine active locations. The
first 12 of the 32 XORs could be wired to have exclusivity of bits
within each XOR and between each XOR. The remaining XORs would
repeat some of the register locations previously represented, but
could be done so in a different arrangement for each XOR. If A is
the number of register locations, B is the number XORs and C is the
number of inputs to each XOR, then a given register location
(inputs to register A 410) is repeated to the XOR bank on average
B*C/A times.
In the above example, each input bit would be repeated an average
of 32*4/49 or approximately 2.6 times. The permutations and
combinations of these bits need not be repeated, in most cases, in
any design of wiring. According to one embodiment of the invention,
the wiring of the registers to XOR is done at random, in which case
some repeat above the average may occur. If all register locations
are evenly represented, then the design could completely ignore
even inter-XOR repetitions of the same register location. For
instance, in the above example of a repeat every 2.6 times, the
first 24 XORs (2 groups of 12 XORs) may have, by design, only wired
a register location exactly twice, while the remaining 8 XORs may
have a configuration which would not necessarily ensure that even a
given one of the 8 XORs has a repeated register location as
input.
Thus, referring to FIG. 4, XOR bank 420 is shown with a first XOR
421 and another XOR 425. The other XORs that may be needed in XOR
bank 420 to produce the needed number of outputs are not
specifically depicted for simplicity. XOR 421 may be in the first
group of XORs within XOR bank 420 that do not repeat bits inter-XOR
or intra-XOR. Thus, all four wire connections between XOR 421 and
register A 410 are to different register locations as are other
XORs within the group. However, XOR 425 may be part of a group that
repeats a register location previously represented or even, repeats
a connection to a register location within its 4 inputs.
The outputs of XOR bank 420 are input to a register B 430. The
number of inputs to register B 430 equal the number of outputs
provided by XOR bank 420. Thus, these two numbers are
inter-related. The inputs to register B 430 are stored in register
locations therein. Like register A 410, XORs of a XOR bank 440 are
wired selectively to various locations of register B 430. The
results of the XORs in XOR bank 440 form the bits of the final
result, RESULT.sub.P, for the entire stage P 410. The number of
XORs in XOR bank 440 are dependent primarily upon the number of
bits desired for the result of the stage P 410. The wiring
arrangement between XORs such as XOR 441 and XOR 445 and the
register locations of register B 430 are arbitrary and a matter of
design choice. It may be required, for instance, that there be no
inter-XOR repetition (where a given XOR is wired twice to the same
register location), and the wiring can be arranged to so
accommodate. The number of inputs for register B 430 are strictly
speaking, arbitrary and a matter of design choice, but should
provide a good sampling for generating the final result of the
stage P 400. At the same time, the choice of number of inputs for
register B 430 should avoid coincidences and correlations that
would be visible in the final output RESULT.sub.P 450. This
multi-level selection process within stage P 400 ensures a well
seeded random result for RESULT.sub.P and could be designed to
minimize coincidences between a given RESULT.sub.P and any others.
The output of stage P RESULT.sub.P is fed to each of the M parallel
stage F modules, and does not vary among any of them.
FIG. 5 depicts an exemplary embodiment of the second stage (stage
F) of a partitioned random number generator according to one or
more embodiments of the invention. The second stage module F 500 is
replicated M times depending upon the desired parallelism in the
generator. The higher the value of M, the more parallel outputs and
thus, better performance. However, a high M also means more cost in
terms of the number of circuits that must be employed. Thus, M can
be optimized depending upon the tradeoff between performance and
cost. The second stage module F 500 takes a first input
RESULT.sub.P and k, which is the particular pulse being considered
in each parallel module in a given cycle. The input k is a number
of bits representing the parallel module number and has a number of
bits given by log.sub.2M. A number of XORS, such as XOR 520, XOR
530 and XOR 540, are wired to various, arbitrary locations in
register A 510. Each of the XORs may have a different number of
inputs to them. For instance, XOR 520 has a total of four inputs,
while XOR 530 has a total of five inputs and XOR 540, six total
inputs. Each of the XORs 520, 530 and 540 are wired/connected to
three locations of register A 510. The remaining inputs to each of
the XORs 520, 530 and 540 are derived from the input k. In the
example depicted in FIG. 5, XOR 520 takes one bit of k as one
input, while XOR 530 takes two bits of k as two inputs thereto and
XOR 540 takes three bits of k as inputs thereto. The choice of
which bits of k are taken as input to a particular XOR are
arbitrary and may be wired at design time as are the XORs
themselves. For instance if k is a three bit number, one XOR that
takes two bits of k could select the first two bits as its input
while another XOR taking only two bits of k selects instead the
last two bits of k as input. The number of XORs needed to be wired
to register A 510 will depend upon the total number of outputs and
output bits of the entire random number generator R.
The outputs of XORs, such as XOR 520, 530 and 540, are wired to a
final stage 550 which generates the random number outputs. Final
stage 550 is a register that provides the random number outputs.
Each stage F "module", such as module 500, can be designed to
provide either approximate (phase 1) or exact (phase 2) random
number outputs. In phase 1-type stage F modules, only a fixed
number of most significant bits of the random number output are
provided by final stage 550. In phase 2-type stage F modules, all
of the bits of the random number output (i.e. the exact version)
are provided by final stage 550. The number of XORs that need to be
wired to the final stage F 550 and register A 510 depend on whether
the module is a phase 1-type module or a phase 2-type module. For
instance, assuming that the random number computation was performed
for a four-dimensional grid in 16-bit precision. In a phase 2-type
module, the final stage 550 would provide a 16-bit number for each
of 5 outputs, four for the dimensional coordinate component outputs
and one for the weight of the pulse. In a phase 1-type module, the
final stage 550 may only provide the most-significant bits of each
number, for example, the five most significant bits. The phase
1-type module output can be used to estimate the relevance of the
pulse to the summation process. If the pulse is relevant (within
the area of consideration about a location A, see FIG. 1), then the
phase 2-type module output is provided. Otherwise, the phase 2-type
module output is not provided at all. The phase 2-type module would
have, for instance, 80 XORs (if 16 bits each output component and
five output components). The phase 1-type modules would have only
25 XORs, 5 for each of 5 output components. The entire random
number generator may have only a few (less than M) phase 2-type
modules, and have M phase 1-type modules. If the number of relevant
pulses (for which exact, phase 2 outputs are needed) exceeds the
number of phase-2 type modules, the available phase-2 type modules
would have to be re-used to generate the additional outputs.
FIG. 6 illustrates an architecture for summing computed pulses
according to one or more embodiments of the invention. Each phase
1-type parallel second stage module (of which there are M), which
contains stage F 500, produces a random number output R'.sub.i
which is an approximation of R.sub.i. The M random number outputs
from phase 1-type modules, namely R'.sub.0, R'.sub.1, R'.sub.2, . .
. R'.sub.M-1, are fed to a respective chooser block. Hence, phase 1
random number output R'.sub.0 is fed to a chooser block 610, while
phase 1 random number output R'.sub.1 is fed to a chooser block 620
and phase 1 random number output R'.sub.M-1 is fed to a chooser
block 630 and so on. In some implementations, the cicruitry
generating a phase 1 output and the circuitry generating a phase 2
ouptut may be identical in nature.
Each chooser block tests the phase 1 output, which is an
approximation of the (full) phase 2 output, to see whether it is
approximately within the area of interest (i.e. within a circle of
radius r about a location A). If it is within the area of interest,
the corresponding full phase 2 random number output is forwarded
onward. If not, the corresponding (full) phase 2 output is
completely ignored. The results (either yes or no) for all M
outputs are compiled in a queue 640. Queue 640 then wires the phase
2 outputs of each parallel second stage module yielding a result of
yes (through its corresponding chooser block) to a sum of squared
differences block. For instance, if the pulse corresponding to
R'.sub.0 is determined to be relevant to the summation, the
corresponding phase 2 output R.sub.0 is generated and provided to a
sum of squared differences block 650. However, if the pulse
corresponding to R'.sub.1 is not determined to be relevant by
chooser block 620, then corresponding phase 2 output R.sub.1 would
be not be generated, and thus, would not be further considered.
Each sum of squared differences block sums the square of the
differences between (i.e. computes the square of the Euclidean
distance between) the full phase 2 random number output R.sub.0 and
the location A. Assume R.sub.0x is the x coordinate component
output of R.sub.0, R.sub.0y is the y coordinate component output of
R.sub.0, R.sub.0z is the z coordinate component output of R.sub.0
and R.sub.0t is the t coordinate component output of R.sub.0.
Likewise, assume A.sub.x is the x coordinate component of A,
A.sub.y is the y coordinate component of A, A.sub.z is the z
coordinate component of A and A.sub.t is the t coordinate component
of A. Then sum of squared differences block 650 would compute:
.times..times..times. ##EQU00001## Likewise, the sum of squared
differences of any contributing (relevant) pulse is computed in its
corresponding sum of squared differences block. For instance, the
sum of squared differences S.sub.3 for the pulse represented by
R.sub.3, would be computed by sum of squared differences block 680
as:
.times..times..times. ##EQU00002##
The outputs S.sub.0 and S.sub.3 each represent the distance between
the location A and the computed random pulses R.sub.0 and R.sub.3,
respectively. Each of these distances are used to index a filter
table, such as a filter table 620. Filter table 620 and a filter
table 650 each contains a table of distance-effect factors e
indexed by distances. The lower the distance S.sub.i between
R.sub.i and A, the greater the effect afforded to the corresponding
pulse. Thus, if S.sub.i is high, the effect factor e will be low,
and vice-a-versa. The relationship characterizing S.sub.i and
e.sub.i is a design choice, and may be linear or non-linear. The
filter tables 620 and 650 provide an effect factor "e.sub.i" for a
given S.sub.i.
The exact weight w.sub.i of each pulse, as computed by the random
number generator, is a result output of each phase 2-type stage F.
The exact weight w.sub.i is then multiplied by the corresponding
effect factor e.sub.i by a multiplier. The output of filter 620
would be an effect factor e.sub.0 which would then be multiplied by
the weight w.sub.0 using a multiplier 690. This product is summed
with other such products using an accumulator 691 and summer 693.
For instance, if sum of squared differences block 660 produces a
distance S.sub.3 for a pulse represented by R.sub.3, then filter
table 680 would produce an effect factor e.sub.3. The effect factor
e.sub.3 is multiplied at a multiplier 695 by the weight w.sub.3 of
the corresponding pulse (which is provided for in the random number
output R.sub.3). This product is then summed with the number stored
in accumulator 691 which has the accumulated products from other
pulses. In general, the sum of pulses SP is summarized by:
.times..di-elect
cons..times..times..times..times..times..times..times. ##EQU00003##
The embodiment of FIG. 6 shows parallel sum of squared differences
and filter blocks for each output of queue 640. However, by
scheduling the outputs to be sequentially processed, it may be
possible in other embodiments to use only a single sum of squared
differences block and filter block and feed each of the relevant
phase 2 random number outputs thereto. Queue 640 could be used to
schedule the outputs to the sum of squared differences and filter
block. The accumulator 691 accumulates the sum of these scheduled
products by summing its current value with each new product
generated. In addition, the product outputs of the multipliers can
be summed at an earlier stage prior to being accumulated by the
adder 693 and accumulator 691.
FIG. 7 is flowchart illustrating summation of pulses to generate a
noise function output according to one or more embodiments of the
invention. A tracking variable i is initialized to zero, tracking
which pulse is being considered (block 710). Next, the phase 1-type
module's output R'.sub.i is fetched (block 715). Initially, the
output R'.sub.0, which is an approximation of R.sub.0, is fetched
from the module providing it. The phase 1 output R'.sub.i is tested
to see if the corresponding pulse P.sub.i approximately falls
within a circle defined by a radius r about the point A, from which
the pulses were computed (checked at block 720). Block 720 checks,
as a measure of pulse relevance, whether:
|P.sub.xyzt-A.sub.xyzt|-allowable_difference<r, where P.sub.xyzt
is the location of the pulse P.sub.i, A.sub.xyzt is the point of
interest and allowable_difference is a tolerance level. If the
above condition is satisfied (block 720 returns "yes"), then a
queue is updated with a yes for the corresponding current value of
i (block 730). If the condition is not satisfied, the queue is not
updated for that value of i, and the queue holds its initialized
value such as a zero. The variable i is then incremented (block
725). If i>=M, the number of random number outputs of the
current hardware cycle, then all the phase 1 outputs will have been
tested (checked at block 727). If not, testing continues with a
fetch of another R'.sub.i (return to block 715).
If all phase 1 outputs have been tested, then each phase 2 output
that corresponds to a pulse tested as relevant (as referred to in
the queue) is fetched (block 740). The sum of squared differences
(square of distance) S.sub.i between the exact pulse P.sub.i and
the location A is computed (see above) (block 750). This sum is
filtered (serves as index to a filter table) to obtain an effect
factor e.sub.i (block 760). The effect factor e.sub.i is multiplied
by the computed weight w.sub.i (which is part of the random number
output) (block 770). The product is accumulated with other products
(block 780) in an accumulator. The sum of all the products (effect
weighted pulses) is he amplitude of the noise function at the
location A.
FIG. 8 is a sample filter table utilized in various embodiments of
the invention. The effect factor, which is represented on the
y-axis, ranges from 0.0 to 1.0. A pulse which has a distance of 0.0
from A (i.e. is coincident with A) would probably be assigned an
effect factor of 1.0. The distance, which is represented along the
x-axis, ranges from 0.0 to r, where r is the radius of the circle
of interest about location A. As the distance increases, the effect
factor decreases, and thus pulses further away from the location A
would have less effect upon the amplitude of the noise function,
while closer pulses would have a greater effect.
Although the present invention has been described in detail with
reference to the disclosed embodiments thereof, those skilled in
the art will appreciate that various substitutions and
modifications can be made to the examples described herein while
remaining within the spirit and scope of the invention as defined
in the appended claims. There are areas where those skilled in the
arts may make changes and modifications and employ equivalents
without departing from the spirit of the invention.
* * * * *