Musical Instrument Having Automatic Arpeggio System

Abstract

A musical instrument incorporates apparatus for automatically producing an arpeggio, successively producing tone in accordance with operated keys of a keyboard, in response to operation of at least one control switch. Switches operated by the keys are scanned by a scanner, and the several tones of the arpeggio are each produced by a predetermined time, by stopping the operation of the scanner as the switches corresponding to operated keys are reached in each scanning cycle. The stopping of the scanner is under control of a multivibrator having an adjustable period, to permit manual selection of the rate at which the arpeggio is produced. A plurality of mode selector switches are operable to select the mode of operation of the scanner. An arpeggio having tones extending over a range of one, two or three octaves is selectable by the mode selector switches, and the mode selector switches are also operable to select one of a variety of styles of arpeggio, including an ascending style, a descending style, and a style in which the arpeggio alternately ascends and descends. A foot switch is provided for initiating the arpeggio.

Description

BACKGROUND

1. Field of the Invention

The present invention relates to a musical instrument and, more particularly, to a musical instrument having means for automatically producing an arpeggio.

2. The Prior Art

A variety of mechanisms have been developed in the past for automatically producing an arpeggio in response to depression of various keys and operation of various switches. An example of such a system is described in the Kniepkamp U.S. Pat. No. 3,617,602. While such systems have operated satisfactorily for the purpose for which they are designed, a relatively large volume of structure is required, including a large number of discrete components such as transistors, resistors, and the like.

The system described and claimed in the aforementioned Kniepkamp patent employs an analog technique which is subject to the disadvantage that compromises must be made in the number of notes keyed at a single time, due to the relatively large voltage swing required when an analog technique is used.

Moreover, automatic arpeggio systems have thus far been limited in their operation to only a single operating mode, which is carried out in timed cycles, irrespective of the number of tones making up the arpeggio.

SUMMARY OF THE INVENTION

According to one embodiment of the present invention, a musical instrument, having a keyboard and a plurality of switches operable by the keys of the keyboard, is provided with an automatic arpeggio producing system incorporating a scanning oscillator, a monostable multivibrator, scanning means connected with the scanning oscillator for respectively scanning the key-operable switches, means connected with the scanning means and with the multivibrator for disabling the scanning oscillator for the period of the multivibrator each time an operated one of said key-operable switches is scanned and for enabling the scanning oscillator at the end of said period, whereby the tone corresponding to each of said key-operable switches is produced individually for a time interval corresponding to the period of the multivibrator. The range of scanning is variable over one to three octaves by means of a plurality of mode selector switches, and the direction of scanning is also selectable by such switches.

It is a principal object of the present invention to provide a system for automatically producing an arpeggio which produces each tone of the arpeggio equally spaced in time during the arpeggio.

Another object of the present invention is to produce such a system in which a plurality of independent modes of operation may be selected.

A further object of the present invention is to provide such a system which operates by digital means, and employs apparatus which is small in volume.

These and other objects and advantages of the present invention will become manifest upon an examination of the following description and the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

Reference will now be made to the accompanying drawings in which:

FIG. 1 is a functional block diagram of a portion of a musical instrument incorporating an automatic arpeggio system constructed in accordance with an illustrative embodiment of the present invention;

FIGS. 2A-2E, taken together, comprise a composite schematic circuit diagram, partly in functional block diagram form, of the apparatus illustrated in FIG. 1;

FIG. 3 is a functional block diagram of an up-down counter employed in the apparatus of FIG. 1;

FIG. 4 is a functional block diagram of a one-of-sixteen decoder employed in the apparatus of FIG. 1;

FIG. 5 is a functional block diagram of a NAND gate employed in the decoder of FIG. 4;

FIG. 6 (appearing with FIG. 3) is a functional block diagram of a J-K flip-flop employed in the apparatus of FIG. 1; and

FIG. 7 (appearing with FIG. 2E) is an illustration of the manner in which FIGS. 2A-2E are to be assembled.

DESCRIPTION OF THE PREFERRED EMBODIMENT

As shown in FIG. 1, a plurality of arpeggio keyers 10 are provided which produce 36 output signals connectable to a plurality of keyers (not shown) associated with the upper manual of a musical instrument such as an electronic organ. The upper manual keyers are conventional in construction, and function to cause sources of electrical signals to be connected to an output system, which amplifies the signals and applies them to a loudspeaker or the like, for producing musical tones corresponding to the signals. The keyers 10 function in response to signals developed by a plurality of gates 14, which are connected to the input terminals of the keyers 10 by a group of lines 16. The gates 14 function, in response to output signals produced on lines 20 by a one-of-sixteen decoder 18, and also in response to output signals developed in a lower manual keyboard 22, connected to the gates 14 over lines 24. As described more fully hereinafter, signals are produced on the lines 20 and 24 simultaneously in specific combinations in order to cause various output signals to be produced by the gates 14, which cause the keyers 10 to successively produce a series of output signals on the lines 12, by which an arpeggio is sounded by the output system. Each tone of the arpeggio is selected in response to a signal present on one of the lines 20.

The inputs of the one-of-sixteen decoder 18 are derived from four output lines 26, connected to the outputs of a four stage binary counter 28. The one-of-sixteen decoder 18 functions to energize a single one of its output lines 20 in response to the binary representation present on the lines 26.

The counter 28 is caused to count a series of input pulses either up or down, in response to operation of an up-down buffer 30. The buffer 30 has an up control unit 32 and a down control unit 34, which are connected to individual inputs of the up/down counter 28 over lines 36 and 38, respectively. Only one of the control units 32 and 33 is operative at any time, and the operative one of these two units is enabled by a signal over a line 40, which interconnects the two units 32 and 33 with a plurality of mode-selector switches 42. The operative one of the two units 32 and 33 causes pulses to pass from a scan oscillator 44 over a line 46, and from the line 46 through the operative unit to either the line 36 or the line 38. Each pulse supplied to the line 36 causes the counter 28 to be incremented, that is, to increase the binary representation on the output lines 26 by unity. Similarly, pulses applied to the line 38 cause the counter 28 to be decremented, by which the binary representation on the lines 26 is decreased by unity.

The scan oscillator 44 normally operates continuously but is inhibited from operating in response to a signal on a line 50 connected from a start-stop flip-flop 52. The duration of disabling of the scan oscillator 44 is controlled by the period of a timer multivibrator 54 which is connected to the start-stop flip-flop 52 by a line 56. The period of the multivibrator 54 is manually controllable by means of an arpeggio speed control unit 58, connected to the multivibrator 54 over a line 60.

A strobe switch 62 is connected to the scan oscillator 44 by a line 64, and functions to pass a strobe pulse from the gates 14 over a line 66, to the start-stop flip-flop 52 via a line 68, a disable unit 70, and a line 74. The unit 70 normally passes strobe pulses from the line 68 to the line 74 to set the flip-flop 52, but under certain conditions, block such pulses. As more fully described hereinafter, strobe pulses are blocked when the direction of arpeggio changes from up to down, and vice versa. The strobe switch 62 functions to pass strobe pulses from the line 66 to the line 68, only when the oscillator 44 is in a predetermined condition, as more fully described hereinafter. After the flip-flop 52 is set, a signal passed to the flip-flop 52 over the line 56 from the multivibrator 54 operates to reset it.

An octave counter 76 is connected with the mode selector switches 42 over a plurality of lines 78, and functions to present a binary representation of the number of octaves scanned by the scan oscillator since previously having been reset. In response to signals present on these inputs, output signals are produced on a pair of output lines 80 and 82 which are connected from the switches 42 to an octave enable control unit 84.

The octave enable control unit 84 is connected with the arpeggio keyers 10 over three lines 86. The lines 86 are energized one at a time, to select one of three octaves for operation by the arpeggio keyers 10, in response to the combination of signals present on the lines 80 and 82.

A rest unit 88 is provided in association with the mode-selector switches 42. The reset unit 88 is operated by means of a foot switch 90, and functions to reset the counter 76. A source of positive potential, connected to a terminal 92, is connected to the reset unit 88 by the foot switch 90, in order to activate it. The foot switch is also connected to a reset input of the counter 28. When the foot switch 90 is closed, the counters 28 and 76 are both reset to zero. The counter 76 is also controlled by signals originating with the mode-selector switches 42, as more fully described hereinafter. This control is illustrated diagrammatically in FIG. 1 by a line 89 interconnecting the switches 42 with the counter 76.

Referring now to FIGS. 2A - 2E, which are interrelated as illustrated in FIG. 7, the start-stop flip-flop 52 comprises a pair of transistors 102 and 104, having their bases and collectors crosscoupled through a pair of resistors 106 and 108. The emitters of both transistors are connected to ground, and the base of each is connected to ground through individual resistors 110. The collector of each is connected to a source of positive voltage applied to terminal 112 through individual resistors 114.

The two transistors 102 and 104 conduct mutually exclusively, one being saturated while the other is cut off. The state in which the transistor 102 is saturated and transistor 104 is cut off is hereinafter referred to as the reset state of the flip-flop 52, while the opposite is referred to as the set state. A transistor 116 has its collector connected to the base of the transistor 102 and its emitter connected to the ground, and functions to set the flip-flop 52 when a positive pulse is applied to its base by the line 74. The origin of the setting pulse is described more fully hereinafter.

A transistor 118 has its collector connected to the base of the transistor 104 and its emitter connected to ground. This transistor is provided for resetting the flip-flop 52 to resume its reset state in response to a positive pulse on the line 56, connected with the multivibrator 54. The multivibrator 54 incorporates a pair of transistors 120 and 122, having their bases and collectors cross-coupled by a pair of capacitors 124 and 126. Each emitter is connected to ground through an individual diode 128, and the collectors are connected to a source of positive potential at a terminal 130 through individual resistors 132. The base of the transistor 120 is connected through a resistor 134 and a rheostate 136 to the terminal 130, and the base of the transistor 122 is connected through a resistor 137 and a rheostat 138 to the terminal 130. The rheostates 136 and 138 are ganged together so that the bias potential applied to the bases of the transistors 120 and 122 is adjustable simultaneously by movement of the taps of the rheostats 136 and 138, which together form the arpeggio speed control unit 58. The position of the taps of these rheostats control the frequency of oscillation of the multivibrator 54. Preferably, its frequency is adjustable between approximately 4Hz and 20Hz.

The collector of the transistor 122 is connected through a voltage divider incorporating resistors 140 and 142, the output of which is connected to the base of a transistor 144. The emitter of the transistor 144 is connected to ground and its collector is connected to a source of positive potential at a terminal 146 through a resistor 148. The collector of the transistor 144 is also connected through a voltage divider incorporating resistors 150 and 152, the output of which is connected to the base of the transistor 118 through a capacitor 154, and to ground through a resistor 156.

When the state of the multivibrator 54 is such that the potential at the collector of the transistor 122 goes from high to low, the transistor 144 is cut off, and a positive-going pulse is passed through the capacitor 154 to the base of the transistor 118. This saturates the transistor 118 and brings down the potential at the base of the transistor 104 close to ground potential, resetting the flip-flop 52. The flip-flop 52 is thus reset by the transistor 118 at the instant that the multivibrator 54 assumes the state in which the collector of the transistor 122 is low.

A diode 158 is connected from the collector of the transistor 102 to the line 50, and a diode 162 is connected from the collector of the transistor 144 to the line 50. When either of the transistors 102 or 144 is cut off, current flows through one of these diodes to the line 50. The line 50 is connected to the base of a transistor 164 by a resistor 166. The emitter of the transistor 164 is grounded and its collector is connected to the base of a transistor 168. The transistor 168 and a second transistor 170 form the scan oscillator 44. The bases and collectors of the transistors 168 and 170 are cross-coupled through capacitors 172 and 174. The collectors of the transistors 168 and 170 are each connected to a positive source of potential at a terminal 176 through individual resistors 178. The bases of the two transistors are connected to the terminal 176 through individual resistors 180.

The scan oscillator 44 functions in the same manner as the multivibrator 54, that is, as an astable or free-running multivibrator producing an output square wave at a frequency dependent upon the RC time constant of the circuit. The frequency of the oscillator 44 is much higher than that of the multivibrator 54, however, and is preferably about 1kHz.

When the transistor 164 is saturated, by a positive signal applied thereto over the line 50 (when the flip-flop 52 is set), the collector of the transistor 164 is held close to ground potential, and the scan oscillator 44 is thereby disabled by maintaining the transistor 168 in its cut off condition. A positive pulse is produced on the line 50 when the collector of the transistor 102 goes high in response to a positive pulse on the line 74, applied to the base of the transistor 116, and the scan oscillator 44 is thereafter disabled until the flip-flop 52 is reset.

The collector of the transistor 170 is connected over the line 64 through a voltage divider comprising resistors 184 and 188 to the base of a transistor 186, which functions as the strobe switch 62. The emitter of the transistor 186 is connected to ground through a diode 190, and its collector is connected through a resistor 192 to the line 66.

The collector of the transistor 186 is also connected through a capacitor 196 and a pair of resistors 198 and 200 to the line 74, and to the base of the transistor 116, and also to ground through a resistor 202. As the transistor 116 is responsible for setting the start-stop flip-flop 52, it is apparent that the positive-going pulse over the line 74 which functions to set the flip-flop 52 is derived from the line 66. However, this pulse cannot reach the transistor 116 as long as the transistor 186 is conducting, since the collector of the transistor 186 is at that time held close to ground potential. Accordingly, the flip-flop 52 can only be set via the transistor 116 when the scan oscillator 44 is in its state in which the collector of the transistor 170 is low, cutting off the transistor 186. The collector of the transistor 168 is then at a high potential.

The scan oscillator 44 furnishes pulses which change the state of the counter 28. These pulses are derived from the collector of the transistor 168, and passed by the line 46 to the inputs of the buffer unit 30, which includes an up counting unit 32 adapted to furnish pulses for incrementing the counter 28, and a down counting unit 33 adapted to furnish pulses which decrement the counter 28. The counter 28 is preferably a type such as the Texas Instruments SN74193, which is adapted to be counted up or down in response to positive-going pulses applied to input terminals 206 and 208, respectively, provided the other input terminal in simultaneously held at a high potential. It is the function of the buffer unit 30 to apply pulses to the terminals 206 and 208 of the counter 28 while maintaining an elevated potential at the unused terminal.

The line 46 is connected through a voltage divider including resistors 210 and 211 to the base of a transistor 212, the emitter of which is grounded and the collector of which is connected, through a resistor 214, to a positive source of potential at a terminal 216. The transistors 212 functions as an inverter and is adapted to provide a positive-going pulse to the terminal 206 of the counter 28 in response to a negative-going pulse on the line 46. The line 46 is also connected through a voltage divider including resistors 217 and 219 to the base of a transistor 218, the emitter of which is grounded and the collector of which is connected through a resistor 220 to a source of positive potential at a terminal 222. The collector of transistor 218 is connected to the terminal 208 and is adapted to provide positive-going pulses to the terminal 208 in response to negative-going pulses present on the line 46. Only one of the two transistors 212 and 218 is enabled at any given time, in response to the potential on the line 40.

The line 40 is connected through a voltage divider including resistors 226 and 230 to the base of a transistor 228. The emitter of the transistor 228 is grounded and its collector is connected to the base of the transistor 212. Accordingly, when a high potential is applied to the line 40, the transistor 228 is saturated and the transistor 212 is rendered ineffective to supply pulses to the terminal 206. When a low potential is present in the line 40, however, the transistor 212 is effective to pass incrementing pulses to the counter 28.

The line 40 is also connected through a voltage divider including resistors 232 and 236 to the base of a transistor 234. The emitter of the transistor 234 is grounded and its collector is connected through a resistor 238 to a source of positive potential at a terminal 240. Its collector is also connected to the base of a transistor 235, the emitter of which is grounded and the collector of which is connected to the base of the transistor 218. Accordingly, when the potential on the line 40 assumes a low value, the transistor 234 is cut off and the transistor 236 is saturated, disabling the transistor 218. When the potential on the line 40 is high, however, the transistor 218 is effective to pass decrementing pulses to the counter 28.

The up/down buffer 30 is thus adapted to provide pulses at the proper polarity to the input terminals 206 and 208, in accordance with the potential on the line 40, connected from the mode-selector switches 42.

The four outputs of the counter 28 appear on lines 26a - 26d, and they are connected to the four inputs of the one-of-sixteen decoder 18. The one-of-sixteen decoder 18 produces a low level of one of its 13 outputs 20a - 20r. Only 13 of the 16 possible outputs of the decoder 18 are used, and the other three are unconnected. 12 lines, 20a - 20m, are applied to inputs of the keyers 10, and a thirteenth output 20r is connected to the line 19 which is connected to the input of the octave counter 76 (FIG. 2D). The 12 outputs, 20a - 20m, correspond to the 12 musical tones of an octave. Each is connected to one of the gate transistors 14a - 14m. For example, the line 20a is connected from an output of the decoder 18 through a resistor 244a to the base of the transistor 14a. The emitter of this transistor is grounded and its collector is connected through a resistor 246a to a terminal of a switch 22a which is closed by depression of a particular key of the lower manual. The other terminal of the switch 22a is connected to a source of positive potential at a terminal 248, so that, when the switch 22a is closed, a positive potential is applied to the collector of the transistor 14a. When this occurs at the same time that a low potential is applied on the line 20a, a high level signal appears on the line 16a. The line 16a is connected through a diode 249a to the line 66, and through a resistor 250a-1 to the base of a transistor 242a-1, the collector of which is connected to a source of positive potential at a terminal 254, and the emitter of which is connected through a diode 256a-1 to the line 12a-1. The line 12a-1 is connected to the upper manual keyer 258a-1 which is adapted to interconnect an output of the signal generator 260 to the output system of the muscial instrument.

The twelve switches 22a-22m are closed individually in response to depression of any one of the several octavely related keys of the lower manual. Thus, depression of any C key closes the switch 22a; depression of any B key closes the switch 22b; etc.

In similar fashion the collector of the transistor 14a is connected through a resistor 250a-2 to the base of a transistor 252a-2, the collector of which is connected to the terminal 254 and the emitter of which is connected through a diode 256a-2 to an output line 12a-2. The output line 12a-2 is connected to a keyer 258a-2 which is adapted to connect an output of the signal generator 260 to the output system of the instrument. The tone produced by operation of the keyer 258a-2 is one octave higher than that produced by the keyer 258a-1.

The collector of the transistor 14a is also connected through a third resistor 250a-3 to the base of a transistor 252a-3. The collector of the transistor 252a-3 is connected to the terminal 254 and its emitter is connected through a diode 256a-3 to the output line 12a-3. The line 12a-3 is connected to a keyer 258a-3, adapted to connect another signal from the signal generator 260 to the output system of the instrument. The tone produced thereby is one octave higher than the tone produced in response to the keyer 258a-2. The keyers 258a-1, 258a-2 and 258a-3 are connected to a line 262. The line 262 is connected to th input of the voicing unit 264 and the output of the voicing unit 264 is connected through an amplifier 266 to a loud speaker 268.

A switch 270 is connected from a source of positive potential at a terminal 272 to the control input of the keyers 258a-3, and is adapted to operate the keyer 258a-3 independently of the arpeggio system. The switch 270 is closed by a key of the upper manual of the musical instrument. Accordingly, the keyer 258a-3 may be operated either by the upper manual key switch 270 directly, or by the arpeggio keyer 10. Corresponding switches are provided for the other two keyers 258a-2 and 258a-3, and they are also operated by the appropriate keys of the upper manual.

As shown in FIGS. 2A - 2E, either of the other gate transistors 14b - 14m are connected through three individual keying transistors. It will be understood that these transistors are connected to others of the 36 output lines of the keyer unit 10, and that such output lines are connected to keyers adapted to connect individual outputs of the signal generator 260 to the output system of the instrument. Each of the gate transistors 14b - 14m leads to three octavely related keyers associated with the generator 260.

The base of the transistor 252a-1 is connected by a diode 274-1 to a line 86-1. In similar fashion, the bases of the transistors 252a-2 and 252a-3 are connected by diodes 274-2 and 274-3 to lines 86-2 and 86-3. Only one of the three lines 86-1 to 86-3 is high at any given time, so that only one of the three transistors 252a-1, 252a-2, and 252a-3 is able to conduct.

When the arpeggio system is not in use, the counter 28 is reset to its zero position, and the four output lines 26a - 26d in this case cause the decoder 18 to manifest a low potential on the output line 20r, and a high potential on all the remaining lines 20a - 20m. The transistors 14a - 14m are all saturated and the switches 22a - 22m are ineffective to operate the keyers 10. However, an additional set of switches, of which only the switch 22'a is shown, are also actuated by the keys of the lower manual, and they are connected to appropriate ones of the keyers to complete electrical circuits from the signal generator 260, or from another signal generator (not shown), through appropriate voicing circuits and then to the amplifier 266. Thus the keys of the lower manual are usable in the conventional manner when the arpeggio system is not in use.

The foot switch 90 establishes a connection from a source of positive potential at a terminal 276 through a diode 278, and through a voltage divider including resistors 280 and 282, to the reset terminal 284 of the counter 28. When it is desired to operate the arpeggio circuit, the foot switch 90 is operated to disconnect the reset terminal 284 from the terminal 276, allowing the counter 28 to be incremented or decremented.

The scan oscillator 44 normally operates continuously to provide a square wave on the line 46 which, when the up counting unit 32 is operative, provides a continuous sequence of pulses applied to the terminal 206 to successively increment the counter 28 when the foot switch 90 is open. This causes repetitive scanning of the lines 20a-20m connected to the outputs of the decoder 18, each line being scanned by lowering its potential while maintaining the potential of the others high.

Once during each cycle of the counter 28, the output line 20r is low, producing a pulse on the line 19 which increments the octave counter 76. The octave counter 76 is illustrated in FIG. 2D, along with a diode selection matrix 298 which functions to decode the output signals produced by the counter 76, and to energize one of several control lines, for programming operation of the system in a series of steps. The line 19 is connected to the clock input of a J-K flip-flop 284. The J and K inputs of the flip-flop 284 are connected in common through a resistor 286 to a source of positive potential at a terminal 288. The flip-flop 284 is therefore triggered by each pulse applied to the line 19, changing its state on the negative-going edge of each pulse.

The Q output of the flip-flop 284 is connected by a line 290 to the clock input of a J-K flip-flop 292. Similarly, the Q output of the flip-flop 292 is connected by a line 294 to the clock input of a flip-flop 296. The J and K inputs of the flip-flops 292 and the K input of the flip-flop 296 are connected in common with those of the flip-flop 292. The J input of the flip-flop 296 is connected to the terminal 288 through a separate resistor 297. The three flip-flops comprise a three stage binary counter. Six outputs are derived from the counter, and are connected from the Q and Q outputs of each of the flip-flops 284, 292 and 296 to six lines of the diode matrix 298, which is provided for decoding the state of a counter 76 and producing a high level on one of seven output lines 301-307, in accordance with the instantaneous state of the counter 76.

Each of the seven output lines 301-307 is connected through a separate resistor 308 to a positive potential at a terminal 310. The line 301 is connected to the anodes of three diodes 312, 314 and 316, the cathodes of which are connected, respectively, to the three Q outputs of the flip-flops 284, 292 and 296. Accordingly, the level on the line 301 goes high when all of flip-flops 284, 292 and 296, have high potentials applied to their Q outputs, so that all three diodes 312, 314 and 316 are blocked. When the counter 76 is in another state, one or more of the three diodes 312, 314 and 316 conducts, clamping the potential of the output line 301 substantially to ground. Each of the lines 302-307 is connected in a similar fashion, to decode one individual state of the counter 76. Each of the lines 302-307 is connected to three individual diodes which are connected to a unique combination of the Q and Q outputs of the counter 76. The lines 301-307 are energized successively in numerical order as the counter 76 is incremented by the pulses applied thereto on the line 19.

When the counter 76 manifests a binary 6, in which the Q output of the flip-flop 284 is high and the Q outputs of the flip-flops 292 and 296 are high, the line 307 goes high, passing a positive pulse through a diode 318 to the base of a transistor 320. The emitter of the transistor 320 is connected to ground and its collector is connected to a source of positive potential at a terminal 322 through a resistor 324. The transistor 320 saturates in response to the positive pulse passed by the diode 318, and the potential at its collector is reduced substantially to ground. The collector is connected by line 326 to the reset inputs of the flip-flops 284, 292, 296, so that the instant that the counter 76 manifests a binary 6, it is reset to binary zero. Therefore, the radix of the counter 76 is limited to six, and the six output lines 301-306 are all energized for approximately equal periods during each cycle of operation of the counter 76. The counter 76 is also reset by the foot switch 90, by connecting the terminal 276 to the line 442 via a diode 440. The line 442 is connected to the base of the transistor 320 through a voltage divider including resistors 444 and 446.

As the pulses applied to the input of the counter 76, via the line 19, are derived from the output line 20r of the decoder 18, the counter 76 is incremented during each complete scan of the output lines 20a-20r of the decoder 18, which occurs during each complete cycle of operation of the counter 28. This corresponds to the scan of one complete octave of 12 adjacent keys of the lower manual, so that the count manifested in the counter 76 corresponds to a binary representation of the number of complete octaves scanned during the period following the resetting of the counter 76. The signals applied to the lines 301-306 therefore correspond to time intervals related to particular octaves which are scanned following resetting of the counter 76. These lines are applied as inputs to the mode selector switches 42 (FIG. 2E) for the purpose of controlling the operation of the system in a variety of different modes.

Five individual mode selecting switches 331-335 are provided in the group 42. Each of the switches 331-335 is a 6 pole double-throw switch, as illustrated. When any one of the switches is selected by movement of its respective actuator 331'-335', all of its poles simultaneously change their condition from that illustrated in FIG. 2E to the opposite condition. The switches are interconnected in a network so that a plurality of control signals are developed in response to various combinations of input signals. Lines 301-306 are connected to six inputs of the network, each being representative of a unique state of the counter 76. Another input is supplied over a line 336, connected from the Q output of the flip-flop 284 (FIG. 2D).

One output of the network is provided on a line 338, connected to the line 40' to control the direction of the up-down counter 28. Another output is provided on a line 340 which is connected to the J input of the flip-flop 296. The two lines 80 and 82 are connected as outputs for controlling the selection of one of the three octaves by the keyers 10. A final output line 342 is provided, connected through a diode 344 to the line 50 (FIG. 2A), for the purpose of disabling the scan oscillator 44 when none of the switches 331-335 have been operated.

When the first switch 331 is selected, an Up-Only arpeggio mode is performed, in which an arpeggio process is produced over a range of three octaves, beginning with the lowest selected note of the first octave and extending through the highest selected note of the third octave. When the second switch 332 is actuated, the circuit performs a Down-Only mode, in which an arpeggio is produced which extends over three octaves, beginning with the highest selected note in the highest octave and ending with the lowest selected note in the first octave. Notes are selected in accordance with the keys 22a-22m of the lower manual which are operated, and each selected note is played individually in succession, each for substantially the same duration. The same notes are played in each octave as a result of the three keying transistors of the keyers 10 which are connected to each output line 16 of the gates 18.

The third switch 333 selects an Up-Down One Octave mode, producing an arpeggio which begins at the lowest of the first octave and moves upwardly through the first octave to the highest selected note, and then returns downwardly therethrough to the lowest selected note, repeating the cycle as many times as desired. When the switch 334 is actuated an Up-Down Two Octave mode is selected, in which an arpeggio is produced which extends upwardly through the first and second octaves and then downwardly through the second and first octaves, repeating the process over and over. The switch 335 selects an Up-Down Three Octave mode, in which the arpeggio extends upwardly through all three octaves and then downwardly through all three octaves, repeating the process over and over.

When the Up-Only mode is selected, by depression of the switch 331, the first pole 331a interrupts the circuit extending from the line 301 to the output line 342. The line 301 is high during the first octave, while the state of the octave counter 76 is zero, having been reset over the line 442 by means of the foot switch 90. The positive potential normally applied over the line 342 through the diode 344 to the line 50 (FIG. 2A) maintains the scan oscillator 44 in disabled condition, while the octave counter 76 is in its "0" state. Disconnection of this circuit by means of the first pole of switch 331' however, permits the scan oscillator 44 to function, with a result that pulses are supplied over the line 46 through the counting unit 32 to increment the counter 28 once during each cycle of the oscillator 44. This condition persists through an entire cycle of the counter 28, at the end of which the line 19 receives a signal from the decoder 18, and the counter 76 is incremented to its binary "1" state.

The line 302 is provided with a high potential during the binary "1" state of the counter 76, and by operation of the second pole 331b of the switch 331 this potential is applied to the line 80, which causes the octave enable control unit 84 to raise the potential on the line 86-2, and lower the potential on the line 86-1, which was high while the counter 76 was in its zero state. The scan oscillator 44 continues to function, so that the counter 28 is continually incremented and the second octave is scanned by successively energizing outputs of the decoder 18. As the line 86-2 has a high potential, outputs for keying notes in the second octave are supplied over the output lines 12 of the keyer 10. At the end of the second octave the line 19 is again pulsed to increase the state of the counter 76 to binary "2". This produces a high potential on the line 303, which is connected by the third pole 331c of the switch 331 to the output line 82. The octave enable control unit 84 then raises the potential on the line 86-3, permitting keying of the third octave keyers during the next scan of the decoder 18.

At the end of the scan of the third octave, the line 19 again is provided with a pulse to increment the counter 76 to its binary "3" state, at which time the line 304 goes high. This line is connected through the fourth pole 331d of the switch 331 to the output line 342. This places a high potential on the line 50 via the line 342 (FIG. 2A) which saturates the transistor 164 and disables the scan oscillator 44, so that no further scanning occurs, while the octave counter is in it binary "3" state. As the scan oscillator 44 is disabled, no further pulses appear on the line 19 and the counter 76 remains in its binary "3" state until again reset by operation of the foot switch 90.

The fifth pole 331e of the switch 331 connects the output line 338 to ground, to cause the buffer 30 to pulse only the input 206 of the counter 28. The sixth pole 331f of the switch 331 limits the radix of the counter 76 to 4, so that the next pulse applied to the input line 19 of the counter 76 resets the counter to its zero state rather than incrementing it to its binary "4" state. This is accomplished by connecting the J input of the flip-flop 296 to ground so that it remains in its reset state even after a pulse is supplied to the line 294.

When the Down-Only mode switch 332 is actuated, the first pole 332a of the switch 332 interrupts the circuit between the input line 301 and the output line 342, and instead connects the input line 301 to the output line 82, to enable the third octave during the time that the counter 76 is in its "0" state. The fifth pole 332e of the switch 332 connects the output line 338 to a source of positive potential at a terminal 344, so that the line 40 is maintained at a high potential, permitting the application of pulses to the down counting input terminal 208.

The second pole 332b of the switch 332 connects the line 302, which is high while the counter 76 is in its binary "1" state during which the second octave is scanned, to the output line 80, permitting the octace enable control unit 84 to raise the potential on the line 86-2. The third pole 332c of the switch 332 disconnects the line 303, which is high during the binary "2" state, from any output line. As a result the output lines 80 and 82 are both low during the time that the third octave is scanned, while the counter 76 is in its binary "2" state, permitting the octave enable control unit 84 to raise the potential on the line 86-1 to select the first octave of the keyer 10. The fourth pole 332d of the switch 332 connects the input line 304 to the output line 342 to disable the scan oscillator 44 when the scan of the first octave is complete.

The sixth pole 332f of the switch 332, like that of the switch 331, limits the radix of the counter 76 to 4, so that the next pulse appearing on the line 19 does not set the flip-flop 296.

When the switch 333 is actuated, an Up-Down One Octave mode is selected. The first pole 333a of the switch 333, like that of the other switches described above, opens the connection between the input line 301 and the output line 342. The second pole 333b of the switch 333 interrupts any connection of the input line 302. Similarly, the third pole 333c of the switch 333 interrupts any connection of the input line 303 and the fourth pole 333d interrupts any connection of the input line 304. The fifth pole 333e of the switch 333 connects the input line 336 with the output line 338. As the level on the input line 336 changes with each pulse applied to the counter 76 over the line 19, the state of the output line 338 is caused to change in a corresponding manner, with a result that the counter 28 is counted up during the first octave scanned and then counted down during the second octave scanned, after which the operation is repeated continuously until the switch 90 is closed, after which the counter is held in its zero state. The sixth pole 333f of the switch 333, like those of the switches 331 and 332, limits the radix of the counter 76 to 4, to maintain the flip-flop 296 in its reset state. Neither the output lines 80 and 82 are high at any time while the switch 333 is actuated so that only the first octave of the keyer circuits 10 is selected by the control unit 84.

When the switch 334 is actuated, its first pole 334a interrupts the connection between the input line 301 and the output line 342, just as described above. The second pole 334b of the switch interconnects the input line 302, which is high during the scanning of the second octave, to the output line 80, which brings about a high potential on the line 86-2. The third pole 334c of the switch 334 connects the input line 303 through a diode 346 to the output line 80, so that the high potential on the line 86-2 continues. Simultaneously a diode 348 connects the input line 303 to the output line 338, through a series connection including the fifth poles 331e-333e of the switches 331, 332 and 333, to provide a high potential on the line 338 while the counter is in its binary "2" state, to enable the counter 28 to be counted downwardly.

The fourth pole 334d of the switch 334 connects the input line 304 with the output line 338 to continue the high potential applied to the line 338 while the counter 76 is in its binary "3" state.

The fifth pole 334e of the switch 334 is not functional and the sixth pole 334f limits the radix of the counter 76 to 4, as described above.

When the switch 335 is energized, to select the Up-Down Three Octave mode, the interconnection between the input line 301 and the output line 372 is broken by the first pole 335a of the switch, in the same manner as described above. The second pole 335b of the switch 335 connects the input line 302 to the output line 80 to present a high potential on the line 86-2, allowing the keyers of the second octave to be operated. The third pole 335c of the switch 335 interconnects the input line 303 with the output line 82 to produce a high potential on the line 86-3, to enable the third octave of the keyers 10 to be operated while the counter 76 is in the binary "2" state. The fourth pole 335d of the switch 335 connects the input line 304 through a diode 350 to the output line 82 to continue to present a high potential on the line 86-3 while the counter 76 is in its binary "3" state. Simultaneously the input line 304 is connected by a diode 352 to the output line 338 through the fifth pole of each of the switches 331, 332 and 333, to select the down counting direction for the counter 28.

The fifth pole 335e of the switch 335 connects the input line 305 through a diode 354 to the output line 80 to operate the second octave of the keyers 10 by raising the potential on the line 86-2. The diode 356 also connects the input line 305 to the output line 338 through the fifth poles of the switches 331, 332 and 333 to maintain the downward counting direction of the counter 28 while the counter 76 is in its binary "4" state. The switch pole 335f of the switch 335 connects the input line 306 to the output line 338 through the fifth poles of the switches 331, 332 and 333 to maintain a downward counting direction while the counter 76 is in its binary "5" state. The next pulse applied to the input of the counter 76 over the line 19 briefly places the counter in its binary "6" state, but the transistor 320 immediately resets it to its zero state, so that the operation described above can be repeated.

The output line 342, which results in disabling the scan oscillator 44 after a single arpeggio cycle, is energized while the counter 76 is in its "3" state only when the switches 331 and 332 are actuated. Accordingly, the up-down modes selected by the switches 333, 334 and 335 are continuous and the arpeggio produced when these switches are actuated is performed continuously as long as any of the lower manual switches 22 are closed. The actuators 331'-335' of the switches 331-335 are preferably of the push button, or rocker switch type, located within easy access of the player of the instrument, so that any one of them is selectable at the convenience of the operator. The actuators may be provided with mechanical interlock means (not shown) for resetting the unselected switches to unactuated condition upon the selection of any switch by depressing its actuator. As such interlock means is well known, it need not be specifically described here. When such an interlock means is not used, depression of two or more of the actuators 331-335 is effective to produce an arpeggio in the same manner as if only one of such actuators was depressed, that one being the actuator for the switch which is shown in a position furthest to the left in FIG. 2E. Therefore, if the switch 331 is operated, operation of any oher switch does not vary the mode selected; if the switch 332 is operated, no other switch can vary the selected mode, except for the switch 331; and so forth.

The octave enable control unit 84 is connected with the two lines 80 and 82 from the mode selector switches 42, and with the lines 86-1 and 86-2 and 86-3. The unit 84 functions to maintain two of the output lines at a low potential and to raise the potential of the third output line.

The octave enable control unit 84 includes a transistor 360 which has its base connected by a resistor 362 to the line 80. The collector of the transistor 360 is connected through a resistor 364 to a source of positive potential at a terminal 366, and the emitter of the transistor 360 is grounded. The collector of the transistor 360 is connected to the base of a transistor 368, the emitter which is grounded and the collector of which is connected to the output line 86-2. Accordingly, when the input line 80 is high, the transistor 360 is saturated, and the transistor 368 is cut off, effectively removing diodes 274-2, etc., from the circuit. The potential applied from any of the collectors of the transistors 14a - 14m will then be applied through resistors 250a-2, etc., to the corresponding bases of transistors 252a - 252m. When the potential on the line 80 is low, the transistor 360 is cut off, thereby saturating the transistor 368 and maintaining the line 86-2 at a low potential.

A similar circuit is connected to the input line 82. A transistor 370 has its emitter grounded and its collector connected through a resistor 372 to a positive potential at a terminal 374. The base of the transistor 372 is connected to the line 82 through a resistor 376. The collector of the transistor 370 is connected to the base of a transistor 378, the emitter which is grounded and the collector of which is connected to the line 86-3.

A pair of diodes 380 and 382 have their anodes connected respectively to the lines 80 and 82 and their cathodes connected in common and through a resistor 384 to the base of a transistor 386. The emitter of the transistor 386 is grounded and its collector is connected to the line 86-1. Accordingly, when either of the input lines 80 and 82 is high, the transistor 386 is saturated and the line 86-1 is clamped to ground. When neither of the input lines 80 and 82 is high, however, the transistor 386 is cut off and the diodes connected to the line 86-1 are effectively removed from the circuit.

When any of the switches 333, 334, and 335 are actuated the arpeggio keyer is operated continuously in an up and down direction as described above. As reversal of the scanning direction occurs only after a pulse is produced on the line 19, the first one of the operated keys 22 to be scanned after reversal is the same as the last operated key to be scanned before reversal. In order to prevent the tone produced in the output system from being sounded twice in succession, in production of the arpeggio, which is undesired, the disable circuit 70 is provided. A reversal in the direction of scan is signaled by a change in state on the line 338. The line 338 is connected by a line 72 to a voltage divider (FIG. 2B) including resistors 390 and 392, and the output of the voltage divider is connected to the base of a transistor 394. The emitter of the transistor 394 is connected to ground and its collector is connected through a resistor 396 to a source of positive potential at a terminal 398. The collector is also connected through a resistor 400 to the base of a transistor 402. The emitter of the transistor 402 is grounded and its collector is connected to a source of positive potential through a resistor 404 at a terminal 406. The transistor 394 functions as an amplifier and the transistor 402 functions as an inverter. Equal and opposite signals are thus provided at the collectors of the two transistors 394 and 402. The collector of the transistor 394 is connected through a capacitor 408 to the anode of a diode 410. The cathode of the diode 410 is connected to one terminal of a capacitor 412, the other terminal being connected to ground. Similarly, the collector of the transistor 402 is connected through a capacitor 414 to the anode of a diode 416, the cathode of which is connected to the ungrounded terminal of the capacitor 412. Both capacitors 414 and 408 are clamped to ground individually by a pair of diodes 418, to bypass negative-going pulses passed by the capacitors 408 and 414.

The capacitors 408 and 414 function as differentiator circuits, so that a positive going pulse is passed by one of the diodes 410 and 416 and applied to charge the capacitor 412, each time the collector of its associated transistor goes high. The collector of the transistor 394 goes high whenever there is a negative-going change in potential on the line 72, and conversely, the collector of the transistor 402 goes high whenever there is a positive-going change in potential on the line 338. Thus, each time there is a change in the level of potential on the line 338, a positive pulse is applied to the capacitor 412.

A resistor 420 is connected in parallel with the capacitor 412. The value of the resistor 420 is relatively high, so the capacitor 412 maintains substantially its full charge during the interval between two successive pulses on the line 66, which is equal to approximately one period of the multivibrator 54.

The ungrounded terminal of the capacitor 412 is connected through a resistor 422 to the base of a transistor 424, the emitter of which is grounded and the collector of which is connected to the junction of the resistors 198 and 200. While the capacitor 412 remains charged, the transistor 424 is saturated, maintaining the potential at the junction of the resistors 198 and 200 substantially at ground. Accordingly, a pulse appearing on the line 66 is prevented from producing a positive-going pulse on the line 74, since the transistor 424 clamps the most positive potential which can exist on the line 74 to substantially ground potential. As a result, the capacitor 196 is charged to the potential corresponding to the height of the pulse on the line 66. When the positive-going pulse on the line 66 ends, the capacitor 196 is discharged through resistors 198, 200, and 202, and while doing so, produces a negative potential on the line 74. The line 74 is connected through a capacitor 426 to the base of a transistor 428. The transistor 428 is normally biased into conduction by current flowing through a resistor 430, connected between the base and a source of positive potential applied to a terminal 432. The negative potential on the line 74 cuts off the transistor 428, which produces a positive pulse at its collector. The collector of the transistor 428 is connected through a resistor 434 to the terminal 432, and to the base of a transistor 436, the emitter of which is grounded and the collector of which is connected to the ungrounded terminal of the capacitor 412. Accordingly, the transistor 436 is operative to discharge the capacitor 412 in response to the negative potential on the line 74. The capacitor 412 thereafter remains dishcarged until the succeeding change in potential on the line 338. Thus, only one strobe pulse is prevented from reaching the line 74 following a change of potential on the line 338, and subsequent pulses are not inhibited.

The omitted strobe pulse is the one which is produced when the first operated switch 22 is scanned following the reversal in the direction of counting of the counter 28. The flip-flop 52 therefore is not set by this pulse. In this way successive retriggering of the same tone in an arpeggio is avoided.

In operation, when the foot switch 90 is operated to break the connection from the terminal 276 to the anodes of the diodes 278 and 440, the counters 28 and 76 are no longer maintained in their reset condition and are able to count pulses produced by the scan oscillator 44 and pulses produced at the output 20r of the decoder 18. This operation continues, with successive output lines 20a-20m going low, until a line is reached which is connected in circuit with an operated one of the switches 22a-22m. When this occurs, the corresponding one of the lines 16a-16m goes high, producing a strobe pulse on the line 66', via one of the diodes 249a - 249m.

The strobe pulse on the line 55 is defined by a high potential on the line 66, which begins at the instant that the counter 28 assumes the state corresponding to the output of the decoder 18 being scanned, which coincides with the condition in which both input terminals 206 and 208 are high. This occurs when the collector of the transistor 168 (FIG. 2A) of the scan oscillator 44 is low, corresponding to a high level on the line 64. The strobe switch 62 (FIG. 2B) is thereby disabled, until the state of the oscillator 44 changes and the potential on the line 64 goes low. The state of the counter 28 does not change when this happens, so that the potential on the line 66 remains high, and a strobe pulse is passed to the line 74, setting the flip-flop 52 and disabling the scan oscillator 44 by holding it in the state just described. At the time the strobe pulse is produced on the line 74, the multivibrator 54 is in the state in which the potential present at the collector of the transistor 122 is high, so a low potential is present at the collector of the transistor 144. Otherwise the scan oscillator 44 remains disabled by a high potential on the line 50. The scan oscillator 44 remains disabled, as a result of the flip-flop 52 until the end of the half cycle of the multivibrator 54, at which time the flip-flop 52 is reset via the transistor 118. However, the scan oscillator 44 remains disabled by the multivibrator 54, until at the end of its next half cycle, when the potential on the line 50 again goes low.

Therefore the counter 28 maintains its count for nearly an entire cycle of the multivibrator 54, being less than that interval only by the period required to advance the counter 28 until the next operated one of the switches 22 is reached. As the frequency of the scan oscillator 44 is much higher than that of the multivibrator 54, the period required for advancing the counter 28 is much less than one cycle of the multivibrator 54. In the interval in which the scan oscillator 44 is disabled, the output of the decoder 18 remains constant, thus operating one of the keyers 10, the associated transistor 252a-1 through 252m-3 energizing the associated keyer 258, etc. Upon resumption of the scan oscillator 44, scanning continues, under the control of the mode selector switches 42, until another operated switch 22 is encountered.

The relatively high frequency of the scan oscillator 44 results in an apparent zero delay between successive tones of the arpeggio, each of which is sounded for substantially the same interval. There is, therefore, no so-called loping, an undesirable feature characteristic of systems in which the scanning rate is uniform, both between tones and during tones.

When the Up-Only mode is selected, the scanning begins at the bottom of the first octave and continues upwardly through three octaves and tones are sequentially sounded corresponding to selected keys in each of three octaves. Thereafter, operation ceases until after the counters, 28 and 76, are reset by operation of the foot switch 90, after which the operation is repeated once, and then stopped again.

When the switch 332 is selected, the operation is identical, except that scanning occurs downwardly beginning with the upper end of the highest octave and ending with the lower end of the lowest octave.

When any of the three remaining selector switches are actuated, scanning is continuous in an up, then down, then up, etc., sequence. The range of the scanning is under control of the switches 42, and extends for once octave when the switch 333 is actuated, for two octaves when the switch 334 is actuated, and for three octaves when the switch 335 is operated. The arpeggio produced is continuous until the keys which operate the switches 22 are released or until the foot switch 90 is closed.

It will be appreciated that the arpeggio system of the present invention does not interfere in any way with normal operation of the musical instrument. The lower manual key switches such as 22'a are functional in the ordinary way to permit signals to be selected for connection to the output system, through voicing circuits selector therefor, in response to depression of the keys of the lower manual. Similarly, switches like the switch 270 of the upper manual are effective to operate the keyers like the keyer 258a-1, etc., in the conventional way, to produce tones normally associated with the upper manual. As long as the foot switch 90 remains closed, the counters 28 and 76 remain reset, and the arpeggio system does not function, while permitting ordinary operation of the instrument.

Referring now to FIG. 3, a functional block diagram of the counter 28 is illustrated. This counter is like a commercially available counter, such as the Texas Instruments SN74193 incorporating the functional equivalent of four flip-flops 441-444, each of which has its clock input connected to one of four OR gates 445-448. The two inputs of the OR gate 445 are connected individually through a pair of inverters 449 and 450 from a pair of input terminals 451 and 452. Inputs supplied to the terminal 441 function to count the four stage binary counter made up of the four flip-flops 441-444, connected in cascade, in a normal upward counting direction. Input pulses applied to the input terminal 452 result in the counter being decremented once for each pulse so applied. Three OR gates 446-448 each have two inputs connected to the output of an individual pair of six NAND gates 453-458. The NAND gates 453-458 are each connected to the Q and Q outputs of an individual one of the flip-flops 441-443, and are individually energized in response to the outputs of one of the two inverters 449 and 450. Three of the NAND gates are connected to the inverter 449 and the other three of the NAND gates are connected to the inverter 450. One set of these are enabled for conduction at any given time, depending on which of the input terminals 451 and 452 has pulses applied thereto. An additional inverter 459 is connected from an input terminal 460 to the reset inputs of each of the flip-flops 441-444, to reset the state of the counter in response to a reset pulse present at the terminal 460.

FIG. 4 is a functional block diagram of the decoder 18, which is similar to a commercially available unit such as the Texas Instruments SN74154. Four inputs are applied to input lines 461-464, and four inverters 465-468 have their input terminals connected to the input lines 461-464. 13 NAND gates 469 are provided, each having four input terminals. 16 output terminals 470 are provided, one for each of the NAND gates 469. The four inputs of each of the NAND gates 469 are each connected either to one of the input lines 461-464 or to the input of the inverter connected with such input line. The four inputs of all of the NAND gates 469 are connected in unique combinations of the input lines and inverter outputs, so that only one of the NAND gates 469 is operative to produce a low level output signal at its output 470 in response to any particular combination of signals applied to the input lines 461-464.

Each of the NAND gates 469 may be constructed in the manner illustrated in FIG. 5, which is a schematic circuit diagram of the functional content of the NAND gates 469. Each gate is similar to a commercially available unit such as is included within a Texas Instruments SN7420. As shown in FIG. 5, four input lines 471-474 are applied to individual emitters of the multiple emitter transistor 475. The base of the transistor 475 is connected to a source of positive potential at a terminal 476, through a resistor 477, and its collector is connected to the base of the transistor 478, the collector of which is connected to the terminal 476 through a resistor 479, and the emitter of which is connected to ground through a resistor 480. The collector of the transistor 478 is connected to the base of the transistor 481, and the emitter of the transistor 478 is connected to the base of the transistor 482. The collector of the transistor 481 is connected to the terminal 476 through a resistor 483, and its emitter is connected through a diode 484 to an output terminal 485. The output terminal is also connected with the collector of the transistor 482, the emitter of which is grounded.

When all four of the input lines 471-474 have relatively positive potentials applied thereto, the transistor 475 is cut off, thereby saturating the transistor 478, and allowing the transistor 482 to become saturated, thereby clamping the output terminal 485 to ground. When any one of the input lines is low, the transistor 475 is saturated, thereby cutting off the transistor 478, resulting in saturating the transistor 481 and cutting off the transistor 482, which applies a positive potential to the output terminal 485.

Although the NAND gate of FIG. 5 has been described in terms of discrete components, it is understood that such components are merely the functional equivalents of an integrated circuit, and do not necessarily exist in the form illustrated in FIG. 5, even within the integrated circuit.

FIG. 6 illustrates a functional block diagram of a J-K flip-flop such as one-half of a unit such as the Texas Instruments SN7473. The flip-flop illustrated in FIG. 6 may be employed for the J-K flip-flops employed in the counter 76, and comprises a combination of two R-S flip-flops one of which serves as a master flip-flop, with the other serving as a slave flip-flop. The master flip-flop incorporates a pair of NOR gates 487 and 488, the outputs of which are cross-coupled to their inputs via a NAND gate 489 and an inverter 490. The master flip-flop is set by means of an input applied to a J terminal 491, which is connected to one input of a NAND gate 492 having its output connected to a second input of the NOR gate 487. The K input terminal 493 of the flip-flop is connected to an input of a NAND gate 494, the output of which is connected to a second input of the NOR gate 488.

The slave flip-flop comprises cross-coupled NAND gates 495 and 496, the outputs of which are respectively connected to the Q output terminal 497 and Q output terminal 498. A switching circuit for causing the slave flip-flop to assume the condition of the master flip-flop, incorporates a pair of NAND gates 499 and 500, and a pair of pnp transistors 501 and 502. The emitters of the two transistors 501 and 502 are connected to the clock terminal 503. Although the master and slave flip-flops are normally isolated from each other, when the clock pulse terminal 503 is presented with a high potential, the master flip-flop is set in accordance with the input data present at the J-K input terminals 491 and 493. If both terminals are high, the state of the flip-flop is toggled. Meanwhile, the condition of the slave flip-flop remains the same until the potential on the clock terminal 503 goes low, and at that instant the slave flip-flop is caused to assume the same condition as the master flip-flop. A clear input terminal 504 is connected with an input of each of the NAND gates 489, 492, 499 and 496, to reset the condition of the master and slave flip-flops irrespective of the condition of the terminals 491, 493 and 503.

Although the preferred embodiment of the present invention has been described in terms of an instrument such as an electronic organ having two keyboards, referred to as the upper and lower manuals, it is apparent that the present invention is not so restricted and is equally well adapted for use with other instruments such as a piano, an accordian, or the like. The switches described above as being operated by the keys of the lower manual may instead be operated by chord selecting push buttons, or by the left hand portion of a single keyboard. The tones of the arpeggio have been described above as being the same ones which are selectable by the switches operated by the keys of the upper manual, but instead may be derived from a signal generator other than the one conventionally employed for use with the switches operated by the keys of the upper manual.

The arpeggio system of the present invention is well adapted for use as an add-on feature to an otherwise complete instrument.

The timer multivibrator 54 may, if desired, be replaced by other means for generating a periodic signal. For example, if the musical instrument is provided with a rhythm section for generating a periodic signal in response to a predetermined rhythm, which is a common adjunct of electronic organs, that signal may be employed by connecting such signal to the base of the transistor 144, in which case the multivibrator 54 is not needed. Alternatively, means may be provided for causing the multivibrator 54 to operate in synchronism with the signal from the rhythm section.

Although the preferred embodiment of the present invention has been described above, it will be apparent to those skilled in the art that various modifications and changes may be made without departing from the essential features of novelty thereof, which are intended to be defined by the appended claims.

Claims

What is claimed is:

1. A musical instrument comprising:

a. generator means for producing a series of signals corresponding to a plurality of musical tones;

b. a keyboard;

c. a set of key-operable switches operable by the keys of said keyboard;

d. a series of control gates for selectively interconnecting the key-operable switches in circuit with said generator means for producing tones in response to operation of said gates;

e. scanning means for sequentially scanning said key-operable switches and for operating said control gates in response to operated ones of said key-operable switches; and

f. control means connected with said scanning means for successively halting the operating of said scanning means at operated ones of said key operated switches.

2. Apparatus according to claim 1, wherein said scanning means include a relatively high frequency scanning oscillator, and means connected to said oscillator and responsive thereto for scanning said key-operable switches at a rate corresponding to the frequency of said scanning oscillator, and including a relatively low frequency timing oscillator connected with said control means, said control means being operative to halt said scanning means for an interval corresponding to approximately the period of one cycle of operation of said timing oscillator.

3. Apparatus according to claim 1, including means connected with said control means for operating successive ones of said control gates with substantially no delay between the period during which one such gate is operated and the period in which the next successive gate is operated, relative to the duration of operation of each gate, whereby an arpeggio is produced with substantially no delay between successive tones of said arpeggio.

4. Apparatus according to claim 1, including mode selector means connected with said scanning means for causing said scanning means to scan in one direction during a first period and to scan in the opposite direction during a second period, and disable means connected with said scanning means for inhibiting said scanning means from halting at the first of said operated switches which is scanned during said second period.

5. Apparatus according to claim 4 wherein said disable means is interconnected between said scanning means and said control means and is operative to transfer a strobe signal to said control means each time one of said operated switches is scanned, and means interconnecting said disable means when said mode selector means and responsive to a signal furnished by said mode selector means in connection with a change in scanning direction thereby, for inhibiting transfer of one of said strobe signals.

6. A musical instrument comprising:

a. generator means for producing a series of signals corresponding to a plurality of musical tones;

b. a keyboard;

c. a set of key-operable switches operable by the keys of said keyboard;

d. a series of control gates connected with said switches and with said generator means for selectively interconnecting the key-operable switches in circuit with said generator means for producing tones in response to operation of said gates;

e. scanning means for sequentially scanning said key-operable switches and for sequentially selecting and operating said control gates in response to operated ones of said key-operable switches; and

f. control means connected with said scanning means for temporarily preventing said scanning means from selecting another control gate for a predetermined interval each time an operated one of said key-operable switches is scanned.

7. Apparatus according to claim 6 wherein said scanning means comprises means for sequentially energizing a plurality of scanning lines, and circuit means interconnecting said scanning lines with said key-operable switches.

8. Apparatus according to claim 6 wherein said scanning means comprises a counter operative to manifest output signal corresponding to the number of pulses applied to an input terminal thereof and a decoder connected to receive said output signals from said counter and responsive thereto for successively energizing one of a plurality of scanning lines, and circuit means for connecting said scanning lines with said key-operable switches.

9. Apparatus according to claim 8 including means for connecting said key-operable switches with said gates, and means for connecting said scanning lines with said gates, whereby said gates are actuated in response to operation of said switches when their respective scanning lines are energized.

10. Apparatus according to claim 6, including an output system for producing musical tones in response to signals applied thereto, and a plurality of keyers connected with said output system and with said generator means for selectively connecting the signals from said generator to said output system, and means connecting said keyers individually with said control gates, said keyers being responsive to the operation of corresponding ones of said gates.

11. Apparatus according to claim 10 including means for connecting one of said key-operable switches directly to the control input of said keyer, whereby said keyer is directly operated by said one switch, and said keyer is operated by a control gate when a different one of the key-operable switches is closed.

12. Apparatus according to claim 10 including means for connecting each scanning line with a plurality of keyers connected with octavely related ones of said signals, and octave control means connected individually with corresponding keyers within each plurality for individually enabling said keyers for operation.

13. Apparatus according to claim 6 including a manually operable mode selector switch for selecting one of a plurality of operating modes of operation said scanning means being connected with said mode selector switch and operable to scan said key-operable switches in one direction or the other in response to the condition of said switch.

14. Apparatus according to claim 6 wherein said scanning means comprises an oscillator, a counter having an input connected with said oscillator for counting the cycles thereof, and decoder means connected with said counter for producing an output signal on one of a plurality of output lines in response to the state of said counter.

15. Apparatus according to claim 14 including a flip-flop, means for connecting said oscillator with said flip-flop for disabling said oscillator when said flip-flop is in one of its two stable states, and means responsive to the operation of one of said key-operable switches for producing a pulse for setting said flip-flop to its said one state.

16. Apparatus according to claim 15, including a second oscillator, means for inter-connecting said second oscillator and the first oscillator for disabling said first oscillator when said second oscillator is in a predetermined state, means for connecting said second oscillator when said flip-flop for resetting said flip-flop once during each cycle of said second oscillator, and means for operating said first oscillator for a plurality of cycles during an interval beginning with the resetting of said flip-flop in response to the end of a half cycle of operation of said second oscillator, and ending with a pulse produced by operation of one of said key-operable switches, whereby the state of said counter is advanced by a number of units corresponding to the number of cycles of operation of said first oscillator during said interval.

17. Apparatus according to claim 6, including an octave counter operative to count the number of cycles of operation of said scanning means, a decoding matrix connected with said counter for producing output signals sequentially on individual ones of a plurality of control lines, and a plurality of mode selector switches connected with said control lines and adapted to control the direction of scanning of said scanning means.

18. Apparatus according to claim 6, wherein said instrument includes means for generating periodic timing signals for controlling the timing of certain ones of said gates, including timing means connected to receive said timing signals and for controlling the length of said predetermined interval in response thereto.

19. Apparatus according to claim 18, wherein said timing signals are derived from rhythm section of said instrument, and said timing means includes means for establishing the length of each of said predetermined intervals equal to the period of said periodic timing signals.