U.S. patent number 3,813,665 [Application Number 05/294,060] was granted by the patent office on 1974-05-28 for condition warning memory circuit.
This patent grant is currently assigned to The Bendix Corporation. Invention is credited to Richard John Anderson, Alfred Levine, Walter Parfomak.
United States Patent |
3,813,665 |
Parfomak , et al. |
May 28, 1974 |
CONDITION WARNING MEMORY CIRCUIT
Abstract
For use with a system for converting coded condition data to an
analog signal corresponding to the condition, a memory type
condition warning circuit having calibrating capabilities.
Inventors: |
Parfomak; Walter (Wallington,
NJ), Anderson; Richard John (Fairfield, NJ), Levine;
Alfred (Waldwick, NJ) |
Assignee: |
The Bendix Corporation
(Teterboro, NJ)
|
Family
ID: |
23131711 |
Appl.
No.: |
05/294,060 |
Filed: |
October 2, 1972 |
Current U.S.
Class: |
340/661; 327/74;
327/50 |
Current CPC
Class: |
G01R
19/16595 (20130101) |
Current International
Class: |
G01R
19/165 (20060101); H03b 005/20 (); G08b
021/00 () |
Field of
Search: |
;328/148,147,149,146
;307/235R ;340/248A,347DA,347AD |
References Cited
[Referenced By]
U.S. Patent Documents
Primary Examiner: Robinson; Thomas A.
Attorney, Agent or Firm: Cuoco; Anthony F. Hartz; S. H.
Claims
What is claimed is:
1. For use with a system providing a signal corresponding to a
condition, apparatus comprising:
a reference signal source;
means connected to the reference signal source and responsive to
the signal therefrom for providing first and second calibrating
signals;
means connected to the system and to the calibrating signal means
for comparing the condition signal to the first and second
calibrating signals and providing operating outputs in accordance
with said comparison;
condition warning means; and
means connected to the comparison means and to the condition
warning means for applying the operating outputs to operate the
warning means when the condition signal is at a predetermined
critical level.
2. Apparatus as described by claim 1, wherein the means connected
to the reference signal means and responsive to the signal
therefrom for providing the first and second calibrating signals
includes:
a network including a plurality of resistors connected in
parallel;
switching means connected to the reference signal source and
selectively connected to one of the plurality of resistors for
applying the reference signal through said resistor to provide the
first calibrating signal at an output of the network;
signal divider means connected to the resistor network output and
responsive to the first calibrating signal for providing the second
calibrating signal; and
the first calibrating signal corresponding to the second
calibrating signal plus a predetermined constant commensurate with
the predetermined critical level of the analog signal.
3. Apparatus as described by claim 2, wherein the means connected
to the system and to the calibrating signal means for comparing the
condition signal to the first and second calibrating signals and
providing operating outputs in accordance with said comparison
includes:
first means connected to the system and to the resistor network for
comparing the signals therefrom;
second means connected to the system and to the signal divider for
comparing the signals therefrom;
the first and second means being ineffective for providing
operating outputs when the condition signal is equal to or less
than the second calibrating signal less the predetermined
constant;
the second means providing an operating output when the condition
signal equals the second calibrating signal; and
the first and second means providing operating outputs when the
condition signal is equal to or greater than the first calibrating
signal.
4. Apparatus as described by claim 3, wherein;
the operating output provided by the first means overrides the
operating output provided by the second means.
5. Apparatus as described by claim 3 wherein the means connected to
the comparison means and to the condition warning means for
applying the operating outputs to operate the warning means when
the condition signal is at a predetermined critical level includes
a current flow control circuit, said circuit comprising:
first current flow control means connected to the second means and
to the warning means for passing the operating output from said
second means to operate the warning means; and
second current flow control means connected to the first means and
to the first current flow control means and responsive to the
operating output from the first means for maintaining the first
current flow control means effective to pass the output from the
first means.
6. Apparatus described by claim 3, wherein the current flow control
circuit includes:
third current flow control means; and
fourth current flow control means connected to the first means and
to the third current flow control means and affected by the
operating output from said first means for latching third current
flow control means conductive.
Description
CROSS REFERENCE TO RELATED APPLICATIONS
The present invention may be used with a system such as described
in copending U. S. application, Ser. No. 294,059 filed Oct. 2, 1972
by Moreines, et al. and assigned to The Bendix Corporation,
assignee of the present invention.
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to condition warning systems and
particularly, to condition warning systems having memory
characteristics. More particularly, the invention relates to
condition warning systems of the type described for achieving the
desired result by analog means instead of by the more complex
digital means.
2. Description of the Prior Art
Altitude information transmitted in accordance with Publication
1010.51A (Aug. 3, 1971) issued by the Department of Transportation,
Federal Aviation Administration, is converted to analog form as
described in the aforenoted copending U. S. application, Ser. No.
294,059. Utilizing means for the analog data include systems for
providing a warning when the altitude reaches some predetermined
critical value. Prior to the present invention complicated digital
apparatus has been used for this purpose. The present invention
uses simpler analog apparatus for achieving the result at a lower
cost, with fewer components and with reduced power
requirements.
SUMMARY OF THE INVENTION
This invention contemplates equipment of the type described
including a source of reference voltage and switching means
connected to the source for applying the reference voltage to a
resistor network to selectively provide a calibrating voltage.
Means are provided for comparing an analog signal corresponding to
a condition to the calibrating voltage and for providing an output
in accordance with the comparison. A current flow control circuit
having memory characteristics is affected by the comparison output
for operating an alarm device when the analog signal is at a
predetermined critical level.
One object of this invention is to provide a condition warning
circuit having memory characteristics.
Another object of this invention is to provide a circuit of the
type described which is of analog construction and has the
advantages of simplicity, cost and space economy, and reduced power
consumption as compared to digital equipment for the same
purpose.
Another object of this invention is to provide a device of the type
described which has calibrating capabilities.
The foregoing and other objects and advantages of the invention
will appear more fully hereinafter from a consideration of the
detailed description which follows, taken together with the
accompanying drawings wherein one embodiment of the invention is
illustrated by way of example. It is to be expressly understood,
however, that the drawings are for illustration purposes only and
are not to be construed as defining the limits of the
invention.
DESCRIPTION OF THE DRAWING
FIG. 1 is a circuit diagram of the invention.
FIG. 2 is a symbolical diagram indicating the status of an alarm
device operated by circuitry as shown in FIG. 1.
DESCRIPTION OF THE INVENTION
With reference first to FIG. 1 an input signal source 2 provides a
d.c. analog signal V.sub.i corresponding to a condition which may
be, for purposes of illustration, the altitude of an aircraft.
Altitude signal V.sub.i is applied through a resistor 4 to a
noninverting input (+) of an operational amplifier 6.
A reference signal source 8 provides a reference signal V.sub.R
which is applied through a switch 10 to one of the resistors 12-26
in a resistor network 28. For purposes of illustration, signal
V.sub.R is shown as applied to resistor 16.
The output of resistor network 28 at a point 30 is applied to a
dividing network 32 connected to the resistor network at a point 44
and including serially connected resistors 34 and 36, and which
resistor 36 is grounded. A calibrating voltage V.sub.C is provided
at a point 38 intermediate resistors 34 and 36 and is applied
through a resistor 40 to an inverting input (-) of an operational
amplifier 42.
Resistor network 28 is connected to voltage divider 32 at point 44,
and at which point 44 there is provided a voltage V.sub.C.sub.+K,
where K is a predetermined circuit constant commensurate with the
level of signal V.sub.i at which a warning is desired as will
hereinafter become evident. Signal V.sub.C.sub.+K is applied to an
inverting input (-) of amplifier 6 and signal V.sub.i is applied to
a noninverting input (+) of amplifier 42.
Amplifier 6 is connected at its output to a base element 46 of a
transistor 48 through a resistor 50, a diode 52 and a diode 54
connected in series. Transistor 48 has a grounded emitter element
56 and a collector element 58 connected to an alarm device such as
lamp 60 which is excited by the output of a d.c. excitation source
62. A grounded resistor 64 is connected intermediate diode 54 and
base element 46 of transistor 48.
Amplifier 6 is connected at its output to a gate 63 of a silicon
controlled rectifier 64 through a resistor 66 and a diode 68
connected in series. Silicon controlled rectifier 64 has an anode
70 connected through a resistor 72 to a source of positive direct
current and a cathode 74 connected to a collector 76 of a
transistor 78. Amplifier 42 is connected at its output to a point
84 intermediate diodes 52 and 54 through a resistor 80 and a diode
85 and is connected to anode 70 of silicon controlled rectifier 64
through resistor 80 and a diode 82 connected intermediate resistor
80 and diode 85. Amplifier 42 is connected at its output to a base
element 86 of transistor 78 through a resistor 86 and a diode 88.
Transistor 78 has a grounded emitter element 90.
A grounded resistor 92 is connected intermediate diode 68 and gate
element 62 of silicon controlled rectifier 64 and a ground resistor
94 is connected intermediate diode 88 and base element 86 of
transistor 78.
As shown in FIG. 2 and as will be next explained, the circuitry of
FIG. 1 is effective for operating lamp 60 so that the lamp is: off
at points (X) and (P) when V.sub.i = 0; off at points (a), (c),
(m), and (O) when V.sub.i = V.sub.C.sub.-K ; on at points (b), (d),
(n), and off at points (f), (j), (l) when V.sub.i = V.sub.C ; on at
points (e), (g), (i), (k) when V.sub.i = V.sub.C.sub.+K ; and on at
points (h) when V.sub.i is greater than V.sub.C.sub.+K.
The operation of the invention is such that when V.sub.i is equal
to or less than V.sub.C.sub.-K, amplifiers 6 and 42 have an output
and lamp 60 is off. When V.sub.i is equal to or greater than
V.sub.C.sub.+K, amplifiers 6 and 42 have outputs, but the output of
amplifier 6 overrides the output of amplifier 42 and the lamp is
on. However, when V.sub.i equals V.sub.C amplifier 42 has an output
and the lamp may be on or off depending upon the previous history
of the device, and in this sense the invention has memory
characteristics. If V.sub.i approaches V.sub.C from V.sub.i being
equal to or less than V.sub.C.sub.-K, the lamp comes on when
V.sub.i equals V.sub.C. If V.sub.i approaches V.sub.C from V.sub.i
being equal to or greater than V.sub.C.sub.+K, the lamp will go off
when V.sub.i equals V.sub.C.
With reference now to both FIGS. 1 and 2 the operation of the
invention at points a-p in FIG. 2 is as follows:
a. When V.sub.i is greater than V.sub.C.sub.-K, amplifiers 6 and 42
do not have a positive voltage output. Therefore diodes 52, 54, 85,
82, 68 and 88 do not conduct, transistor 48 is off and lamp 60 is
out.
b. When V.sub.i equals V.sub.C, only amplifier 42 has a positive
output whereupon diodes 54 and 85 conduct, turning on transistor 48
and lamp 60. Diode 88 conducts turning on transistor 78 which arms
silicon controlled rectifier 64.
c. When V.sub.i is equal to or less than V.sub.C.sub.-K, the
operation described in (a) repeats.
d. When V.sub.i equals V.sub.C, the operation described in (b)
repeats.
e. When V.sub.i equals V.sub.C.sub.+K, amplifier 6 also has a
positive output whereupon diode 52 conducts and provides an
additional output for maintaining transistor 48 on. Diode 68
conducts, turning on silicon controlled rectifier 64. When silicon
controlled rectifier 64 is turned on or conductive, the output of
diode 85 to transistor 48 is shorted by diode 82 through the
silicon controlled rectifier and transistor 78.
f. When V.sub.i is equal to or less than V.sub.C.sub.+K, amplifier
6 does not have an output but amplifier 42 has an output whereupon
diode 88 conducts for maintaining silicon controlled rectifier 64
conductive. Diode 85 remains shorted by diode 82 through silicon
controlled rectifier 64 and transistor 78.
g. When V.sub.i equals V.sub.C.sub.+K, the operation described in
(e) is repeated.
h. When V.sub.i is greater than V.sub.C.sub.+K, the operation
described in (e) is again repeated.
i. When V.sub.i = V.sub.C.sub.+K, the operation described in (e) is
again repeated.
j. When V.sub.i = V.sub.C, the operation described in (f) is
repeated.
k. When V.sub.i = V.sub.C.sub.+K, the operation described in (e) is
repeated;
l. When V.sub.i = V.sub.C, the operation described in (f) is
repeated.
m. When V.sub.i equals V.sub.C.sub.-K, amplifiers 6 and 42 do not
have a positive output, therefore diodes 52, 54, 85, 82, 68 and 88
do not conduct and silicon controlled rectifier 64 delatches.
Transistor 48 is off and lamp 60 is out;
n. When V.sub.i =V.sub.C, the operation described in (b)
repeats;
o. When V.sub.i =V.sub.C.sub.-K, the operation in (c) repeats;
p. When V.sub.i is less than V.sub.C.sub.-K, the operation
described in (a) repeats.
It will now be seen that the aforenoted objects of the invention
have been met. Operation has been achieved using simple analog
apparatus instead of more complex digital apparatus. Moreover, the
operation has been achieved at a lower cost, with less space and
with less power than required by digital apparatus.
Although but one embodiment of the invention has been illustrated
and described in detail, it is to be expressly understood that the
invention is not limited thereto. Various changes may also be made
in the design and arrangement of the parts without departing from
the spirit and scope of the invention as the same will now be
understood by those skilled in the art.
* * * * *