Television Channel Indicator

Abstract

In the television receiver implementations the transmitted video signals are received and then reproduced to form pictures in a cathode ray tube in accordance with the video signals. The previously produced channel character signals indicative of the selected channel numbers are used as substitutes for the video signals to enable channel indication in the same cathode ray tube. In order to accomplish the channel indication, the channel position signals are first produced in a channel selector mechanism and then the channel character signals are produced based upon the produced channel position signals by the vertical and horizontal signals necessarily formed on the receiver circuit arrangement.

Description

BACKGROUND OF THE INVENTION

This invention relates to a television channel indicator, and more particularly to an improved channel indicator for indicating the receiving channel numbers instead of or together with the television pictures in the same cathode ray tube.

In the conventional television implementations the channel numbers of the selected channels are mechanically indicated by rotation of the indicator disc which moves in union with the tunner axis in a channel selector mechanism. However, it is not possible for the prior art implementations to enlarge the indication sizes of individual channel numbers in view of structural limitations of the tunner mechanism. Granted the indication sizes will be satisfactorily enlarged, the pictures on the tube screen, on the other hand, will be indistinct because the large channel numbers appear on the tube screen at all times.

In the meanwhile, various types of remote controlling television receiver have been developed and put into the market. In these remote controlling types the channel numbers are particularly difficult to read, though there are the advantage that channel selection becomes possible at positions remote from the receiver body.

OBJECTS AND SUMMARY OF THE INVENTION

Accordingly, the primary object of this invention is to provide a channel indicator for use in a television receiver which avoids one or more of the disadvantages and limitations of prior art installations.

Another object of this invention is to provide a television channel indicator with which the channel numbers can be recognized with ease.

Still another object of this invention is to provide a television channel indicator with which the channel numbers can be produced in a cathode ray tube with a comparatively large size.

A further object of this invention is to provide a television channel indicator which enables channel indication only during the desired time periods.

Another object of this invention is to provide a television channel indicator which is most suitable for remote controlling channel selection.

It is still a further object of this invention is to provide a television channel indicator wherein the channel numbers of selected channels are visually indicated for a predetermined time period after operator's channel selection.

These and other objects and novel features of this invention are set forth in the appended claims and this invention as to its organization and its mode of operation will best be understood from a consideration of the following detailed description of the preferred embodiments when used in connection with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic block diagram showing a television receiver provided with a channel indicator of this invention.

FIG. 2 is a circuit diagram showing an example of an indication time setting circuit adopted in this invention channel indicator.

FIG. 3 is a circuit diagram showing a modification of FIG. 2 circuit.

FIG. 4 is a time chart showing the relation of various signals which occur in FIGS. 2 and 3 circuits.

FIG. 5 is a chart showing channel pattern units produced by means of this invention channel indicator.

FIG. 6 is a schematic block diagram showing an embodiment of the channel number indicator arrangement of this invention.

FIG. 7 is a circuit diagram showing an explanatory encoder circuit adopted in FIG. 6 arrangement.

FIG. 8 is a time chart showing input and output waveforms produced in the vertical unit signal generator within FIG. 6 arrangement.

FIG. 9 is a time chart showing input and output waveforms produced in the horizontal unit signal generator within FIG. 6 arrangement.

FIG. 10 is a simplified schematic diagram showing another embodiment of the channel number indicator arrangement of this invention.

FIG. 11 is a time chart showing the relation of various signals which occur in FIG. 10 arrangement.

FIG. 12 is a chart showing an example of channel number indication pattern produced on the cathode ray tube screen in accordance with the embodiment of this invention.

FIG. 13 is a time chart showing various signals for explanation purpose of the channel indicator provided with a slanting character generator.

FIG. 14 is a circuit diagram showing the slanting character generator adopted in this invention channel indicator.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

Referring now to FIG. 1, the conventional television receiver implementations are illustrated including an antenna 1, a tuner 2, a channel selector 3, an intermediate frequency amplifier 4, a video detector 5, a video amplifier 6, a cathode ray tube 7, a sound intermediate frequency amplifier 8, a sound detector 9, a sound amplifier 10, a speaker 11, a synchronizing separator 12, a vertical oscillator 13, a vertical deflection circuit 14, a horizontal oscillator 15, and a horizontal deflection circuit 16.

Furthermore, the television receiver implementation illustrated in FIG. 1 contains a channel indicator arrangement which comprises a signal composition/substitution circuit 17, an indication period setting circuit 18, a character selection circuit 19 and a character generator 20, in addition of well-known components and elements previously described. With such indicator arrangement, when the tuner mechanism 2 is set at a desired channel by means of the channel selector 3, the selection signals from the character selection circuit are operatively coupled with the character generator 20 to produce the channel character signals indicative of the channel numbers of the selected channels at that time, which character signals are then either used as substitutes for video signals obtained from the video amplifier 6 or are composed to the same. The alternate or composite character signals are supplied to the cathode ray tube 7 to produce the character numbers indicative of present operative channels on the screen thereof. The channel indication is taken place during a predetermined period, for example, during a fixed period immediately after the operator's channel selection, by operations of the indication time setting circuit 18. If necessary, the channel numbers may be optionally indicated even after a long lapse of time following the operator's channel selection, by use of any trigger means activating the indication time setting circuit 18.

The constituent circuit units of the invented channel indicator arrangement will be now described.

The first constituent element is the indication time setting circuit 18 which is made up of a one-shot multivibrator producing rectangular signals each having a fixed pulse length upon every receipt of trigger pulses. FIG. 2 illustrates the well-known one-shot multivibrator which comprises transistors 21, 22, resistors 23, 24, 25, 26, capacitors 27, 28, etc. In such arrangement, when the positive trigger pulses shown in FIG. 4a are applied to the input terminal 32 thereof, and the base of the transistor 21 via a differentiation circuit composed of a resistor 30 and capacitor 31 and furthermore via a diode 29, the output 33 thereof or the collector of the transistor 22 delivers the rectangular signals shown in FIG. 4b which are only at a high level during a fixed time interval T.sub.1 following the triggering operations. The fixed interval T.sub.1 is determined by the product R.sub.1 C.sub.1 of the resistance value R.sub.1 of the resistor 24 and the capacitance value C.sub.1 of the capacitor 27. The signal composition/substitution circuit 17 is responsive to the rectangular signals either to compose the channel character signals to the video signals or to substitute the former signals for the latter signals. Such rectangular signals from the indication time setting circuit 18 will be called indication instruction pulses hereafter. The pulse length of the indication instruction pulse controls the channel indication time period in the cathode ray tube 7.

In the event that the switch-over of the channels is taken place during a short time period compared to the character indication time T.sub.1, as shown in FIG. 4c, the circuit 18 does not respond all of the trigger pulses produced during the channel switching period, and as a consequence the character indication time period T.sub.1 is only dominated by the trigger pulses ch1, ch3, and ch5. Therefore, the actual indication time periods following the trigger pulses ch2, ch4 become extremely short and the channel numbers of ch2, ch4 will immediately disappear from the tube screen irrespective of time intervals of the operator's channel selection ch2-to-ch3, ch4-to-ch5.

A circuit arrangement of FIG. 3 is another embodiment of the indication time setting circuit which avoids the above-mentioned disadvantage. It contains the conventional Schmitt trigger circuit made up of transistors 34, 35 and resistors 36, 37, 38, 39, 40, 41 together with a charge-and-discharge circuit of a transistor 42, capacitor 43 and resistor 44 positioned at the input side of the Schmitt trigger circuit. An OR gate 45 provides pulses to the base of a transistor 42 via a resistor 46 every channel switch-over. That is, the OR gate 45 is provided with the predetermined number of input terminals corresponding the number of channels of television broadcast and a positive voltage Vcc is impressed on these input terminals through a switch 47 which moves in manually selection of channels. Consequently, when the receiver is tuned to a specified channel, the positive voltage Vcc is applied to the one corresponding input terminal of the OR gate 45 via the movable contact of the switch 47 and then the output terminal a of the OR gate 45 is at a positive high voltage potential. However, the potential at the output terminal a of the OR gate 45 momentarily falls to a low voltage level since the movable contact of the switch 47 becomes the opened state in a moment of time when it moves from a certain input terminal of the OR gate 45 to an adjacent input terminal. For this reason the OR gate 45 delivers negative pulse signals shown in FIG. 4e from its output terminal a every channel switch-over. The base of the transistor 42 receives the negative pulse signals via the resistor 46 every channel switch-over so that the transistor 42 is turned ON causing the collector current to flow at this time.

In such manner the capacitor 43 is charged to the power voltage Vcc when the transistor 42 is conductive and the charge in the capacitor 43 is discharged via the resistor 44 when the same 42 is non-conductive. The charge by the transistor 43 also is discharged via the transistor 34 and resistors 37, 38 within the Schmitt circuit but such discharged amount is extremely small. The discharge constant is mainly decided by the resistor 44 and the capacitor 43. The collector voltage of the transistor 42 or b point voltage at this time is viewed from FIG. 4f.

The voltage shown in FIG. 4f from the output of the charge-and-discharge circuit of a combination of the transistor 42, capacitor 43 and resistor 44 is then impressed on the base of the transistor 34 in the Schmitt circuit. When the base voltage of the transistor 34 within the Schmitt circuit goes beyond a threshold value Vth, the transistor 34 is conductive and the other transistor 35 is non-conductive. Conversely, when the base voltage of the transistor 34 falls below the threshold level Vth, the transistor 34 becomes non-conductive and the transistor 35 conductive. By application of the voltage of FIG. 4f into the base of the transistor 34, the rectangular voltage as shown in FIG. 4g appears at the collector of the transistor 35 or the output terminal c of the Schmitt circuit. In other words, the output voltage at the terminal c is at a high level during another fixed time period T.sub.2 following the channel switch-over. The second fixed time period T.sub.2 is determined by a time constant of the capacitor 43 and the resistor 44.

As previously discussed, if the embodiment viewed in FIG. 3 is adopted as the channel indication time setting circuit for this invention, the channel indication will be assuredly accomplished in the cathode ray tube immediately after the operator's channel selection even though it is taken place quickly compared to the fixed interval T.sub.2. No extremely short indication time period will be permitted as a result of such installation of FIG. 3 circuit.

Unlike the conventional Schmitt circuit using no resistor 37 the FIG. 3 embodiment utilizes the two resistor 37, 38 as emitter resistors for the transistor 34. The utilization of the two emitter resistors 37, 38 is intended to enhance the emitter resistance value, for the reason that an excessively high resistance value of only the resistor 38 will cause drop in output voltages of the Schmitt circuit, although the resistance value of the emitter resistor must be chosen high necessary to prevent the discharge time constant of the charge-and-discharge circuit from varying upon affection of the Schmitt circuit The second and third constituent components are the character selection circuit 19 and the character generator 20. Although the illustrated embodiment of the character generator will produce in such a way that the channel numbers 1 through 12 of the VHF channels together with ones U1 through U8 of the UHF channels (U1-U8 designates the sufficient number of UHF channels in use in any one local area) are both indicated on the tube screen, all of the VHF and UHF channels up to 62 could be indicated in the same tube by the same circuit implementation. For example, for convenience of illustrations of the character generator 20, etc. the drawings provide for the UHF channel numbers 1-12 and UHF channel numbers U1-U8.

As illustrated in FIG. 5, the VHF channel numbers 1-12 and the UHF channel numbers U1-U8 are indicated in the center of the tube screen as a combination of a plurality of segments A, B, C, - - - N. The individual segments A, B, C, - - - N are defined by seven horizontal positions I, II, III, IV, V, VI, VII and five vertical positions 1, 2, 3, 4, 5. The individual segments may be represented by the following logical formulas; A = (I.sup.. 2), B = (I.sup.. 4), C = (II.sup.. 5), D = (III.sup.. 2), E = (III.sup.. 4), F = (IV.sup.. 2), G = (IV.sup.. 4), H = (V.sup.. 1), I = (V.sup.. 3), J = (V.sup.. 5), K = (VII.sup.. 2), L = (VII.sup.. 4), M = (VII.sup.. 2), N = (VI.sup.. 4).

In other words, a combination of horizontal unit signals defining the horizontal positions I, II, III, IV, V, VI, VII respectively and vertical unit signals defining the vertical positions 1, 2, 3, 4, 5 respectively may represent and form all of the channel character signals 1-12 and U1-U8.

The following detailed description is directed to operation modes of the character signal production within the character generator 20 and the channel selection within the selection circuit 19 with reference to a concrete embodiment shown in FIG. 6.

In FIG. 6, a switch 47 has a plurality of fixed contacts one of which is selected with moving of channel selector axis during the operator's channel selection. An encoder circuit 48 associated with the switch 47 serves to encode the selected channel into code signals A, B, C, D, E in accordance with the movable arm of the switch 47. For example, the encoder circuit may be made up of a diode matrix of combined diodes and resistors as is shown in FIG. 7. The VHF channels 1-12 and one UHF channel U1 are taken out as binary coded signals from four output terminals A, B, C, D while the remaining UHF channels U2-U8 are taken out from five output terminals A, B, C, D, E.

A truth table wherein the output codes from the terminals A, B, C, D, E for every channels are designated by logical states 1 and 0 is as follows. ##SPC1##

Trigger pulses necessary to activate the indication time setting circuit 18 at channel switching time are also taken out from the diode matrix cirucit shown in FIG. 7.

Returning to FIG. 6, a decoder circuit 49 is provided for decoding the coded signals into the VHF channel position signals 1-12 and one UHF channel position signal U1, which may be made up of the diode matrix as the case of the encoder circuit 48, but not shown in the drawings.

In this manner the character selection circuit 19 of FIG. 1 is composed of the encoder circuit 48 and the decoder circuit 49 wherein the channel position signals are encoded into the coded signals A, B, C, D, E in the encoder side and then the decoding mode is carried out in the decoder side. It may be found desirable for circuit integration on one slice to provide the encoder and decoder circuits because such circuit construction can reduce the number of input and output terminals. In this case only five input terminals A, B, C, D, E are allowed.

A counter circuit 50 comprises eight flip-flops FF1, FF2, - - - FF8 to count horizontal pulse signals occurred in the horizontal oscillator 15 within the television receiver and the count contents are reset upon appearance of every vertical pulse signals from the vertical oscillator 13. Output terminals F, G, H, I, J of fourth through eighth flip-flops FF4, FF5, - - - FF8 deliver rectangular signals as shown in FIG. 8.

A vertical unit signal generator 51 comprises a combination of various gate circuits arranged and constructed to produce the vertical unit signals 1, 2, 3, 4, 5 based upon the various rectangular signals F, G, H, I, J from the counter 50. The waveforms of various unit signals will be found in FIG. 8. The unit signals 1, 2, 3, 4, 5 are obtained from the following formulas.

1 = (GHIJ), 2 = (GHIJ +HIJ), 3 = (GHIJ), 4 = (IJ), 5 = (GHIJ)

Such obtained vertical unit signals are deposited about the center of the vertical scanning period, serving as the vertical positioning signals for the purpose of projecting the channel characters at the center of the tube screen as shown in FIG. 6.

A pulse oscillator 52 provides pulse signals of sufficiently high frequency, e.g., 230KHz compared to the horizontal scanning frequency (15.75KHZ) of the television receiver. A counter 53 comprises four flip-flops FF1, FF2, FF3, FF4 arranged to count the 230KHz pulse signals occurred in the oscillator 52 and such counting contents are reset in response to the horizontal pulse signals of the television receiver. Rectangular signals of FIG. 9 appear at the input terminal K of the counter 53 and the output terminals L, M, N, O of the flip-flops FF1, FF2, FF3, FF4.

A horizontal unit signal generator 54 comprises a combination of various gate circuits in the same manner as that of the vertical unit signal generator 51 earlier described, and serves to provide the horizontal unit signals I, II, III, IV, V, VI, VII in accordance with the rectangular signals K, L, M, N, O from the counter 53. The waveforms of these unit signals will be viewed from FIG. 9. These unit signals are obtained from the following logical formulas.

I = (k l m n o )

ii = (m n o )

iii = (k l m n o )

iv = (k l m n o )

v = (k l m n o + l m n o + l m n o )

vi = (k l m n o )

vii = (k l m n o )

such obtained horizontal unit signals are deposited about the center of the horizontal scanning period, serving as horizontal positioning signals for purpose of channel character indication in the cathode ray tube.

A segment signal generator 55 comprises a plurality of gate circuits connected to produce the segment signals A, B, C, - - - N by means of the vertical unit signals 1, 2, 3, 4, 5 and the horizontal unit signals I, II, - - - VII from the vertical and horizontal unit signal generators 51, 54 respectively. As earlier noted, each segment signal is a combination of both the horizontal and vertical unit signals.

A character signal generator 56 contains numerous gate circuits to produce the character signals 1-12 and U1-U8 by receipt of the segment signals A, B, C, - - - N from the segment signal generator 55. In a concrete embodiment the channel signals 0-9 and 1i (wherein i: an arbitrary number) and Ui, Ul are provided from the generator 56. These channel signals are obtained as an appropriate OR gate output under the following formulas.

1 = F + G

2 = h + i + j + g + m

3 = h + i + j + m + n

4 = f + i + k + l

5 = f + h + i + j + n

6 = f + g + h + i + j + n

7 = f + h + m + n

8 = f + g + h + i + j + m + n

9 = f + h + i + j + m + n

0 = f + g + h + j + m + n

li = A + B

ui = A + B + C + D + E

ul = A + B + C + D + E + M + N

A character output signal generator 57 also contains numerous gate circuits, wherein are AND' gated the channel signals 1-12 and Ul from the decoder circuit 49 and the channel signals Ui from the output terminal E of the encoder circuit 48 together with the character signals 0-9, li, Ui and Ul corresponding to the above channel signals from the character signal generator 56 in order to take out the proper character signals from the character output signal generator 56. For example, in the case where the receiver is turned to the VHF 12 channel, the decoder circuit 49 provides the channel signal 12. At this time only the character signals li and 2 from the character signal generator 56 are gated on and taken out in the character output signal generator 57 in accordance with such channel signal 12. In the case where the receiver is turned to the UHF 34 channel (it is assumed herein that the UHF 34 channel corresponds to the above U2 channel for purpose of channel indication), the channel signal Ui and the channel signal 2 are respectively obtained from the encoder and decoder circuits 48, 49. Under these conditions only the character signals Ui and 2 are gated on and taken out in accordance with both the above channel signals. An AND gate circuit 58 responds to the indication instruction pulse signal to perform gate operations during the fixed time period following the operator's channel selection.

As previously mentioned, the FIG. 6 embodiment includes the character generator 20 which comprises the counter 50, the vertical unit signal generator 51, the pulse oscillator 52, the counter 53, the horizontal unit signal generator 54, the segment signal generator 55, the character signal generator 56, the character output signal generator 57 and the AND gate circuit 58.

According to the channel indicator arrangement embodying this invention, the character generator 20 of FIG. 6 provides the individual channel character signals by use of the horizontal and vertical pulse signals within the television receiver, while the channel selector 3 and the character selection circuit 19 provides a predetermined channel signal corresponding to the turned channel. One predetermined character signal is selected out of all the character signals from the character generator 20 based upon such predetermined channel signal and simultanelusly such selected character signal is supplied to the cathode ray tube 7 only during the fixed interval following the channel selection in such way that it is either composed to the video signal of the television receiver or substituted for the same, with the results that the one character of the turned channel number is projected on the tube screen during the fixed interval after the mannual channel selecting operation.

In the illustrated embodiment of FIG. 1, the character generator 20 provides all of the channel character signals based upon the vertical and horizontal pulse signals from the oscillators 13, 15. In such instance both the vertical and horizontal oscillator 13, 15 continue to oscillate even when the receiver is turned to an idle channel and either horizontal or vertical synchronizing signals are not obtained. As a result of this, the character generator 20 always the channel character signals and the channel character or number is indicated in the tube during the fixed time period even after the operator's selection to the idle channel. This instance shows a tendency to cause disturbances of the channel character pattern on the tube screen with variations in the oscillation frequency of the vertical and horizontal oscillator 13, 15.

Another embodiment illustrated in FIG. 10 is arranged and constructed in view of the above disadvantage, wherein existance of the horizontal or vertical synchronizing signal is sensed so that when sensing no synchronizing signals the selection of any one channel character signal is inhibited from the character generator 20 thereby preventing the channel character from projecting on the tube screen in the case of the idle channel selected. Similar reference designates as used in FIG. 6 are provided in this drawing.

A flip-flop circuit 59 is of RSS type having a set input terminal S receiving the horizontal synchronizing signals from the synchronizing separator 12 within the receiver and a reset input terminal R receiving the vertical oscillation pulse signals from the vertical oscillator 13. A well-known truth table as to the RSS type flip-flop circuit 59 is as follows.

TABLE 2

S R Q.sup.n.sup.-1 Q.sup.n.sup.+ 1 0 0 Q.sup.n Q.sup.n 0 1 0 1 1 0 1 0 1 1 1 0

As understood from the above table, when the television receiver is turned to the idle channel by means of the channel selector 3, the flip-flop 59 always is in its reset state and thus the output voltage of the output terminal Q is in a high level or 1 state by merely application of the vertical oscillation pulses into the reset input terminal R since no horizontal synchronizing signals are applied to the set input terminal S thereof at this time. Therefore, the output state of an OR gate 60 always becomes the 1 state irrespective of the indication instruction signal supplied from the indication time setting circuit 18. At this time the outputs of NOR gates 61, 62 remain the 0 state and the counters 50, 53 the reset state. The outputs of inverter circuit 63 and AND gate 58 always remain the 0 state. Accordingly, no operation mode of the character signal production can not be allowed in the character generator 20. The AND gate 58 does not provide any character signal. When the receiver is then turned to any one of the operable channels, the horizontal synchronizing signals are supplied to the reset input terminal S of the RSS type flip-flop 59 and thus the output state at the output terminal Q thereof becomes the 0 state. The output state is set to the 1 state whenever the vertical oscillation pulses are supplied to the reset input terminal R but is immediately reset to the 0 state in response to the succeeding horizontal synchronizing signals. The output waveforms in the FIG. 10 embodiment are illustrated in FIG. 11. When selecting the channels the negative indication instruction pulses are supplied from the indication time setting circuit 18 to an OR gate circuit 60 during the succeeding period and consequently both the counters 50, 53 initiate their count operations. The count contents will be respectively reset after lapses of the vertical and horizontal oscillation periods. In this manner the character generator 20 performs operations of the character signal production. At this time the desired character signal is extracted from the character generator 20 via the AND gate during the pulse length of the indication instruction signal. Needless to say, the extraction mode of the character signals from the AND gate 58 is inhibited during the predetermined period within such indication period, viz., during the vertical oscillation pulse period. The above-described embodiments of this invention channel indicator is constructed in order to display straighting character on the tube screen as shown in FIG. 5.

The following embodiment as shown in FIG. 12 is to provide the channel indicator projecting the slanting channel character signals on the tube screen in order to make easy recognition of the channel numbers.

This embodiment is further provided with the slanting character generator containing two integration circuits 64, 65 and a comparison circuit 66 as shown by broken lines in FIG. 6 in addition to the constituent components of the FIG. 6 embodiment. The integration circuit 64 is associated with the horizontal pulse signals while the integration circuit 65 associated with the vertical pulse signals.

For a better understanding of the FIG. 12 embodiment, an example wherein five horizontal scanning lines occur during one vertical scanning period will be explained with reference to FIG. 13 (actually, 2625 horizontal scanning lines in Japan).

The integration circuit 64 responds to the horizontal pulse signals applied thereto to provide right-raising saw-tooth signals. On the other hand, the integration circuit 65 responds to the vertical pulse signals to provide right-falling saw-tooth signals. An amplitude of the horizontal saw-tooth signal is approximately twice as high as that of the vertical one. The comparison circuit 66 compares the horizontal saw-tooth signals with the vertical ones and the output voltage thereof falls to a low level whenever the horizontal saw-tooth signals become larger than the vertical ones. Immediately after the horizontal pulse period, namely when the horizontal saw-tooth signals become smaller than the vertical saw-tooth signals, the output voltage of the comparison circuit 66 raises to a high level. As a result, the comparison circuit 66 provides positive rectangular pulse signals synchronous with the horizontal pulse signals, the rectangular pulse signals having gradually shortended pulse length within one vertical scanning period.

The FIG. 12 embodiment controls the outputs from the pulse oscillator 52 by utilization of such produced rectangular pulse signals. Namely, the oscillation of pulse oscillator 52 is caused to respond to the trailing edges of the rectangular pulse signals or the output signals of the pulse oscillator usually operating are gated in response to the rectangular pulse signals. In such manner, the actual oscillation performances begin with the trailing edges of the rectangular pulse signals (S1, S2, S3, S4, S5 in FIG. 13) and terminate with the leading edges. The starting time becomes quick with advance of the vertical scanning. Therefore, providing that the counting mode of the counter 53 and gating mode of the horizontal unit signal generator 54 are carried out based upon the oscillation output from the pulse oscillator 52, the relative positions of the horizontal unit signals I, II, - - - VII of the horizontal unit signal generator 54 will be shifted backward with advance of the vertical scanning. Therefore, by the channel character indication based upon the channel character signals from the generator 20, all of the channel characters will be indicated in slanting patterns as shown in FIG. 12.

The detailed construction of the integration circuits 64, 65, the comparison circuit 66 and a part of the pulse oscillator 52 provided for establishing the slanting character signal generator will be described with reference to FIG. 14.

The integration circuit 64 comprises a transistor 67, resistors 68, 69, a semi-fixed variable resistor 70, a capacitor 71. When the base of the transistor 67 receives positive horizontal pulse signals via the resistor 69, the collector of the transistor 67 provides the right-raising horizontal saw-tooth signals. The amplitude of the saw-tooth signals is adjustable by means of the variable resistor 70.

Similarly, the integration circuit 65 comprises transistors 72, 73, resistors 74, 75, 76, semi-fixed variable resistors 77, 78 and a capacitor 79. When the base of the transistor 72 receives negative vertical pulse signals via the resistor 74, the emitter of the transistor 73 provides the right-falling vertical saw-tooth signals of which the amplitude also is adjustable by means of the variable resistors 77, 78.

The comparison circuit 66 contains a transistor 80, resistors 81, 82, an inverter circuit 83, the base of the transistor 80 being coupled with the vertical saw-tooth signal output of the integration circuit 65 while the emitter thereof coupled with the horizontal saw-tooth signal output of the integration circuit 64. In fact, the emitter of the transistor 80 is connected with the collector of the transistor 80. The transistor 80 is conductive when the vertical saw-tooth voltage exceeds the horizontal saw-tooth voltage while it is non-conductive when the horizontal saw-tooth voltage is high compared to the vertical saw-tooth voltage. Therefore, the output voltage of the comparison circuit 66 or the output voltage of the inverter circuit 83 is momentarily at a high level after appearance of the horizontal pulse and then at a low level when the vertical saw-tooth voltage becomes greater than the horizontal saw-tooth voltage. Thus the comparison circuit 66 provides the rectangular pulse signals.

The pulse oscillator 52 comprises NAND gates 84, 85, capacitors 86, 87, diodes 88, 89, resistors 90, 91 and an inverter circuit 92. The above rectangular pulse signals are applied from the comparison circuit 66 to the NAND gate 84 through the inverter circuit 92. The pulse oscillator 52 is energized when the rectangular pulse signal from the comparison circuit 66 becomes a low level output and are de-energized when being a high level output. The inventors have confirmed from experiments that the pulse oscillator 52 has an oscillation frequency of about 230KHz when using the resistors 90, 91 of about 1.2K.OMEGA. and the capacitors 86, 87 of about 1,000 PF. Although FIG. 14 shows the construction for intermittently inhibiting oscillation performances of the pulse oscillator 52 based upon the outputs of the comparison circuit 83, the oscillator 52 may successively perform its oscillation modes and then its oscillation output is gated based upon the outputs of the comparison circuit 66 during a desired time period.

Claims

1. A channel indicator in a television receiver tunable to a plurality of channels comprising;

a tuning mechanism for tuning the receiver to any one of the channels;

a channel character generator for providing a channel character signal in accordance with the turned channel;

a receiver circuit arrangement for receiving and amplifying transmitted video signals;

a cathode ray tube for projecting a picture in accordance with the received video signals;

a connection between the channel character generator and the cathode ray tube for supplying the channel character signal to the cathode ray tube thereby indicating the channel character of the tuned channel in the

2. A channel indicator as defined in claim 1 wherein means is provided for composing the channel character signal to the video signal, the composed

3. A channel indicator as defined in claim 1 wherein means is provided for substituting the channel character signal for the video signal, only the

4. A channel indicator as defined in claim 1 wherein the channel character signals indicative of the tuned channels are provided for all of the tunable channels, each channel character signal comprising a combination of segment signals defined by both horizontal and vertical position

5. A channel indicator in a television receiver tunable to a plurality of channels comprising;

a tuning mechanism for tuning the receiver to any one of the channels;

a receiver circuit arrangement for receiving and amplifying transmitted video signals;

a picture tube for vidually projecting a picture in according with the received video signals;

a channel character generator for providing channel character signals for all of the tunable channels;

a channel character selector associated with the tuning mechanism for selecting one of the channel character signals corresponding to the tuned channel;

a connection between the channel character selector and the picture tube for supplying the selected one channel character signal to the picture tube thereby indicating the channel character of the tuned channel in the

6. A channel indicator as defined in claim 1 which further comprises horizontal and vertical signal generators associated with the cathode ray tube and the channel character generator being responsive to the horizontal and vertical signals to enable the channel character indication

7. A channel indicator as defined in claim 1 which further comprises an indication time setting circuit for enabling the channel character indication in the cathode ray tube during a predetermined time period

8. A channel indicator as defined in claim 7 wherein the indication time setting circuit contains a one-shot multivibrator for providing an indication instruction signal every channel switch-over in the tuning

9. A channel indicator as defined in claim 7 wherein the indication time setting circuit contains a Schmitt circuit and a charge-and-discharge circuit connected with the input of the Schmitt circuit for providing an

10. A channel indicator in a television receiver tunable to a plurality of VHF channels and a limited number of UHF channels comprising; a tuning mechanism for tuning the receiver to any one of the VHF and UHF channels;

a channel character generator for providing channel number signals indicative of the tuned VHF or UHF channel and an UHF symbol signal indicative of the UHF channel selection;

a receiver circuit arrangement for receiving and amplifying transmitted video signals;

a connection between the channel character generator and the cathode ray tube for supplying the VHF or UHF channel number signals and/or the UHF symbol signal to the cathode ray tube thereby indicating the channel

11. A channel indicator as defined in claim 5 wherein the channel character selector comprises an encoder circuit for encoding the one selected channel signal into binary coded signals and a decoder circuit for

12. A channel indicator as defined in claim 5 wherein the channel character generator comprises a first counter for providing a plurality of horizontal unit signals and a second counter for providing a plurality of vertical unit signals, each channel character signal being composed of a

13. A channel indicator as defined in claim 1 which further comprises means for sensing any horizontal or vertical synchronizing signal occurred in the receiver and means for inhibiting the operation of the channel

14. A channel indicator as defined in claim 13 wherein the inhibition means comprises a flip-flop of RSS type receiving as set inputs the horizontal synchronizing signals and receiving as reset inputs the vertical signals.

15. A channel indicator as defined in claim 1 wherein the channel character generator provides slanting channel character signals relative to the

16. A channel indicator as defined in claim 15 wherein the slanting channel character generator comprises integration circuits associated with horizontal and vertical scanning lines respectively and a comparison circuit connected with both the integration circuits.